Synchronous circuit for matrix equipment based on multistage operational amplifier

Abstract

The utility model discloses a synchronous circuit for matrix equipment based on multistage operational amplifiers. The synchronous circuit comprises an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module and a distribution module, the input interface is respectively connected with the input ends of the operational amplifier module A and the operational amplifier module B; the output end of the operational amplifier module A is connected with the distribution module through the signal separation module; the output end of the operational amplifier module B is connected with the output interface; the input interface and the output interface are both of a pluggable structure. The utility model discloses a synchronous circuit for matrix equipment based on multistage operational amplifiers. The synchronous circuit comprises an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module and a distribution module, the output picture synchronization effect of the spliced display screen is realized; in addition, the problem that the video signal transmission quality is reduced due to the signal attenuation phenomenon is solved. The synchronous circuit for the matrix equipment based on the multistage operational amplifier provided by the embodiment of the utility model is convenient to plug and splice, simple to use and rapid to install.

Description

Technical Field

[0001] The utility model relates to the technical field of video signal synchronization of a spliced ​​display screen, in particular to a synchronization circuit for matrix equipment based on a multi-stage operational amplifier. Background Art

[0002] In order to avoid the problem of image asynchrony caused by errors in internal video signal transmission or processing, or image asynchrony caused by frame loss, existing video matrix splicing display screens usually set up a phase-locked circuit inside the device. However, most of the existing phase-locked circuits are designed for small splicing screens. When they are applied to large-screen LED splicing cabinets, obvious signal attenuation will occur, resulting in a decrease in the quality of video signal transmission. Utility Model Content

[0003] In order to solve the above technical problems, the utility model provides a synchronization circuit for matrix equipment based on multi-stage operational amplifiers, including an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, and a distribution module, wherein:

[0004] The input interface is connected to the input ends of operational amplifier module A and operational amplifier module B respectively; the output end of operational amplifier module A is connected to the distribution module through the signal separation module; the output end of operational amplifier module B is connected to the output interface; the input interface and the output interface are both pluggable structures.

[0005] Preferably, it comprises several levels of synchronization circuits; the synchronization circuits are provided with an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, and a distribution module;

[0006] The input interface of the first-stage synchronization circuit is connected to the Gen lock synchronization source;

[0007] The input interface of the second-level and above synchronization circuits is connected to the output interface of the previous-level synchronization circuit.

[0008] Preferably, the operational amplifier module A and the operational amplifier module B use OPA820 amplifiers.

[0009] Preferably, the model of the signal separation module is EL4511.

[0010] Preferably, the model of the distribution module is CDCLVC1112.

[0011] Preferably, the input interface and the output interface are both BNC connectors.

[0012] The utility model provides a synchronization circuit for matrix devices based on multi-stage operational amplifiers, which realizes the synchronization effect of splicing display screen output images through input interfaces, output interfaces, operational amplifier modules A, operational amplifier modules B, signal separation modules, distribution modules and several video processing modules, and solves the problem of reduced video signal transmission quality caused by signal attenuation. The utility model provides a synchronization circuit for matrix devices based on multi-stage operational amplifiers, which is convenient for plugging and splicing, simple to use and quick to install. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A block diagram of a synchronous circuit for a matrix device based on a multi-stage operational amplifier provided by the utility model;

[0014] Figure 2 It is a block diagram of a multi-stage synchronous circuit;

[0015] Figure 3 A circuit diagram of a first input interface, a first output interface, a first operational amplifier module A and a first operational amplifier module B;

[0016] Figure 4 is a circuit diagram of a first signal separation module;

[0017] Figure 5 is a circuit diagram of a first distribution module;

[0018] Among them: 10, Gen lock synchronization source; 11A, first input interface; 11B, first output interface; 121, first operational amplifier module A; 122, first operational amplifier module B; 13, first signal separation module; 14, first distribution module; 21A, second input interface; 21B, second output interface; 221, second operational amplifier module A; 222, second operational amplifier module B; 23, second signal separation module; 24, second distribution module. DETAILED DESCRIPTION

[0019] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further described below in conjunction with specific embodiments. However, the following embodiments are only preferred embodiments of the present invention, not all of them. Based on the embodiments in the implementation mode, other embodiments obtained by those skilled in the art without creative work all belong to the protection scope of the present invention. The experimental methods in the following embodiments are conventional methods unless otherwise specified. The materials, reagents, etc. used in the following embodiments are all commercially available unless otherwise specified.

[0020] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0021] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] The utility model embodiment provides a synchronization circuit for matrix equipment based on multi-stage operational amplifier (Gen lock synchronization source synchronization video signal frame rate circuit), including an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, and a distribution module, wherein:

[0023] The input interface is connected to the input ends of operational amplifier module A and operational amplifier module B respectively; the output end of operational amplifier module A is connected to the distribution module through the signal separation module; the output end of operational amplifier module B is connected to the output interface; the input interface and the output interface are both pluggable structures.

[0024] When implementing it, Figure 1 As shown, a synchronous circuit for a matrix device based on a multi-stage operational amplifier includes an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, a distribution module, and, wherein: the input interface and the output interface are both BNC connectors; the model of the distribution module is CDCLVC1112; the operational amplifier module A and the operational amplifier module B use OPA820 amplifiers; the model of the signal separation module is EL4511;

[0025] The input end of the input interface is used to be connected to the output end of the Gen lock synchronization source 10 or the previous level synchronization circuit; the output end of the input interface is respectively connected to the input ends of the operational amplifier module A and the operational amplifier module B; the output end of the operational amplifier module A is connected to the input end of the distribution module through the signal separation module; the output end of the distribution module is used to be connected to the video processing module; the distribution module divides the received signal into 12 channels and gives them to the video processing module for matrix video processing; the video processing module is an existing matrix video processing module based on FPGA; the video processing module processes the received signal and outputs it to the next processing circuit or the corresponding splicing screen; the output end of the operational amplifier module B is connected to the output interface; the input interface and the output interface are both pluggable structures.

[0026] When working, the Y signal output by the Gen lock synchronization source 10 enters the operational amplifier module A and the operational amplifier module B through the input interface. The operational amplifier module A and the operational amplifier module B amplify the received signal to ensure that the signal output by the Gen lock to the signal separation module or the next level circuit will not be attenuated; the operational amplifier module A transmits the received signal to the signal separation module for HS (line signal), VS (field signal), and F signal separation; the frame synchronization depends on the field signal VS, and the separated field signal VS is sent to the signal Buffer (distribution module: CDCLVC1112) for 12-way distribution, and finally sent to the main processor (FPGA matrix video processing module) of all the boards in the device for frame rate synchronization, so as to achieve synchronization of the output picture;

[0027] The operational amplifier module B transmits the amplified signal to the output interface, and then transmits it to the next level circuit through the output interface.

[0028] In this embodiment, the pluggable design of the input interface and the output interface can facilitate the splicing of multi-level circuits, which is particularly important for the connection of large-screen LED splicing boxes. In addition, the operational amplifier module A is used to amplify the signal of the current level circuit, and the operational amplifier module B is used to amplify the signal transmitted to the next level circuit; thereby solving the problem of signal attenuation in the large-screen LED splicing box circuit, resulting in a decrease in transmission quality or even an inability to transmit signals normally; at the same time, the HS, VS, and F signals are separated by the signal separation module and then distributed and synchronized, thereby achieving the purpose of output screen synchronization.

[0029] The synchronization circuit for matrix devices based on multi-stage operational amplifiers provided by the embodiment of the utility model realizes the synchronization effect of splicing display screen output images through input interface, output interface, operational amplifier module A, operational amplifier module B, signal separation module, and distribution module; and solves the problem of reduced quality of video signal transmission caused by signal attenuation. The synchronization circuit for matrix devices based on multi-stage operational amplifiers provided by the embodiment of the utility model is convenient for plugging and splicing, simple to use, and quick to install.

[0030] Furthermore, it includes several levels of synchronization circuits; each of the synchronization circuits is provided with an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, a distribution module and several video processing modules;

[0031] The input interface of the first-stage synchronization circuit is connected to the Gen lock synchronization source;

[0032] The input interface of the second-level and above synchronization circuits is connected to the output interface of the previous-level synchronization circuit.

[0033] When implementing it, Figure 2 As shown, the first-stage synchronization circuit includes a first input interface 11A, a first output interface 11B, a first operational amplifier module A121, a first operational amplifier module B122, a first signal separation module 13, and a first distribution module 14;

[0034] The second-stage synchronization circuit includes a second input interface 21A, a second output interface 21B, a second operational amplifier module A221, a second operational amplifier module B222, a second signal separation module 23, and a second distribution module 24;

[0035] The first input interface 11A is connected to the input ends of the first operational amplifier module A121 and the first operational amplifier module B122 respectively; the output end of the first operational amplifier module A121 is connected to a plurality of first video processing modules through the first signal separation module 13 and the first distribution module 14 in sequence; the output end of the first operational amplifier module B122 is connected to the first output interface 11B;

[0036] The input end of the second input interface 21A is connected to the first output interface 11B; the output end of the second input interface 21A is respectively connected to the input ends of the second operational amplifier module A221 and the second operational amplifier module B222; the output end of the second operational amplifier module A221 is connected to a plurality of second video processing modules through the second signal separation module 23 and the second distribution module 24 in sequence; the output end of the second operational amplifier module B222 is connected to the second output interface 21B.

[0037] When implementing it, Figure 3 , Figure 4 , Figure 5 As shown, the first input interface 11A and the first output interface 11B in the first-stage synchronization circuit are both BNC connectors; the model of the first distribution module 14 is CDCLVC1112; the first operational amplifier module A121 and the first operational amplifier module B122 use OPA820 amplifiers; the model of the first signal separation module 13 is EL4511;

[0038] The first input interface 11A includes an interface J21, a capacitor C512, and a resistor R611; the 2nd to 5th pins of the interface J21 are all grounded; the 1st pin of the interface J21 is connected to one end of the capacitor C512, one end of the resistor R611, and the 3rd pin of the amplifier U7; the other end of the capacitor C512 and the other end of the resistor R611 are grounded;

[0039] The first operational amplifier module A121 includes an amplifier U7, a resistor R613, a resistor R614, a resistor R615, a resistor R616, a resistor R618, a resistor R619, a capacitor C513, and a capacitor C514; the third pin of the amplifier U7 in the first operational amplifier module A121 is connected to the first pin of the interface J21 in the first input interface 11A through the resistor R616; the fifth pin of the amplifier U7 is connected to the +5V power supply and one end of the capacitor C513; the other end of the capacitor C513 is grounded; the first pin of the amplifier U7 is connected to the resistor R613 and the first pin of the interface J21 in the first input interface 11A is connected to ... the first end of the capacitor C513; the first pin of the amplifier U7 is connected to the resistor R613 and the first pin of the interface J21 in the first input interface 11A is connected to the resistor R616; the fifth pin of the amplifier U7 is connected to the +5V power supply and the first end of the capacitor C513; the first pin of the amplifier U7 is connected to the resistor R613 and the first pin of the interface J21 in the first input interface 11A is connected to the resistor R616; the fifth pin of the amplifier U7 is connected to the +5V power supply and the first pin of the interface J21 in the first input interface 11A is connected to the resistor R616; the fifth pin of the amplifier U7 is connected to the +5V power supply and the first One end of resistor R618 is connected to one end of resistor R615 and one end of resistor R613; the other end of resistor R618 is connected to one end of resistor R619 and the 10th pin of separator U5 in the first signal separation module 13; the other end of resistor R613 is connected to the connection node of resistor R616 and interface J21; the other end of resistor R615 is connected to the 4th pin of amplifier U7 and one end of resistor R614; the other end of resistor R614 is grounded; the 2nd pin of amplifier U7 is connected to -5V and one end of capacitor C514; the other end of capacitor C514 is grounded;

[0040] The first operational amplifier module B122 includes an amplifier U4, a resistor R605, a resistor R606, a resistor R607, a resistor R608, a capacitor C500, and a capacitor C501; wherein the third pin of the amplifier U4 is connected to the first pin of the interface J21 through the resistor R607; the fourth pin of the amplifier U4 is connected to one end of the resistor R605 and one end of the resistor R606; the other end of the resistor R605 is grounded; the other end of the resistor R606 is connected to the first pin of the amplifier U4, one end of the resistor R608, and the first pin of the first output interface 11B; the other end of the resistor R608 is connected to the connection node between the resistor R607 and the first pin of the interface J21; the second pin of the amplifier U4 is connected to -5V and one end of the capacitor C501; the other end of the capacitor C501 is grounded;

[0041] The first output interface 11B includes an interface J32 and a resistor R617; the 2nd to 5th pins of the interface J32 are grounded; the 1st pin of the interface J32 is connected to one end of the resistor R617 and the 1st pin of the amplifier U4; the other end of the resistor R617 is grounded;

[0042] The first signal separation module 13 includes a separator U5; the 10th pin of the separator U5 is connected to the 1st pin of the amplifier U7 through a capacitor C692 and a resistor R678; the 1st pin of the separator U5 is connected to a resistor R812 and one end of a crystal oscillator; the 24th pin of the separator U5 is connected to a resistor R813 and the other end of the crystal oscillator; the other end of the resistor R812 and the other end of the resistor R813 are connected to one end of the resistor R813 and one end of the resistor R819; the other end of the resistor R818 is connected to the 4th pin of the separator U5; the other end of the resistor R819 is grounded; the 5th pin of the separator is grounded through resistors R817 and R820 in turn; the 21st to 23rd pins of the separator are respectively connected to the first distribution module 14;

[0043] The first distribution module 14 includes a distributor U1, a distributor U2 and a distributor U3; the first pin of the distributor U1 is connected to the 21st pin of the separator U5; the 3rd, 24th, 21st, 23rd, 6th, 19th, 8th, 17th, 16th, 10th, 14th and 12th pins of the distributor U1 are 12 signal output pins for outputting to the video processing module;

[0044] The first pin of the distributor U2 is connected to the 22nd pin of the separator U5; the third, 24th, 21st, 23rd, 6th, 19th, 8th, 17th, 16th, 10th, 14th, and 12th pins of the distributor U2 are 12-way signal output pins for outputting to the video processing module;

[0045] Pin 1 of distributor U3 is connected to pin 23 of separator U5; pins 3, 24, 21, 23, 6, 19, 8, 17, 16, 10, 14, and 12 of distributor U2 are 12 signal output pins for outputting to the video processing module.

[0046] The second input interface 21A, the second output interface 21B, the second operational amplifier module A221, the second operational amplifier module B222, the second signal separation module 23, and the second distribution module 24 in the second-stage synchronization circuit have the same circuit structure as the first-stage synchronization circuit above, and will not be repeated here.

[0047] like Figure 2 As described above, the first input interface 11A of the first-level synchronization circuit is connected to the Genlock synchronization source; the second input interface 21A of the second level and the input interface of the second-level and above synchronization circuits are connected to the output interface of the previous-level synchronization circuit. In specific implementation, the specific parameters of the above capacitors and resistors can be adjusted according to actual use requirements, and will not be repeated here.

[0048] The synchronous circuit structure provided in this embodiment realizes the synchronization and amplification of the video signal, the circuit operational amplifier is stable, and can be widely used in large-screen LED splicing boxes.

[0049] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A synchronous circuit for matrix equipment based on multi-stage operational amplifiers, characterized in that: It includes input interface, output interface, operational amplifier module A, operational amplifier module B, signal separation module and distribution module, among which: The input interface is connected to the input ends of operational amplifier module A and operational amplifier module B respectively; the output end of operational amplifier module A is connected to the distribution module through the signal separation module; the output end of operational amplifier module B is connected to the output interface; the input interface and the output interface are both pluggable structures.

2. The synchronous circuit for matrix equipment based on multi-stage operational amplifier according to claim 1, characterized in that: It includes several levels of synchronization circuits; each of the synchronization circuits is provided with an input interface, an output interface, an operational amplifier module A, an operational amplifier module B, a signal separation module, and a distribution module; The input interface of the first-stage synchronization circuit is connected to the Genlock synchronization source; The input interface of the second-level and above synchronization circuits is connected to the output interface of the previous-level synchronization circuit.

3. The synchronous circuit for matrix equipment based on multi-stage operational amplifier according to claim 2, characterized in that: The operational amplifier module A and the operational amplifier module B adopt OPA820 amplifiers.

4. The synchronous circuit for matrix equipment based on multi-stage operational amplifier according to claim 2, characterized in that: The model of the signal separation module is EL4511.

5. The synchronous circuit for matrix equipment based on multi-stage operational amplifier according to claim 2, characterized in that: The model of the distribution module is CDCLVC1112.

6. The synchronous circuit for matrix equipment based on multi-stage operational amplifier according to claim 2, characterized in that: The input interface and the output interface are both BNC connectors.

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