Low-voltage Zener diode device capable of reducing reverse leakage current

By forming shallow trough isolation and P+ active regions on the N-type epitaxial layer of the low-voltage Zener diode device, migrating the breakdown point and forming a gradient electric field distribution, the problem of high reverse leakage current of the low-voltage Zener diode device is solved, and the problem of low-voltage Zener diode device is reduced Static power consumption.

CN222509866UActive Publication Date: 2025-02-18OUYUE SEMICON (XIAN) CO LTD
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Patent Information

Application Number
CN202420319616.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-02-21
Publication Date
2025-02-18
Estimated Expiration
2034-02-21

AI Technical Summary

Technical Problem

The existing low-voltage Zener diode devices consume a large static power in standby state and have a high reverse leakage current, so the reverse leakage current needs to be reduced.

Method used

By forming shallow groove isolation deep into the N-type buried layer on the N-type epitaxial layer, and forming P+ active region and inverted layer on the N-type epitaxial layer, the peak doping concentration of the P+ active region is far away from the device surface, forming a gradient The electric field distribution migrates the breakdown point, thereby reducing the leakage current on the device surface.

Benefits of technology

It effectively reduces the reverse leakage current of low-voltage Zener diode devices and reduces the static power consumption of the device in standby state.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a low-voltage Zener diode device capable of reducing reverse leakage current, which comprises an N-type substrate, a back metal layer is formed on the bottom surface of the N-type substrate, an N-type buried layer is formed on the top surface of the N-type substrate, and an N-type epitaxial layer is formed on the N-type buried layer; a P + active region and an inversion layer are sequentially formed in the middle of the N-type epitaxial layer from bottom to top, and the upper end face of the inversion layer is flush with the upper end face of the N-type epitaxial layer. A P + protection ring is formed at the edge of the top; shallow trench isolation penetrating into the N-type buried layer is formed around the P + active region and the inversion layer; a dielectric layer is formed on the N-type epitaxial layer, covers the P + protection ring and the shallow trench isolation and is in contact with the edge of the inversion layer; and a front metal layer is formed on the dielectric layer and the inversion layer. Gradient electric field distribution can be formed near the surface of the device, so that breakdown points are migrated from the surface of the device to the position below the surface, surface electric leakage of the device is reduced, and the problem of high reverse leakage current is solved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductor devices, and in particular relates to a low-voltage Zener diode device capable of reducing reverse leakage current. Background Art

[0002] Zener diode, also known as voltage regulator diode, is a diode that uses the reverse breakdown state of PN junction, and its current can vary in a wide range while the voltage remains basically unchanged, to stabilize the voltage. This diode is a semiconductor device with very high resistance until the critical reverse breakdown voltage. At this critical breakdown point, the reverse resistance is reduced to a very small value. In this low resistance area, the current increases while the voltage remains constant. The voltage regulator diode is divided into grades according to the breakdown voltage. Because of this characteristic, the voltage regulator is mainly used as a voltage regulator or voltage reference element. The voltage regulator diode can be connected in series for use at higher voltages, and a higher regulated voltage can be obtained by connecting in series.

[0003] Currently, the voltage of Zener diodes ranges from 1.8V to several hundred volts, but for low-voltage devices (below 5V), the reverse leakage current is relatively large, generally at the microampere level, so that the device still has a large static power consumption in the standby state. Therefore, how to reduce the reverse leakage current of low-voltage Zener diodes becomes the key. Utility Model Content

[0004] In view of the shortcomings of the prior art, the utility model provides a low-voltage Zener diode device that can reduce reverse leakage current. A gradient electric field distribution can be formed near the surface of the device, so that the breakdown point is migrated from the surface of the device to below the surface, thereby reducing the surface leakage of the device and solving the problem of high reverse leakage current.

[0005] In order to achieve the above object, the technical solution of the utility model is:

[0006] A low-voltage Zener diode device capable of reducing reverse leakage current comprises an N-type substrate, a back metal layer is formed on the bottom surface of the N-type substrate, an N-type buried layer is formed on the top surface, and an N-type epitaxial layer is formed on the N-type buried layer;

[0007] A P+ active area and an inversion layer are sequentially formed in the middle of the N-type epitaxial layer from bottom to top, and the upper end surface of the inversion layer is flush with the upper end surface of the N-type epitaxial layer; a P+ protection ring is formed at its top edge; and shallow trench isolation deep into the N-type buried layer is formed around the P+ active area and the inversion layer;

[0008] A dielectric layer is formed on the N-type epitaxial layer, the dielectric layer covers the P+ protection ring and the shallow trench isolation and contacts the edge of the inversion layer; a front metal layer is formed on the dielectric layer and the inversion layer.

[0009] Preferably, the inversion layer and the front metal layer form an anode of the Zener diode; and the N-type substrate and the back metal layer form a cathode of the Zener diode.

[0010] Preferably, the resistivity of the N-type substrate is 0.002-0.004Ω·m.

[0011] Preferably, the thickness of the N-type buried layer is 5 um and the doping concentration is 2e18.

[0012] Preferably, the thickness of the N-type epitaxial layer is 10 um, and the doping concentration is 8e17-1.8e18.

[0013] Preferably, the doping element of the P+ active region is B, and the implantation dose is 2e12-3e13.

[0014] Preferably, the doping element of the inversion layer is P, the implantation dose is 5e11-1e12, and the doping depth is 0.8um-1.2um.

[0015] Preferably, the doping element of the P+ guard ring is B, the implantation dose is 1e11, and the implantation energy is 25keV.

[0016] A low-voltage Zener diode device capable of reducing reverse leakage current comprises a P-type substrate, a back metal layer is formed on the bottom surface of the P-type substrate, a P-type buried layer is formed on the top surface, and a P-type epitaxial layer is formed on the P-type buried layer;

[0017] The middle part of the P-type epitaxial layer is formed with an N+ active area and an inversion layer from bottom to top, and the upper end surface of the inversion layer is flush with the upper end surface of the P-type epitaxial layer; an N+ protection ring is formed at its top edge; and shallow trench isolation deep into the P-type buried layer is formed around the N+ active area and the inversion layer;

[0018] A dielectric layer is formed on the P-type epitaxial layer, the dielectric layer covers the N+ protection ring and the shallow groove isolation, and is in contact with the edge of the inversion layer; a front metal layer is formed on the dielectric layer and the inversion layer.

[0019] Technical effects and advantages of the utility model:

[0020] The utility model provides a low-voltage Zener diode device capable of reducing reverse leakage current. A shallow trench isolation penetrating into an N-type buried layer is formed on an N-type epitaxial layer, thereby replacing PN junction isolation to reduce PN junction leakage current on the device surface. A P+ active region is formed on the N-type epitaxial layer, and an inversion layer is introduced after doping the P+ active region, so that the peak value of the doping concentration of the P+ active region is away from the device surface, the breakdown point migrates, and the device surface leakage current is further reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1It is a cross-sectional structural schematic diagram of embodiment 1 of the utility model;

[0022] Figure 2 It is a schematic cross-sectional structural diagram of Example 2 of the utility model.

[0023] Numbers in the figure: 1, N-type substrate; 2, N-type buried layer; 3, N-type epitaxial layer; 4, P+ active area; 5, inversion layer; 6, P+ guard ring; 7, shallow trench isolation; 8, dielectric layer; 9, front metal layer; 10, back metal layer. DETAILED DESCRIPTION

[0024] The present invention will be further described in detail below with reference to the embodiments given in the accompanying drawings.

[0025] The present application aims to solve the problem that the existing low-voltage Zener diode device still has a large static power consumption in the standby state, and proposes the following technical solution.

[0026] Example 1

[0027] See also Figure 1 As shown, a low-voltage Zener diode device capable of reducing reverse leakage current comprises an N-type substrate 1, a back metal layer 10 is formed on the bottom surface of the N-type substrate 1, an N-type buried layer 2 is formed on the top surface, and an N-type epitaxial layer 3 is formed on the N-type buried layer 2; a P+ active region 4 and an inversion layer 5 are sequentially formed in the middle of the N-type epitaxial layer 3 from bottom to top, and the upper end surface of the inversion layer 5 is flush with the upper end surface of the N-type epitaxial layer 3; a P+ guard ring 6 is formed on the top edge thereof; a shallow trench isolation 7 penetrating into the N-type buried layer 2 is formed around the P+ active region 4 and the inversion layer 5; a dielectric layer 8 is formed on the N-type epitaxial layer 3, the dielectric layer 8 covers the P+ guard ring 6 and the shallow trench isolation 7, and contacts the edge of the inversion layer 5; a front metal layer 9 is formed on the dielectric layer 8 and the inversion layer 5.

[0028] The present application forms a shallow trench isolation 7 that penetrates into the N-type buried layer 2 on the N-type epitaxial layer 3, thereby replacing the PN junction isolation to reduce the PN junction leakage current on the device surface; forms a P+ active area 4 on the N-type epitaxial layer 3, and introduces an inversion layer 5 after doping the P+ active area 4, so that the peak value of the doping concentration of the P+ active area 4 is far away from the device surface, and a gradient electric field distribution is formed near the device surface, so that the breakdown point migrates from the device surface to below the surface, thereby reducing the surface leakage of the device, thereby solving the problem of high reverse leakage current of the low-voltage Zener diode device.

[0029] In a specific implementation, the inversion layer 5 and the front metal layer 9 form the anode of the Zener diode; the N-type substrate 1 and the back metal layer 10 form the cathode of the Zener diode.

[0030] Furthermore, the resistivity of the N-type substrate 1 is 0.002-0.004 Ω·m.

[0031] Furthermore, the thickness of the N-type buried layer 2 is 5 um, and the doping concentration is 2e18.

[0032] Furthermore, the thickness of the N-type epitaxial layer 3 is 10 um, and the doping concentration is 8e17-1.8e18.

[0033] Furthermore, the doping element of the P+ active region 4 is B, and the implantation dose is 2e12-3e13.

[0034] Furthermore, the doping element of the inversion layer 5 is P, the implantation dose is 5e11-1e12, and the doping depth is 0.8um-1.2um.

[0035] Furthermore, the doping element of the P+ guard ring 6 is B, the implantation dose is 1e11, and the implantation energy is 25keV.

[0036] The preparation method of the Zener diode proposed in this application is as follows:

[0037] 1) First, select an N-type substrate with a resistivity of 0.002 to 0.004 Ω·m;

[0038] 2) An N-type buried layer (Nbu) is formed on the N-type substrate by epitaxy, the N-type buried layer has a thickness of 5um and a doping concentration of 2e18, and an N-type epitaxial layer (Nepi) is further formed on the N-type buried layer, the N-type epitaxial layer has a thickness of 10um and a doping concentration between 8e17 and 1.8e18;

[0039] 3) forming a P+ active region as the anode of the device by photolithography and ion implantation on the structure described in 2), doping element B, implantation dose 2e12-3e13, annealing temperature 1100° C.; forming an inversion layer on the P+ active region by ion implantation, doping element P, implantation dose 5e11-1e12, doping depth 0.8um-1.2um, annealing temperature 1150° C.;

[0040] 4) forming shallow trench isolation (STI) by dry etching, wherein the depth of the annular STI is greater than the thickness of the N-type epitaxial layer, and the inner diameter of the annular STI is equal to the width of the P+ region of the mask during P+ implantation;

[0041] 5) Further, a P+ guard ring is formed by ion implantation and annealing. The guard ring is located at the edge of the device. The doping element of the P+ guard ring is B, the implantation dose is 1e11, the implantation energy is 25keV, and the impurities are activated by rapid thermal treatment annealing at a temperature of 1150°C for 25s.

[0042] 6) Form contact holes by photolithography and deposit metal Al with a thickness of 3um;

[0043] 7) Reverse-etching metal Al to form the anode of the Zener diode. Al must be pressed on the guard ring. The field plate structure expands the depletion region, reduces the surface electric field, and further reduces the surface leakage current.

[0044] 8) Back side thinning and cleaning of metallization (TiNiAg) forms the cathode of the Zener diode.

[0045] Example 2

[0046] The low voltage Zener diode proposed in this application can also be changed into the following structure:

[0047] By selecting a P-type substrate (Psub), growing a P-type buried layer (Pbu) and a P-type epitaxial layer (Pepi), a P-type material is formed, N-type impurities are doped on the material to form an N+ active area and an N+ guard ring, and P-type impurities are injected into the N+ active area to form an inversion layer, and finally a Zener diode with an anode on the front and a cathode on the back is formed.

[0048] Specifically, a back metal layer is formed on the bottom surface of the P-type substrate, a P-type buried layer is formed on the top surface, and a P-type epitaxial layer is formed on the P-type buried layer; an N+ active area and an inversion layer are formed in sequence from bottom to top in the middle of the P-type epitaxial layer, and the upper end surface of the inversion layer is flush with the upper end surface of the P-type epitaxial layer; an N+ guard ring is formed on its top edge; a shallow trench isolation is formed around the N+ active area and the inversion layer and penetrates into the P-type buried layer; a dielectric layer is formed on the P-type epitaxial layer, the dielectric layer covers the N+ guard ring and the shallow trench isolation, and is in contact with the edge of the inversion layer; a front metal layer is formed on the dielectric layer and the inversion layer.

[0049] The low voltage Zener diode of this structure is prepared as follows:

[0050] 1) First, select a P-type substrate with a resistivity of 0.001 to 0.005 Ω·m;

[0051] 2) A P-type buried layer (Pbu) is formed on the P-type substrate by epitaxy, the thickness of the P-type buried layer is 5um, and the doping concentration is 2e18. A P-type epitaxial layer (Pepi) is further formed on the P-type buried layer, the thickness of the P-type epitaxial layer is 10um, and the doping concentration is between 8e17 and 1.8e18;

[0052] 3) On the structure described in 2), an N+ active region is formed by photolithography and ion implantation as the anode of the device, doped with element P, with an implantation dose of 2e12-3e13, and an annealing temperature of 1100° C.; an inversion layer is formed on the N+ active region by ion implantation, doped with element B, with an implantation dose of 5e11-1e12, a doping depth of 0.8um-1.2um, and an annealing temperature of 1150° C.;

[0053] 4) forming shallow trench isolation (STI) by dry etching, wherein the depth of the annular STI is greater than the thickness of the P-type epitaxial layer, and the inner diameter of the annular STI is equal to the width of the N+ region of the mask during N+ implantation;

[0054] 5) Further, an N+ guard ring is formed by ion implantation and annealing. The guard ring is located at the edge of the device. The doping element of the N+ guard ring is P, the implantation dose is 1e11, the implantation energy is 15keV, and the impurities are activated by rapid thermal treatment annealing at a temperature of 1150°C for 15s.

[0055] 6) Form contact holes by photolithography and deposit metal Al with a thickness of 3um;

[0056] 7) Reverse-etching metal Al to form the anode of the Zener diode. Al must be pressed on the guard ring. The field plate structure expands the depletion region, reduces the surface electric field, and further reduces the surface leakage current.

[0057] 8) Back side thinning and cleaning of metallization (TiNiAg) forms the cathode of the Zener diode.

[0058] The above is only a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present invention, and these modifications and improvements all fall within the protection scope of the present invention.

Claims

1. A low voltage Zener diode device capable of reducing reverse leakage current, characterized in that: It comprises an N-type substrate (1), a back metal layer (10) is formed on the bottom surface of the N-type substrate (1), an N-type buried layer (2) is formed on the top surface, and an N-type epitaxial layer (3) is formed on the N-type buried layer (2); A P+ active region (4) and an inversion layer (5) are sequentially formed in the middle of the N-type epitaxial layer (3) from bottom to top, and the upper end surface of the inversion layer (5) is flush with the upper end surface of the N-type epitaxial layer (3); a P+ protection ring (6) is formed on the top edge thereof; and a shallow trench isolation (7) is formed around the P+ active region (4) and the inversion layer (5) and extends deep into the N-type buried layer (2); A dielectric layer (8) is formed on the N-type epitaxial layer (3), the dielectric layer (8) covers the P+ protection ring (6) and the shallow trench isolation (7), and is in contact with the edge of the inversion layer (5); a front metal layer (9) is formed on the dielectric layer (8) and the inversion layer (5).

2. A low voltage Zener diode device capable of reducing reverse leakage current according to claim 1, characterized in that: The inversion layer (5) and the front metal layer (9) form the anode of the Zener diode; the N-type substrate (1) and the back metal layer (10) form the cathode of the Zener diode.

3. A low voltage Zener diode device capable of reducing reverse leakage current according to claim 2, characterized in that: The resistivity of the N-type substrate (1) is 0.002-0.004Ω·m.

4. A low voltage Zener diode device capable of reducing reverse leakage current as claimed in any one of claims 1 to 3, characterized in that: It comprises a P-type substrate, a back metal layer is formed on the bottom surface of the P-type substrate, a P-type buried layer is formed on the top surface, and a P-type epitaxial layer is formed on the P-type buried layer; The middle part of the P-type epitaxial layer is formed with an N+ active area and an inversion layer from bottom to top, and the upper end surface of the inversion layer is flush with the upper end surface of the P-type epitaxial layer; an N+ protection ring is formed at its top edge; and shallow trench isolation deep into the P-type buried layer is formed around the N+ active area and the inversion layer; A dielectric layer is formed on the P-type epitaxial layer, the dielectric layer covers the N+ protection ring and the shallow groove isolation, and is in contact with the edge of the inversion layer; a front metal layer is formed on the dielectric layer and the inversion layer.