Edge ring and semiconductor process device
By designing different structures of inner and outer edge ring widths of edge rings and adjusting the width of the purge channel, the problem of uneven etching amount in the ALC process is solved, and the uniformity of the reaction gas concentration and the uniform treatment surface of the wafer to be processed are achieved.
Patent Information
- Application Number
- CN202420433738.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-06
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2034-03-06
AI Technical Summary
In the ALC process, the concentration of the etching gas in the reaction chamber is diluted, resulting in uneven etching amounts, affecting the overall uniformity of the wafer.
A kind of edge ring is designed, with different widths of inner and outer edge rings, forming a purge channel width at different locations, thereby adjusting the exhaust rate and ensuring uniform concentration of the reaction gas.
By adjusting the width of the purge channel between the edge ring and the pump ring, uniformity of the reaction gas concentration is achieved and the treatment surface uniformity of the wafer to be processed is improved.
Smart Images
Figure CN222530409U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of semiconductor equipment, in particular to an edge ring and a semiconductor process device. Background Art
[0002] With the development of higher process technology in the semiconductor industry, EPI (Epitaxy) has been applied to process technology of 28nm and below. RPCVD (Reduced Pressure Chemical Vapor Deposition) in the EPI process increases electron-hole pairs by promoting the doping of boron and phosphorus, thereby improving the carrier migration rate to meet performance requirements. Before the RPCVD process is carried out, the ALC (Atomic Layer Clean) process is required. The ALC process uses high-frequency energy to excite and generate plasma to remove oxides on the surface of the silicon wafer. HF and NH3 are used as etching gases to react with the oxide silicon dioxide on the surface of the silicon wafer to generate a white solid product (NH4). 2 SiF6 is then heated to sublime the product, thereby achieving the purpose of removing oxides on the surface of the silicon substrate.
[0003] However, during the etching process of the wafer in the ALC reaction chamber, the exhaust gas is slow at the end of the wafer far from the exhaust pump, which easily accumulates the gas to be exhausted, causing the etching gas concentration in this area to be diluted. The etching amount is small, thus affecting the uniformity of the ALC etching amount. The uniformity of the ALC etching amount will have a greater impact on the overall uniformity of the wafer, which can easily cause product defects.
[0004] Therefore, there is an urgent need for a new semiconductor process device that can improve the etching amount uniformity of the ALC etching process.
[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology part of the present application. Utility Model Content
[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide an edge ring and a semiconductor process device, which are used to solve the problem of uneven etching amount in the semiconductor etching process in the prior art.
[0007] In order to achieve the above purpose, the utility model provides the following technical solutions:
[0008] In a first aspect, the utility model provides an edge ring, wherein the inner edge of the edge ring is a circular opening, the circular opening is used to place a base, and the center point of the inner edge of the edge ring is a first center point; the ring width of the edge ring at the first end is smaller than the ring width of the edge ring at the second end, the first end and the second end are respectively located on opposite sides of the inner edge of the edge ring, the line between the first end and the second end is a first line, and the first line is parallel to the plane where the edge ring is located and passes through the first center point.
[0009] Optionally, the outer edge of the edge ring is circular, and the center point of the outer edge of the edge ring is the second center point; the first center point and the second center point are both on the straight line where the first connecting line is located, and the intersection of the straight line where the first connecting line is located and the inner edge of the edge ring close to the first end is the first intersection, and the distance between the first center point and the first intersection is smaller than the distance between the second center point and the first intersection.
[0010] Optionally, the line between the two points where the straight line where the first line is located intersects with the outer edge of the edge ring is the second line, and the intersection point between the perpendicular bisector of the second line and the second line is the second center point; the first center point and the second center point are both on the straight line where the first line is located, and the intersection point between the straight line where the first line is located and the inner edge of the edge ring close to the first end is the first intersection point, and the distance between the first center point and the first intersection point is smaller than the distance between the second center point and the first intersection point; the line between the two points where the perpendicular bisector of the second line intersects with the outer edge of the edge ring is the third line, and the length of the second line is greater than the length of the third line.
[0011] In a second aspect, the utility model provides a semiconductor process device, the semiconductor process device comprises any one of the edge rings described above, and the semiconductor process device further comprises a pump ring;
[0012] The pump ring is an annular side wall surrounding the edge ring, and a purge channel is formed between the outer edge of the edge ring and the inner edge of the side wall of the pump ring. The width of the purge channel near the first end of the edge ring is greater than the width of the purge channel near the second end of the edge ring.
[0013] Optionally, the inner edge of the side wall of the pump ring is circular; the center point of the inner edge of the side wall of the pump ring is the third center point, the third center point and the first center point are on the straight line where the first connecting line is located, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring close to the second end is the second intersection point, and the distance between the third center point and the second intersection point is greater than or equal to the distance between the first center point and the second intersection point.
[0014] Optionally, the line between the two points where the straight line where the first line is located intersects the inner edge of the side wall of the pump ring is the fourth line, the line between the two points where the perpendicular bisector of the fourth line intersects the inner edge of the side wall of the pump ring is the fifth line, and the length of the fourth line is not equal to the length of the fifth line.
[0015] Optionally, the semiconductor process device further includes an exhaust pump, the pump ring is provided with an exhaust hole, the exhaust hole is communicated with the exhaust pump, and the exhaust pump is located outside the pump ring on one side close to the first end.
[0016] In a third aspect, the utility model provides a semiconductor process device, the semiconductor process device comprising a base, an edge ring, and a pump ring;
[0017] The inner edge of the edge ring is a circular opening, the circular opening is used to place the base, the outer edge of the base is circular, the center point of the inner edge of the edge ring is a first center point, the center point of the outer edge of the edge ring is a second center point, and the first center point coincides with the second center point;
[0018] The pump ring is an annular side wall surrounding the edge ring, and a purge channel is formed between the outer edge of the edge ring and the inner edge of the side wall of the pump ring. The width of the purge channel near the first end of the edge ring is greater than the width of the purge channel near the second end of the edge ring. The first end and the second end are respectively located on opposite sides of the inner edge of the edge ring. The line between the first end and the second end is a first line, and the first line is parallel to the plane where the edge ring is located and passes through the first center point.
[0019] Optionally, the inner edge of the side wall of the pump ring is circular, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring close to the second end is the second intersection, the center point of the inner edge of the side wall of the pump ring is the third center point, and the distance between the third center point and the second intersection is greater than the distance between the first center point and the second intersection.
[0020] Optionally, the line between the two points where the straight line where the first line is located intersects with the inner edge of the side wall of the pump ring is the fourth line, the line between the two points where the perpendicular bisector of the fourth line intersects with the inner edge of the side wall of the pump ring is the fifth line, and the length of the fourth line is greater than the length of the fifth line; the intersection of the straight line where the first line is located and the outer edge of the edge ring close to the second end is the second intersection, and the distance between the midpoint of the fourth line and the second intersection is greater than the distance between the first center point and the second intersection.
[0021] Optionally, the semiconductor process device further includes an exhaust pump, the pump ring is provided with an exhaust hole, the exhaust hole is communicated with the exhaust pump, and the exhaust pump is located outside the pump ring on one side close to the first end.
[0022] As described above, the edge ring and semiconductor process device of the present invention have the following beneficial effects:
[0023] The utility model sets the edge ring to have different ring widths at the first and second ends relative to each other, so that the widths of the purge channels for air intake near the first and second ends of the edge ring can be different, so that the exhaust rates at different positions of the edge ring can be adjusted, so that the concentrations of the reaction gases at different positions are close, and the reaction rates tend to be consistent, thereby improving the uniformity of the processed surface obtained after the wafer to be processed reacts on the base;
[0024] The utility model realizes the feature that the edge ring has different ring widths at the first end and the second end by setting the outer edge of the edge ring to be a circle eccentric to the inner edge of the edge ring. This solution can be realized by simply adjusting the eccentricity of the center of the inner edge and the outer edge of the edge ring. The improvement method is simple, convenient and easy to implement.
[0025] The utility model sets the outer edge of the edge ring to be in a shape where the second connecting line is greater than or equal to the third connecting line, thereby reducing the influence of the ring width at other positions except the first end and the second end as much as possible when changing the ring width distribution of the first end and the second end, thereby maximizing the overall reaction rate;
[0026] The utility model makes the purge channel between the edge ring and the pump ring have different widths at the first end and the second end, thereby realizing the adjustment of the air intake speed at different positions of the edge ring, so as to ensure the uniform concentration of the reaction gas at each position of the edge ring, and realize that the edge of the wafer to be processed on the base at each position can obtain a uniform and consistent processing surface;
[0027] The utility model realizes flexible adjustment of the width of the purge channel by setting the pump ring to be a circular setting eccentric to the inner edge of the edge ring and coordinating the ring width setting of the edge ring, and it is easier to realize accurate adjustment of the width of the purge channel, so as to further improve the uniformity of the reaction surface of the wafer to be processed;
[0028] The utility model sets the pump ring to a shape in which the fourth connecting line and the fifth connecting line are of unequal lengths, thereby making it easier to adjust the width of the purge channel, improving the adjustment flexibility and adjustable range, and being conducive to further improving the uniformity of the treated surface;
[0029] The utility model can achieve uniformity of reaction rate of the wafer to be processed at each position of the edge ring by adjusting the width of the purge channel without adjusting the edge ring, so that a uniform processing surface can be obtained on the wafer to be processed after the reaction;
[0030] The utility model sets the pump ring to be a circular shape eccentric to the edge ring, and can adjust the width of the purge channel by adjusting the position of the pump ring without changing the shape of the pump ring. The improvement scheme is simple and easy to promote.
[0031] The utility model adjusts the width of the purge channel by setting the shape of the pump ring so that the fourth connecting line is longer than the fifth connecting line, thereby achieving more precise adjustment of the width of the purge channel to achieve higher uniformity of the processed surface obtained after the reaction of the wafer to be processed. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 Shown is a schematic top view of the edge ring in Example 1 of the utility model.
[0033] Figure 2 Shown is a schematic top view of the edge ring in Example 2 of the present invention.
[0034] Figure 3 Shown is a schematic top view of a semiconductor process device in Example 3 of the present utility model.
[0035] Figure 4 Shown is a schematic side cross-sectional view of a semiconductor process device in Example 3 of the present utility model.
[0036] Figure 5 The diagram shows a schematic top view of a semiconductor process device in the prior art.
[0037] Figure 6 The figure shows a schematic side cross-sectional view of a semiconductor process device in the prior art.
[0038] Figure 7 Shown is a critical dimension hot spot diagram of a wafer to be processed after being processed by a semiconductor process device in the prior art.
[0039] Figure 8 Shown is a schematic top view of a semiconductor process device in Example 4 of the present utility model.
[0040] Fig. 9 Shown is a schematic top view of a semiconductor process device in Example 5 of the present utility model.
[0041] Fig.10 Shown is a schematic top view of a semiconductor process device in Example 6 of the present utility model.
[0042] Description of Reference Numerals
[0043] 10. Base; 11. Support structure; 12. Wafer to be processed; 13. Hot spot area; 20. Edge ring; 22. Second connection line; 23. Third connection line; 31. Purge channel; 32. Purge gas; 40. Gas spray surface; 41. Reactive gas; 42. Byproduct gas; 50. Pump ring; 51. Exhaust hole; 52. Fourth connection line; 53. Fifth connection line; 60. Exhaust pump; 70. Existing edge ring;
[0044] O1, first center point; O2, second center point; O3, third center point; O4, fourth center point. DETAILED DESCRIPTION
[0045] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0046] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.
[0047] For convenience of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings.
[0048] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0049] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complicated.
[0050] Embodiment 1:
[0051] like Figure 1 As shown, this embodiment provides an edge ring 20, the inner edge of the edge ring 20 is a circular opening, the circular opening is used to place the base 10, and the center point of the inner edge of the edge ring 20 is the first center point O1; the ring width of the edge ring 20 at the first end is smaller than the ring width of the edge ring 20 at the second end, the first end and the second end are respectively located on opposite sides of the inner edge of the edge ring 20, the line between the first end and the second end is the first line, and the first line is parallel to the plane where the edge ring 20 is located and passes through the first center point O1.
[0052] In the prior art, when performing the ALC (atomic layer cleaning) process, the inner and outer edges of the edge ring 20 are often concentrically symmetrical structures, so the pipes used for exhaust around the edge ring 20 are generally of uniform size; and the exhaust pump used for exhaust is often located only on one side of the edge ring 20, resulting in a slower exhaust rate on the side of the edge ring 20 away from the exhaust pump, the concentration of the reaction gas at this location is diluted, and the reaction rate at this location is reduced, resulting in poor uniformity of the processed surface obtained after the wafer 12 to be processed reacts on the base 10.
[0053] The utility model sets the edge ring 20 to have different ring widths at the first and second ends relative to each other, so that the widths of the purge channel 31 for air intake near the first and second ends of the edge ring 20 can be different, so that the exhaust rate at different positions of the edge ring 20 can be adjusted, so that the concentration of the reaction gas at different positions is close and the reaction rate tends to be consistent, thereby improving the uniformity of the processed surface obtained after the wafer 12 to be processed reacts on the base 10.
[0054] In one embodiment, Figure 1 As shown, the outer edge of the edge ring 20 is circular, and the center point of the outer edge of the edge ring 20 is the second center point O2; the first center point O1 and the second center point O2 are both on the straight line where the first connecting line is located, and the intersection of the straight line where the first connecting line is located and the inner edge of the edge ring 20 close to the first end is the first intersection, and the distance between the first center point O1 and the first intersection is smaller than the distance between the second center point O2 and the first intersection.
[0055] The utility model realizes the characteristic that the edge ring 20 has different ring widths at the first end and the second end by setting the outer edge of the edge ring 20 to be a circle eccentric to the inner edge. This solution can be realized by only adjusting the eccentricity of the center of the circle of the inner edge and the outer edge of the edge ring 20. The improvement method is simple, convenient and easy to implement.
[0056] Embodiment 2:
[0057] This embodiment provides an edge ring 20, which is substantially the same as that of the embodiment 1, except that:
[0058] like Figure 2 As shown, the line between the two points where the straight line where the first line is located intersects with the outer edge of the edge ring 20 is the second line 22, and the intersection point between the perpendicular bisector of the second line 22 and the second line 22 is the second center point O2; the first center point O1 and the second center point O2 are both on the straight line where the first line is located, and the intersection point between the straight line where the first line is located and the inner edge of the edge ring 20 close to the first end is the first intersection point, and the distance between the first center point O1 and the first intersection point is smaller than the distance between the second center point O2 and the first intersection point; the line between the two points where the perpendicular bisector of the second line 22 intersects with the outer edge of the edge ring 20 is the third line 23, and the length of the second line 22 is greater than the length of the third line 23.
[0059] The utility model sets the outer edge of the edge ring 20 to a shape in which the second connecting line 22 is greater than or equal to the third connecting line 23, thereby achieving the effect of the ring width at other positions except the first end and the second end being reduced as much as possible when changing the ring width distribution of the first end and the second end, thereby maximizing the overall reaction rate.
[0060] In one embodiment, the length of the third connecting line 23 is equal to the outer edge diameter of the base 10 .
[0061] The utility model sets the length of the third connection line 23 so that the edge ring 20 affects the reaction rate on the wafer 12 to be processed as little as possible, thereby achieving the maximum exhaust rate. The reaction rate can be maximized in coordination with the introduction rate of the reaction gas 41.
[0062] Embodiment 3:
[0063] This embodiment provides a semiconductor process device, the semiconductor process device includes the edge ring 20 described in any one of embodiments 1-2, and the semiconductor process device also includes a pump ring 50;
[0064] The pump ring 50 is an annular side wall surrounding the edge ring 20 , and a purge channel 31 is formed between the outer edge of the edge ring 20 and the inner edge of the side wall of the pump ring 50 , and the width of the purge channel 31 near the first end of the edge ring 20 is greater than the width of the purge channel 31 near the second end of the edge ring 20 .
[0065] The utility model uses the edge ring 20 in Examples 1-2 so that the width of the purge channel 31 between the edge ring 20 and the pump ring 50 is different at the first end and the second end, thereby adjusting the air intake speed at different positions of the edge ring 20 to ensure that the concentration of the reaction gas 41 at each position of the edge ring 20 is uniform, so that the wafer 12 to be processed on the base 10 can obtain a uniform and consistent processing surface at the edge of each position.
[0066] In one embodiment, Figure 3-Figure 4 As shown, Figure 3 A top view of a semiconductor process device. Figure 4 It is a side sectional view of a semiconductor process device, the inner edge of the side wall of the pump ring 50 is circular; the center point of the inner edge of the side wall of the pump ring 50 is a third center point O3, the third center point O3 and the first center point O1 are on the straight line where the first connecting line is located, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring 20 close to the second end is the second intersection, and the distance between the third center point O3 and the second intersection is greater than or equal to the distance between the first center point O1 and the second intersection.
[0067] In one embodiment, Figure 3-Figure 4 As shown, the semiconductor process device further includes an exhaust pump 60 , the pump ring 50 is provided with an exhaust hole 51 , the exhaust hole 51 is connected to the exhaust pump 60 , and the exhaust pump 60 is located outside the pump ring 50 on one side close to the first end.
[0068] Specifically, Figure 3 As shown, the center point of the base 10 and the center point of the inner edge of the edge ring 20 coincide with the first center point O1, the center point of the outer edge of the edge ring 20 is the second center point O2, the center point of the inner edge of the side wall of the pump ring 50 is the third center point O3, and the center point of the exhaust pump 60 is the fourth center point O4. The first center point O1, the second center point O2, the third center point O3, and the fourth center point O4 are on the same straight line, and the distance between the projection of the fourth center point O4 on the first plane and the projection of the first center point O1 on the first plane is less than the distance between the projection of the fourth center point O4 and the projection of the first center point O1 on the first plane. The distance between the projection of the fourth center point O4 on the first plane and the projection of the second center point O2 on the first plane, and the distance between the projection of the fourth center point O4 on the first plane and the projection of the third center point O3 on the first plane are smaller than the distance between the projection of the third center point O3 on the first plane and the projection of the second center point O2 on the first plane. The different widths of the purge channel 31 at the first end and the second end of the edge ring 20 are achieved by the center eccentricity of the inner and outer edges of the edge ring 20 in coordination with the center eccentricity of the pump ring 50 and the outer edge of the edge ring 20.
[0069] In one embodiment, the positions of the pedestal 10 and the exhaust hole 51 on the pump ring 50 overlap in the direction of the central axis of the pedestal 10, so that the pedestal 10 and the exhaust hole 51 are flush, and the wafer 12 to be processed on the pedestal 10 is higher than the height of the exhaust hole 51, so as to avoid the reaction gas 41 being directly discharged from the exhaust hole 51 without reaction during the reaction process, resulting in waste of the reaction gas 41 and a reduction in the reaction rate, so as to improve the reaction efficiency. Specifically, the positional relationship between the pedestal 10 and the exhaust hole 51 can also be reasonably set according to needs.
[0070] In one embodiment, Figure 3-Figure 4 As shown, the semiconductor process device further includes a gas spraying surface 40 , the upper surface of the pump ring 50 is connected to the edge of the gas spraying surface 40 , and the gas spraying surface 40 is used to spray the reaction gas 41 .
[0071] In the prior art, such as Figure 5-Figure 6 FIG. 1 shows a top view and a side view of a semiconductor process device in the prior art. When performing an ALC (atomic layer cleaning) process, a gas spray surface 40 sprays a reaction gas 41 downward. An exhaust pump 60 discharges a byproduct gas 42 generated after the reaction through an exhaust hole 51 on a pump ring 50 surrounding an existing edge ring 2070. In the prior art, the existing edge ring 2070 and the base 10 are often concentric circles with the pump ring 50. Figure 5 As shown, the center point of the inner edge of the existing edge ring 2070 is the first center point O1, and the center point of the outer edge of the existing edge ring 2070 is the second center point O2. The first center point O1 coincides with the second center point O2, and the exhaust pump 60 is only located on one side of the base 10, which results in a slower exhaust rate on the side of the base 10 away from the exhaust pump 60, while the purge channel 31 below the base 10 always has new purge gas 32 blowing upward to the surface of the base 10, which results in the concentration of the reaction gas 41 used for ALC on the side of the base 10 away from the exhaust pump 60 being diluted. The reduction in the concentration of the reaction gas 41 will cause the etching rate of ALC to decrease. Therefore, the ALC etching amount of the wafer 12 to be processed placed on the base 10 on the side away from the exhaust pump 60 is smaller than that on the side close to the exhaust pump 60, resulting in poor uniformity of the etching amount of the entire surface of the wafer 12 to be processed in the ALC process. Specifically, as Figure 7What is shown is a hot spot diagram of the critical dimension deviation of the processed wafer 12 obtained in the prior art. The left side of the processed wafer 12 is close to the exhaust pump 60, and the right side is far away from the exhaust pump 60. The darker the grayscale, the greater the critical dimension deviation. The value at each position represents the critical dimension obtained at that position. "+" represents that the critical dimension obtained is larger than the target critical dimension, and "-" represents that the critical dimension obtained is smaller than the target critical dimension. It can be seen that the etching amount in the hot spot area on the right side of the processed wafer 12 away from the exhaust pump 60 is generally lower than the target critical dimension.
[0072] The utility model sets the pump ring 50 to be a circle eccentric to the base 10, cooperates with the setting of the edge ring 20 in Examples 1-2, and adjusts the width of the purge channel 31 formed between the pump ring 50 and the edge ring 20, so that the purge channel 31 on the side of the edge ring 20 away from the exhaust pump 60 is narrower than the purge channel 31 on the side of the edge ring 20 close to the exhaust pump 60, so that the intake rate and exhaust rate on the side of the base 10 away from the exhaust pump 60 are matched, so as to improve the uniformity of the overall etching amount of the wafer 12 to be processed; the eccentric position setting of the pump ring 50 is used in combination with the ring width setting of the edge ring 20 to realize flexible adjustment of the width of the purge channel 31, and it is easier to realize precise adjustment of the width of the purge channel 31, so as to further improve the uniformity of the reaction surface of the wafer 12 to be processed.
[0073] In one embodiment, a supporting structure 11 is fixed on the base 10 .
[0074] The utility model arranges a support structure 11 on a base 10, and arranges a wafer 12 to be processed on the support structure 11, so that the support structure 11 is arranged between the wafer 12 to be processed and the base 10, thereby preventing the wafer 12 to be processed from directly contacting the base 10 which is usually metal, thereby avoiding the problem of scratches caused by the contact between the surface of the wafer 12 to be processed and the base 10, and improving the yield of the wafer 12 to be processed.
[0075] In one embodiment, Figure 3-Figure 4 As shown, the support structure 11 is a sapphire ball head.
[0076] In one embodiment, a lifting mechanism is disposed under the base 10 , and the lifting mechanism can move the base 10 up and down along the central axis of the base 10 .
[0077] The base 10 of the utility model can be moved up and down, so that the external wafer 12 to be processed is placed downward on the base 10, and then moved upward to a position close to the gas spraying surface 40, so as to facilitate the processing of the wafer 12 to be processed.
[0078] In one embodiment, a ventilation pipe is provided under the base 10 , and the ventilation pipe can be introduced with a purge gas 32 through the purge channel 31 . The purge gas 32 includes one or any combination of nitrogen, hydrogen or inert gas.
[0079] In the utility model, a purge gas 32 for purging is introduced into the ventilation pipe, which does not participate in the reaction, but is only used for upward purge so that the reaction gas 41 sprayed downward from the gas spray surface 40 cannot diffuse downward to the bottom of the substrate, thereby reducing damage to the substrate and increasing the life of the substrate. At the same time, a surface airflow layer is formed on the side wall of the pump ring 50 to prevent the reaction gas 41 sprayed from the gas spray surface 40 from being discharged from the ventilation hole before the reaction occurs, thereby increasing the utilization rate of the reaction gas 41 and reducing the waste of the reaction gas 41.
[0080] In one embodiment, the ventilation pipe may also be fed with reaction gas 41 for reaction to react with the reaction gas 41 fed into the gas spraying surface 40 .
[0081] In one embodiment, the gas spraying surface 40 can spray reaction gas 41 .
[0082] In one embodiment, the semiconductor processing device is an atomic layer cleaning apparatus.
[0083] The utility model uses the semiconductor process device in an atomic layer cleaning device, and controls the etching rate of the wafer 12 to be processed on the side away from the exhaust pump 60 to match the etching rate on the side close to the exhaust pump 60, thereby achieving uniformity in the etching amount of the wafer 12 to be processed, thereby improving the yield of the wafer 12 to be processed.
[0084] In one embodiment, the semiconductor process equipment is a chemical vapor deposition device.
[0085] The utility model uses the semiconductor process device in chemical vapor deposition equipment, and controls the deposition rate of the wafer 12 to be processed on the side away from the exhaust pump 60 to match the deposition rate on the side close to the exhaust pump 60, so as to achieve uniformity of the deposition amount on the surface of the wafer 12 to be processed, so as to improve the yield of the wafer 12 to be processed.
[0086] Specifically, the utility model can be applied to any semiconductor process equipment that is provided with a top gas spray surface 40 and discharges reaction gas 41 to solve the problem of different reaction rates caused by different exhaust rates due to different distances between the exhaust pump 60 and the exhaust hole 51 at different positions.
[0087] Embodiment 4:
[0088] This embodiment provides a semiconductor process device, which is basically the same as that of Embodiment 3, except that:
[0089] like Figure 8 As shown, the line between the two points where the straight line where the first line is located intersects the inner edge of the side wall of the pump ring 50 is the fourth line 52, and the line between the two points where the perpendicular bisector of the fourth line 52 intersects the inner edge of the side wall of the pump ring 50 is the fifth line 53, and the length of the fourth line 52 is not equal to the length of the fifth line 53.
[0090] In one embodiment, the length of the fourth connection line 52 is smaller than the length of the fifth connection line 53 .
[0091] In one embodiment, Figure 8 As shown, the length of the fourth connection line 52 is greater than the length of the fifth connection line 53 .
[0092] The utility model sets the pump ring 50 to a shape in which the fourth connecting line 52 and the fifth connecting line 53 are of unequal lengths, thereby making it easier to adjust the width of the purge channel 31, improving the adjustment flexibility and adjustable range, and being conducive to further improving the uniformity of the treated surface.
[0093] Embodiment 5:
[0094] This embodiment provides a semiconductor process device, and other features of the semiconductor process device are basically the same as those in Embodiment 3, except that:
[0095] The semiconductor process device comprises a base 10, an edge ring 20, and a pump ring 50;
[0096] The inner edge of the edge ring 20 is a circular opening, and the circular opening is used to place the base 10. The outer edge of the base 10 is circular. The center point of the inner edge of the edge ring 20 is a first center point O1, and the center point of the outer edge of the edge ring 20 is a second center point O2. The first center point O1 coincides with the second center point O2.
[0097] The pump ring 50 is an annular side wall surrounding the edge ring 20, and a purge channel 31 is formed between the outer edge of the edge ring 20 and the inner edge of the side wall of the pump ring 50. The width of the purge channel 31 near the first end of the edge ring 20 is greater than the width of the purge channel 31 near the second end of the edge ring 20. The first end and the second end are respectively located on opposite sides of the inner edge of the edge ring 20. The connecting line between the first end and the second end is a first connecting line, which is parallel to the plane where the edge ring 20 is located and passes through the first center point O1.
[0098] The utility model can achieve uniform reaction rate of the wafer 12 to be processed at each position of the edge ring 20 by adjusting the width of the purge channel 31 without adjusting the edge ring 20, so that a uniform processing surface can be obtained on the wafer 12 to be processed after the reaction.
[0099] In one embodiment, Fig. 9 As shown, the semiconductor process device further includes an exhaust pump 60, the pump ring 50 is provided with an exhaust hole 51, the exhaust hole 51 is connected to the exhaust pump 60, and the exhaust pump 60 is located on the side of the pump ring 50 near the first end. Specifically, the center point of the inner edge of the edge ring 20 is the first center point O1, the center point of the outer edge of the edge ring 20 is the second center point O2, the center point of the inner edge of the side wall of the pump ring 50 is the fourth center point O4, the center point of the exhaust pump 60 is the fourth center point O4, the first center point O1, the second center point O2, the third center point O3, and the fourth center point O4 are on the same straight line, the first center point O1 coincides with the second center point O2, and the distance between the projection of the third center point O3 on the first plane and the projection of the fourth center point O4 on the first plane is less than the distance between the projection of the third center point O3 on the first plane and the projection of the second center point O2 on the first plane.
[0100] In one embodiment, Fig. 9 As shown, the inner edge of the side wall of the pump ring 50 is circular, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring 20 close to the second end is the second intersection, the center point of the inner edge of the side wall of the pump ring 50 is the third center point O3, and the distance between the third center point O3 and the second intersection is greater than the distance between the first center point O1 and the second intersection.
[0101] The utility model sets the pump ring 50 to be a circular shape eccentric to the edge ring 20. The width of the purge channel 31 can be adjusted by adjusting the position of the pump ring 50 without changing the shape of the pump ring 50. The improvement scheme is simple and easy to promote.
[0102] Embodiment 6:
[0103] This embodiment provides a semiconductor process device, which is basically the same as that of Embodiment 5, except that:
[0104] like Fig.10As shown, the line between the two points where the straight line where the first line is located intersects the inner edge of the side wall of the pump ring 50 is the fourth line 52, the line between the two points where the perpendicular bisector of the fourth line 52 intersects the inner edge of the side wall of the pump ring 50 is the fifth line 53, and the length of the fourth line 52 is greater than the length of the fifth line 53; the intersection of the straight line where the first line is located and the outer edge of the edge ring 20 close to the second end is the second intersection, and the distance between the midpoint of the fourth line 52 and the second intersection is greater than the distance between the first center point O1 and the second intersection.
[0105] The utility model sets the shape of the pump ring 50 so that the fourth connecting line 52 is longer than the fifth connecting line 53 to adjust the width of the purge channel 31, thereby achieving more precise adjustment of the width of the purge channel 31 to achieve higher uniformity of the processed surface of the processed wafer 12 after the reaction.
[0106] In summary, the edge ring and semiconductor process device of the utility model can form different purge channel widths by setting different ring widths at the two ends of the edge ring, so that the air intake rate and exhaust rate at each position are close, thereby improving the uniformity of the reaction rate at each position of the edge ring; at the same time, by setting the edge ring to be circular eccentric or oblate eccentric to adjust the purge channel width, the convenience and flexibility of device improvement are improved; in addition, by setting the pump ring to be circular eccentric or oblate eccentric to adjust the purge width, the convenience of device improvement and the flexibility of space use are improved; finally, by setting the pump ring to be circular eccentric or oblate eccentric to adjust the purge width in coordination with the shape of the edge ring, the convenience of improvement and the flexibility of space use are further improved.
[0107] Therefore, the utility model effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0108] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.
Claims
1. An edge ring, characterized in that: The inner edge of the edge ring is a circular opening, and the circular opening is used to place the base. The center point of the inner edge of the edge ring is the first center point; the ring width of the edge ring at the first end is smaller than the ring width of the edge ring at the second end, the first end and the second end are respectively located on opposite sides of the inner edge of the edge ring, and the line between the first end and the second end is the first line, which is parallel to the plane where the edge ring is located and passes through the first center point.
2. The edge ring according to claim 1, characterized in that: The outer edge of the edge ring is circular, and the center point of the outer edge of the edge ring is the second center point; the first center point and the second center point are both on the straight line where the first connecting line is located, and the intersection of the straight line where the first connecting line is located and the inner edge of the edge ring close to the first end is the first intersection point, and the distance between the first center point and the first intersection point is smaller than the distance between the second center point and the first intersection point.
3. The edge ring according to claim 1, characterized in that: The line between the two points where the straight line where the first line is located intersects with the outer edge of the edge ring is the second line, and the intersection between the perpendicular bisector of the second line and the second line is the second center point; the first center point and the second center point are both on the straight line where the first line is located, and the intersection between the straight line where the first line is located and the inner edge of the edge ring close to the first end is the first intersection point, and the distance between the first center point and the first intersection point is smaller than the distance between the second center point and the first intersection point; the line between the two points where the perpendicular bisector of the second line intersects with the outer edge of the edge ring is the third line, and the length of the second line is greater than the length of the third line.
4. A semiconductor process device, characterized in that: The semiconductor process device comprises the edge ring as claimed in any one of claims 1 to 3, and the semiconductor process device further comprises a pump ring; The pump ring is an annular side wall surrounding the edge ring, and a purge channel is formed between the outer edge of the edge ring and the inner edge of the side wall of the pump ring. The width of the purge channel near the first end of the edge ring is greater than the width of the purge channel near the second end of the edge ring.
5. The semiconductor process device according to claim 4, characterized in that: The inner edge of the side wall of the pump ring is circular; the center point of the inner edge of the side wall of the pump ring is the third center point, the third center point and the first center point are on the straight line where the first connecting line is located, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring close to the second end is the second intersection point, and the distance between the third center point and the second intersection point is greater than or equal to the distance between the first center point and the second intersection point.
6. The semiconductor process device according to claim 4, characterized in that: The line between the two points where the straight line where the first line is located intersects with the inner edge of the side wall of the pump ring is the fourth line, and the line between the two points where the perpendicular bisector of the fourth line intersects with the inner edge of the side wall of the pump ring is the fifth line, and the length of the fourth line is not equal to the length of the fifth line.
7. A semiconductor process device, characterized in that: The semiconductor process device comprises a base, an edge ring, and a pump ring; the inner edge of the edge ring is a circular opening, the circular opening is used to place the base, the outer edge of the base is circular, the center point of the inner edge of the edge ring is a first center point, the center point of the outer edge of the edge ring is a second center point, and the first center point coincides with the second center point; The pump ring is an annular side wall surrounding the edge ring, and a purge channel is formed between the outer edge of the edge ring and the inner edge of the side wall of the pump ring. The width of the purge channel near the first end of the edge ring is greater than the width of the purge channel near the second end of the edge ring. The first end and the second end are respectively located on opposite sides of the inner edge of the edge ring. The line between the first end and the second end is a first line, and the first line is parallel to the plane where the edge ring is located and passes through the first center point.
8. The semiconductor process device according to claim 7, characterized in that: The inner edge of the side wall of the pump ring is circular, the intersection of the straight line where the first connecting line is located and the outer edge of the edge ring close to the second end is the second intersection, the center point of the inner edge of the side wall of the pump ring is the third center point, and the distance between the third center point and the second intersection is greater than the distance between the first center point and the second intersection.
9. The semiconductor process device according to claim 7, characterized in that: The line connecting the two points where the straight line where the first line is located intersects with the inner edge of the side wall of the pump ring is the fourth line, the line connecting the two points where the perpendicular bisector of the fourth line intersects with the inner edge of the side wall of the pump ring is the fifth line, and the length of the fourth line is greater than the length of the fifth line; the intersection of the straight line where the first line is located and the outer edge of the edge ring close to the second end is the second intersection, and the distance between the midpoint of the fourth line and the second intersection is greater than the distance between the first center point and the second intersection.
10. The semiconductor process device according to any one of claims 4 to 9, characterized in that: The semiconductor process device further includes an exhaust pump. The pump ring is provided with an exhaust hole, the exhaust hole is communicated with the exhaust pump, and the exhaust pump is located outside the pump ring on one side close to the first end.