Charge pump and chip

Abstract

The utility model discloses a charge pump which comprises a first capacitor, a second capacitor, a first switch group, a second switch group, an input end, an output end and an auxiliary charge pump. The first end of the first capacitor is used for receiving a first signal, the first end of the second capacitor is used for receiving a second signal, the second end of the first capacitor and the second end of the second capacitor are connected with the input end through the first switch group, and the second end of the first capacitor and the second end of the second capacitor are connected with the output end through the second switch group. The auxiliary charge pump is connected with the input end and the first switch group, and the auxiliary charge pump is used for generating a first control signal and a second control signal for controlling on and off of the first switch group based on the input voltage, the first signal and the second signal. The charge pump and the chip provided by the utility model provide a control signal required by the first switch group through the auxiliary charge pump, and ensure that grid bias voltages of the first switch tube and the second switch tube are hardly lost, thereby improving the overall power supply capability of the charge pump.

Description

Technical Field

[0001] The utility model belongs to the technical field of integrated circuits, and in particular relates to a charge pump and a chip. Background Art

[0002] like Figure 1 In the conventional charge pump circuit shown in FIG. 1 , MOS tubes are used as switch devices. PH1 and PH2 are a set of clock signals that do not overlap each other. MOS tubes M1 and M2 charge and boost the two capacitors C1 and C2 in turn, and then MOS tubes M3 and M4 output the boosted voltage in turn to obtain an output voltage VOUT that is double the input voltage VIN.

[0003] Since the charge pump circuit has an output load, when MOS tubes M1 and M2 charge the capacitor, their gate voltage will be pulled down by the output load on the opposite capacitor. For a charge pump with a low input voltage, this will cause the Vgs of MOS tubes M1 and M2 to be low, resulting in a decrease in the output of the entire charge pump and poor performance. Ultimately, the device size must be increased to provide sufficient output.

[0004] Therefore, in view of the above technical problems, it is necessary to provide a charge pump and a chip that can enhance the output capability.

[0005] The information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to a person skilled in the art. Utility Model Content

[0006] The utility model aims to provide a charge pump and a chip, which can improve the power supply capacity without increasing the device area.

[0007] In order to achieve the above-mentioned purpose, a specific embodiment of the utility model provides a charge pump, including a first capacitor, a second capacitor, a first switch group, a second switch group, an input end, an output end and an auxiliary charge pump; the input end is used to connect an input voltage, the first end of the first capacitor is used to receive a first signal, the first end of the second capacitor is used to receive a second signal, the second end of the first capacitor and the second end of the second capacitor are connected to the input end through the first switch group, the second end of the first capacitor and the second end of the second capacitor are connected to the output end through the second switch group, the auxiliary charge pump is connected to the input end and the first switch group, and the auxiliary charge pump is used to generate a first control signal and a second control signal for controlling the opening and closing of the first switch group based on the input voltage, the first signal and the second signal.

[0008] In one or more embodiments of the present invention, the first signal and the second signal are clock signals that do not overlap with each other.

[0009] In one or more embodiments of the present utility model, the first switch group includes a first switch tube and a second switch tube, the first end of the first switch tube and the first end of the second switch tube are connected to the input end, the second end of the first switch tube is connected to the second end of the first capacitor, and the second end of the second switch tube is connected to the second end of the second capacitor, the control end of the first switch tube is used to receive a first control signal, and the control end of the second switch tube is used to receive a second control signal.

[0010] In one or more embodiments of the present utility model, the second switch group includes a third switch tube and a fourth switch tube, the first end of the third switch tube and the first end of the third switch tube are connected to the output end, the second end of the third switch tube and the control end of the fourth switch tube are connected to the second end of the first capacitor, and the second end of the fourth switch tube and the control end of the third switch tube are connected to the second end of the second capacitor.

[0011] In one or more embodiments of the present invention, the charge pump further includes a third capacitor, a first end of the third capacitor is connected to the output end, and a second end of the third capacitor is connected to a ground voltage.

[0012] In one or more embodiments of the present invention, the auxiliary charge pump includes a fourth capacitor, a fifth capacitor and a third switch group, the first end of the fourth capacitor is used to receive the second signal, the first end of the fifth capacitor is used to receive the first signal, the second end of the fourth capacitor is connected to the input end through the third switch group to generate a first control signal, and the second end of the fifth capacitor is connected to the input end through the third switch group to generate a second control signal.

[0013] In one or more embodiments of the present utility model, the third switch group includes a fifth switch tube and a sixth switch tube, the first end of the fifth switch tube and the first end of the sixth switch tube are connected to the input end, the second end of the fifth switch tube and the control end of the sixth switch tube are connected to the second end of the fourth capacitor, and the second end of the sixth switch tube and the control end of the fifth switch tube are connected to the second end of the fifth capacitor.

[0014] A specific embodiment of the present invention further provides a chip including one or more of the above-mentioned charge pumps, wherein the multiple charge pumps are connected in series with each other.

[0015] Compared with the prior art, the charge pump and chip of the utility model provide the control signal required by the first switch group through the auxiliary charge pump, and the output load of the auxiliary charge pump is only the first switch group, and there is no other charge loss, so that the output load of the charge pump will not affect the first switch group, ensuring that the gate bias of the first switch tube and the second switch tube is almost not lost, thereby improving the overall power supply capacity of the charge pump. This structure is particularly effective when the input voltage is low and the output current is high, which can significantly enhance the output current capacity and reduce the required input voltage.

[0016] At the same time, since the auxiliary charge pump only needs to provide control signals for the gate bias of the first switch tube and the second switch tube, its device does not need to be made very large. Since the auxiliary charge pump improves the overall boost level, the area of ​​its components can be made smaller while maintaining the power supply capacity, so that the area of ​​the entire charge pump does not change much. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the utility model, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 This is the circuit schematic of a traditional charge pump.

[0019] Figure 2 1 is a circuit diagram of a charge pump in one embodiment of the present invention. DETAILED DESCRIPTION

[0020] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0021] The words "coupled" or "connected" or "connected" in the specification include both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits. In addition, in the present utility model, words such as "first" and "second" are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity or order between these technical features.

[0022] like Figure 2 As shown, the charge pump in an embodiment of the present invention includes a first capacitor C1, a second capacitor C2, a first switch group 10, a second switch group 20, a third capacitor C3, an input end, an output end and an auxiliary charge pump.

[0023] The input terminal is used to receive the input voltage VIN, the first terminal of the first capacitor C1 is used to receive the first signal PH1, and the first terminal of the second capacitor C2 is used to receive the second signal PH2. The second terminal of the first capacitor C1 and the second terminal of the second capacitor C2 are connected to the input terminal through the first switch group 10, and the auxiliary charge pump is used to generate the first control signal V1 and the second control signal V2 for controlling the opening and closing of the first switch group 10 based on the first signal PH1 and the second signal PH2.

[0024] The second end of the first capacitor C1 and the second end of the second capacitor C2 are connected to the output end through the second switch group 20. The first end of the third capacitor C3 is connected to the output end, and the second end of the third capacitor C3 is connected to the ground voltage. The third unit is used to stabilize and filter the output voltage VOUT of the output end.

[0025] In one embodiment, the first signal PH1 and the second signal PH2 are a set of non-overlapping clock signals, whose low level is 0 and high level is VIN. The voltage value of the input voltage VIN is VIN. In other embodiments, the high and low levels of the clock signal can be set to other values ​​as needed.

[0026] like Figure 2 As shown, the first switch group 10 includes a first switch tube M1 and a second switch tube M2. The first end of the first switch tube M1 and the first end of the second switch tube M2 are connected to the input end, the second end of the first switch tube M1 is connected to the second end of the first capacitor C1, and the second end of the second switch tube M2 is connected to the second end of the second capacitor C2. The control end of the first switch tube M1 is used to receive the first control signal V1, and the control end of the second switch tube M2 is used to receive the second control signal V2.

[0027] The second switch group 20 includes a third switch tube M3 and a fourth switch tube M4. The first end of the third switch tube M3 and the first end of the third switch tube M3 are connected to the output end, the second end of the third switch tube M3 and the control end of the fourth switch tube M4 are connected to the second end of the first capacitor C1, and the second end of the fourth switch tube M4 and the control end of the third switch tube M3 are connected to the second end of the second capacitor C2.

[0028] In one embodiment, the first switch tube M1 and the second switch tube M2 are both N-channel MOS tubes, whose first end is the source, the second end is the drain, and the control end is the gate. The third switch tube M3 and the fourth switch tube M4 are both P-channel MOS tubes, whose first end is the source, the second end is the drain, and the control end is the gate.

[0029] In other embodiments, the first switch tube M1 and the second switch tube M2 may be P-channel MOS tubes, and the third switch tube M3 and the fourth switch tube M4 may be N-channel MOS tubes, and the connection modes of the above switch tubes are adaptively adjusted.

[0030] like Figure 2 As shown, the auxiliary charge pump includes a fourth capacitor C4, a fifth capacitor C5 and a third switch group 30, the first end of the fourth capacitor C4 is used to receive the second signal PH2, the first end of the fifth capacitor C5 is used to receive the first signal PH1, the second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are connected to the input end through the first switch group 10 to generate the first control signal V1 and the second control signal V2.

[0031] The third switch group 30 includes a fifth switch tube M5 and a sixth switch tube M6. The first end of the fifth switch tube M5 and the first end of the sixth switch tube M6 are connected to the input end. The second end of the fifth switch tube M5 and the control end of the sixth switch tube M6 are connected to the second end of the fourth capacitor C4, and generate a first control signal V1. The second end of the sixth switch tube M6 and the control end of the fifth switch tube M5 are connected to the second end of the fifth capacitor C5, and generate a second control signal V2.

[0032] In one embodiment, the fifth switch tube M5 and the sixth switch tube M6 are both N-channel MOS tubes, whose first end is a source, the second end is a drain, and the control end is a gate. In other embodiments, the fifth switch tube M5 and the sixth switch tube M6 can be P-channel MOS tubes, and the connection methods of the fifth switch tube M5 and the sixth switch tube M6 are adaptively adjusted.

[0033] In actual operation, the input voltage VIN is first charged to VIN via the first switch group 10 to charge the second end of the first capacitor C1 and the second end of the second capacitor C2, and the second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are charged to VIN via the third switch group 30.

[0034] Next, the second signal PH2 is provided to the first end of the fourth capacitor C4, and the first signal PH1 is provided to the first end of the fifth capacitor C5.

[0035] When the first signal PH1 is at a high level (ie, VIN) and the second signal PH2 is at a low level (ie, 0), the voltage at the second end of the fifth capacitor C5 is 2VIN, that is, the second control signal V2 is 2VIN. At the same time, the fifth switch tube M5 is turned on, and the second end of the fifth switch tube M5 generates the first control signal V1 as VIN. The sixth switch tube M6 is turned off, which does not affect the second control signal V2.

[0036] When the first signal PH1 is at a low level (i.e., 0) and the second signal PH2 is at a high level (i.e., VIN), the voltage at the second end of the fourth capacitor C4 is 2VIN, i.e., the first control signal V1 is 2VIN. At the same time, the sixth switch tube M6 is turned on, and the second end of the sixth switch tube M6 generates a second control signal V2 of VIN. The fifth switch tube M5 is turned off, which does not affect the first control signal V1.

[0037] At the same time, a first signal PH1 is provided to a first end of the first capacitor C1 , and a second signal PH2 is provided to a first end of the second capacitor C2 .

[0038] When the first signal PH1 is at a high level (ie, VIN) and the second signal PH2 is at a low level (ie, 0), the first control signal V1 is VIN, and the first switch tube M1 is turned off. The second control signal V2 is 2VIN, and the second switch tube M2 is turned on.

[0039] The voltage at the second end of the first capacitor C1 is 2VIN, which controls the fourth switch M4 to be turned off. The voltage at the second end of the second capacitor C2 is VIN, which controls the third switch M3 to be turned on, and a path is formed between the output end and the second end of the first capacitor C1, and the output voltage VOUT is 2VIN.

[0040] When the first signal PH1 is at a low level (ie, 0) and the second signal PH2 is at a high level (ie, VIN), the first control signal V1 is 2VIN, and the first switch tube M1 is turned on. The second control signal V2 is VIN, and the second switch tube M2 is turned off.

[0041] The voltage at the second end of the first capacitor C1 is VIN, which controls the fourth switch M4 to turn on. The voltage at the second end of the second capacitor C2 is 2VIN, which controls the third switch M3 to turn off. A path is formed between the output end and the second end of the second capacitor C2, and the output voltage VOUT is 2VIN.

[0042] In summary, through the cyclic operation, the output voltage VOUT of the output terminal is 2VIN. The charge pumps in this solution can also form a multi-stage boost structure by connecting in series, and the output voltage VOUT of the upper charge pump only needs to be used as the input voltage VIN of the next charge pump.

[0043] In the above process, the auxiliary charge pump provides the gate bias voltage for the first switch tube M1 and the second switch tube M2, and the output load of the auxiliary charge pump is only the first switch tube M1 and the second switch tube M2, without other charge loss, so that the output load of the charge pump will not affect the gate bias voltage of the first switch tube M1 and the second switch tube M2, thereby improving the overall power supply capacity of the charge pump. This structure is particularly effective when the input voltage is low and the output current is high, and can significantly enhance the output current capacity and reduce the required input voltage VIN.

[0044] At the same time, since the auxiliary charge pump only needs to provide gate bias voltage for the first switch tube M1 and the second switch tube M2, its components (fourth capacitor C4, fifth capacitor C5, fifth switch tube M5 and sixth switch tube M6) only need to meet the basic boosting requirements and do not need to be made very large. Since the auxiliary charge pump improves the overall boosting level, the area of ​​its components can be made smaller while maintaining the power supply capacity, so that the area of ​​the entire charge pump does not change much.

[0045] In one embodiment of the utility model, a charge pump chip is provided, comprising a plurality of the above-mentioned charge pumps. The plurality of charge pumps are connected in series. Specifically, the output voltage VOUT of the upper charge pump is used as the input voltage VIN of the lower charge pump.

[0046] It is obvious to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential features of the present invention. Therefore, the embodiments should be regarded as exemplary and non-restrictive from any point of view, and the scope of the present invention is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present invention. Any reference numeral in a claim should not be regarded as limiting the claim to which it relates.

[0047] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A charge pump, characterized in that: It includes a first capacitor, a second capacitor, a first switch group, a second switch group, an input end, an output end and an auxiliary charge pump; The input end is used to connect the input voltage, the first end of the first capacitor is used to receive the first signal, the first end of the second capacitor is used to receive the second signal, the second end of the first capacitor and the second end of the second capacitor are connected to the input end through the first switch group, the second end of the first capacitor and the second end of the second capacitor are connected to the output end through the second switch group, the auxiliary charge pump is connected to the input end and the first switch group, and the auxiliary charge pump is used to generate the first control signal and the second control signal for controlling the opening and closing of the first switch group based on the input voltage, the first signal and the second signal.

2. The charge pump according to claim 1, characterized in that The first signal and the second signal are clock signals that do not overlap with each other.

3. The charge pump according to claim 1, characterized in that The first switch group includes a first switch tube and a second switch tube, the first end of the first switch tube and the first end of the second switch tube are connected to the input end, the second end of the first switch tube is connected to the second end of the first capacitor, and the second end of the second switch tube is connected to the second end of the second capacitor. The control end of the first switch tube is used to receive a first control signal, and the control end of the second switch tube is used to receive a second control signal.

4. The charge pump according to claim 1, characterized in that The second switch group includes a third switch tube and a fourth switch tube, the first end of the third switch tube and the first end of the third switch tube are connected to the output end, the second end of the third switch tube and the control end of the fourth switch tube are connected to the second end of the first capacitor, and the second end of the fourth switch tube and the control end of the third switch tube are connected to the second end of the second capacitor.

5. The charge pump according to claim 1, characterized in that The charge pump further includes a third capacitor, a first end of the third capacitor is connected to the output end, and a second end of the third capacitor is connected to the ground voltage.

6. The charge pump according to claim 1, characterized in that The auxiliary charge pump includes a fourth capacitor, a fifth capacitor and a third switch group, the first end of the fourth capacitor is used to receive the second signal, the first end of the fifth capacitor is used to receive the first signal, the second end of the fourth capacitor is connected to the input end through the third switch group to generate a first control signal, and the second end of the fifth capacitor is connected to the input end through the third switch group to generate a second control signal.

7. The charge pump according to claim 6, characterized in that The third switch group includes a fifth switch tube and a sixth switch tube, the first end of the fifth switch tube and the first end of the sixth switch tube are connected to the input end, the second end of the fifth switch tube and the control end of the sixth switch tube are connected to the second end of the fourth capacitor, and the second end of the sixth switch tube and the control end of the fifth switch tube are connected to the second end of the fifth capacitor.

8. A chip, characterized in that: The invention comprises one or more charge pumps according to any one of claims 1 to 7, wherein the plurality of charge pumps are connected in series with each other.

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