Calibration source module

Abstract

The utility model discloses a calibration source module, which belongs to the field of clock signals and comprises a receiver, a controller, a frequency synthesizer, a switch filter assembly and an attenuator. The receiver is used for receiving a target frequency instruction; the controller is connected with the receiver, and the controller is used for determining configuration parameters and a preset attenuation value of the frequency synthesizer according to the target frequency instruction; the frequency synthesizer is connected with the controller, and the frequency synthesizer is used for performing frequency adjustment according to the configuration parameters to obtain a first frequency; the switch filter assembly is connected with the frequency synthesizer, and the switch filter assembly is used for filtering the first frequency and outputting a second frequency and corresponding power; and the attenuator is connected with the switch filter assembly and the controller, and the attenuator is used for adjusting the second frequency according to a preset attenuation value and outputting a target frequency. Therefore, the harmonic suppression capability of the calibration source module can be improved, and in-band fluctuation can be reduced.

Description

Technical Field

[0001] The present application relates to the field of clock signals, and in particular to a calibration source module. Background Art

[0002] The calibration source module mainly outputs a certain calibration signal based on an internal high-precision crystal oscillator or receives an external high-precision clock. The existing calibration source module has poor signal harmonic suppression capability. Summary of the invention

[0003] The main purpose of the present application is to provide a calibration source module, aiming to solve the problem of poor harmonic suppression capability of existing calibration source modules.

[0004] To achieve the above-mentioned purpose, the present application provides a calibration source module, including a receiver, a controller, a frequency synthesizer, a switch filter component and an attenuator; the receiver is used to receive a target frequency instruction; the controller is connected to the receiver, and the controller is used to determine the configuration parameters and preset attenuation value of the frequency synthesizer according to the target frequency instruction; the frequency synthesizer is connected to the controller, and the frequency synthesizer is used to adjust the frequency according to the configuration parameters to obtain a first frequency; the switch filter component is connected to the frequency synthesizer, and the switch filter component is used to filter the first frequency and output a second frequency and corresponding power; the attenuator is respectively connected to the switch filter component and the controller, and the attenuator is used to adjust the second frequency according to the preset attenuation value and output the target frequency.

[0005] Optionally, the frequency synthesizer includes: a reference clock source, the reference clock source is used to output a reference frequency; a phase-locked loop, an input end of which is connected to an output end of the reference clock source, and the phase-locked loop is used to adjust the reference frequency to obtain the first frequency.

[0006] Optionally, the phase-locked loop includes: a first frequency divider, a phase detector, a loop filter, a voltage-controlled oscillation module, and a second frequency divider; the first frequency divider is connected to a reference clock source and is used to divide the reference frequency; the phase detector is connected to the first frequency divider and is used to compare the divided signal output by the first frequency divider with the divided signal output by the second frequency divider and output a signal error; the loop filter is connected to the phase detector and is used to filter the signal error and output a DC control signal; the voltage-controlled oscillation module is connected to the loop filter and is used to adjust its own control voltage according to the DC control signal and output the first frequency; the input end of the second frequency divider is connected to the voltage-controlled oscillation module, and the output end is connected to the phase detector and is used to divide the first frequency.

[0007] Optionally, the configuration parameters of the frequency synthesizer include a first frequency division coefficient corresponding to the first frequency divider and a second frequency division coefficient corresponding to the second frequency divider.

[0008] Optionally, the voltage-controlled oscillator module includes a first frequency multiplier, a voltage-controlled oscillator and a third frequency divider: the input end of the first frequency multiplier is connected to the loop filter, and the first frequency multiplier is used to multiply the DC control signal; the input end of the voltage-controlled oscillator is connected to the first frequency multiplier, and the voltage-controlled oscillator is used to adjust its own control voltage according to the multiplied signal output by the first frequency multiplier, and output the multiplied frequency; the input end of the third frequency divider is connected to the voltage-controlled oscillator, and the output end is connected to the second frequency divider, and the third frequency divider is used to divide the multiplied frequency and output the first frequency.

[0009] Optionally, the configuration parameters of the frequency synthesizer also include: a first frequency multiplication coefficient corresponding to the first frequency multiplier, and a third frequency division coefficient corresponding to the third frequency divider.

[0010] Optionally, the phase-locked loop also includes: a first register connected to the first frequency divider and the controller, and used to store a first frequency division coefficient; a second register connected to the second frequency divider and the controller, and used to store a second frequency division coefficient.

[0011] Optionally, the phase-locked loop also includes: a third register connected to the third frequency divider and the controller, and used to store a third frequency division coefficient; a fourth register connected to the first frequency multiplier and the controller, and used to store the first frequency multiplication coefficient.

[0012] Optionally, the switching filter component includes multiple switching filters, and the switching filters include: a filter, which is used to perform corresponding filtering on the first frequency and output a second frequency and corresponding power; a switch, which is connected to the controller and the filter, and the switch is used to transmit the output of the frequency synthesizer to the filter or to close the connection between the frequency synthesizer and the filter according to the instructions of the controller.

[0013] Optionally, the filter is an LC filter.

[0014] A calibration source module proposed in an embodiment of the present application is provided with a receiver to receive a target frequency instruction sent by a user, a controller determines the configuration parameters and a preset attenuation value of a frequency synthesizer according to the target frequency instruction, the frequency synthesizer performs frequency adjustment according to the configuration parameters of the frequency synthesizer to obtain a first frequency, and then performs corresponding filtering on the first frequency through a switching filter component, and finally performs power attenuation on the frequency after filtering through an attenuator, thereby improving the harmonic suppression capability of the calibration source module and reducing in-band fluctuations. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a structural schematic diagram of a calibration source module for this application;

[0016] Figure 2 for Figure 1 A schematic structural diagram of a first embodiment of a phase-locked loop;

[0017] Figure 3 for Figure 1 A schematic structural diagram of a second embodiment of a phase-locked loop;

[0018] Figure 4 for Figure 1 A schematic structural diagram of a third embodiment of a phase-locked loop;

[0019] Figure 5 for Figure 1 A schematic diagram of the structure of the switch filter component;

[0020] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0023] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0024] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the meaning of "and / or" appearing in the full text includes three parallel schemes. Taking "A and / or B" as an example, it includes scheme A, or scheme B, or a scheme that satisfies both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in the field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0025] This application provides a calibration source module. Figure 1 This is a schematic diagram of the structure of a calibration source module according to an embodiment of the present application. Figure 1 As shown, the calibration source module may include a receiver 10, a controller 20, a frequency synthesizer 30, a switch filter component 40 and an attenuator 50; the receiver 10 is used to receive a target frequency instruction; the controller 20 is connected to the receiver 10, and the controller 20 can be used to determine the configuration parameters and preset attenuation value of the frequency synthesizer 30 according to the target frequency instruction; the frequency synthesizer 30 is connected to the controller 20, and the frequency synthesizer 30 can be used to adjust the frequency according to the configuration parameters to obtain a first frequency; the switch filter component 40 is connected to the frequency synthesizer 30, and the switch filter component 40 can be used to filter the first frequency and output a second frequency and corresponding power; the attenuator 50 is respectively connected to the switch filter component 40 and the controller 20, and the attenuator 50 can be used to adjust the second frequency according to the preset attenuation value and output the target frequency.

[0026] In this embodiment, a receiver 10 is configured to receive a target frequency instruction, and a controller 20 determines configuration parameters and a preset attenuation value of a frequency synthesizer 30 according to the target frequency instruction. The frequency synthesizer 30 performs frequency adjustment according to the configuration parameters to obtain a first frequency, and then performs corresponding filtering on the first frequency through a switching filter component 40. Finally, the frequency after filtering is power attenuated by an attenuator 50, thereby improving the harmonic suppression capability of the calibration source module and reducing in-band fluctuations.

[0027] It can be understood that, in this embodiment, the target frequency instruction may be an instruction sent by a user.

[0028] In an exemplary embodiment, the controller 20 may be an FPGA, which transmits configuration parameters to the frequency synthesizer 30 via an SPI transmission line; the receiver 10 may be an RS422 transmitter, which may receive a target frequency instruction sent by a user and transmit it to the controller 20.

[0029] It should be noted that the above-mentioned preset frequency range is the applicable range of the calibration source module, and the range may be, for example, 30 MHz-3000 MHz.

[0030] It is worth noting that the method for obtaining the preset attenuation value in this embodiment can be: taking any frequency in the preset frequency range as the reference frequency, and measuring the power of the reference frequency, the controller 20 controls the attenuation value of the attenuator 50 so that the power difference between the power of the remaining frequencies in the preset frequency range and the power of the reference frequency meets the preset value, and the preset attenuation value corresponding to each second frequency is obtained. For example, taking the frequency of 3 GHz as the reference frequency, after testing, the power corresponding to this frequency is Po, and the attenuation value of the attenuator 50 is controlled by the controller 20 so that the difference between the power of other frequency points and Po is within ±1dB, and the attenuation value corresponding to each frequency is obtained, which is the preset attenuation value of the frequency. When in use, the controller 20 calls the preset attenuation value of the current target frequency to perform attenuation.

[0031] In an exemplary embodiment, the frequency synthesizer 30 may include a reference clock source 31 and a phase-locked loop 32, wherein the reference clock source 31 is used to output a reference frequency; the input end of the phase-locked loop 32 is connected to the output end of the reference clock source 31, and the phase-locked loop 32 is used to adjust the reference frequency to obtain a first frequency.

[0032] Figure 2 This is a schematic diagram of the structure of a first embodiment of a phase-locked loop 32 of a calibration source module of this embodiment. Figure 2 The specific structure of the phase-locked loop 32 will be described.

[0033] In an exemplary embodiment, if Figure 2As shown, the phase-locked loop 32 may include a first frequency divider 321, a phase detector 323, a loop filter 324, a voltage-controlled oscillation module 325 and a second frequency divider 322. The first frequency divider 321 is connected to the reference clock source 31, and the first frequency divider 321 can be used to divide the reference frequency; the phase detector 323 is connected to the first frequency divider 321, and the phase detector 323 can be used to compare the divided signal output by the first frequency divider 321 with the divided signal output by the second frequency divider 322, and output a signal error. The loop filter 324 is connected to the phase detector 323, and the loop filter 324 can be used to filter the signal error and output a DC control signal; the voltage-controlled oscillator 3252 is connected to the loop filter 324, and the voltage-controlled oscillator 3252 can be used to adjust its own control voltage according to the DC control signal and output a first frequency; the input end of the second frequency divider 322 is connected to the voltage-controlled oscillator 3252, and the output end is connected to the phase detector 323, and the second frequency divider 322 can be used to divide the first frequency. The configuration parameters of the frequency synthesizer 30 may include a first frequency division coefficient corresponding to the first frequency divider 321 and a second frequency division coefficient corresponding to the second frequency divider 322.

[0034] In this embodiment, the reference clock source 31 outputs a reference frequency, the first frequency divider 321 divides the reference frequency according to the first frequency division coefficient and sends the result to the phase detector 323, the second frequency divider 322 divides the target frequency according to the second frequency division coefficient and sends the result to the phase detector 323, the phase detector 323 compares the reference clock source 31 with the target frequency and outputs a signal error, the error signal is filtered by the loop filter 324, and the voltage-controlled oscillation module 325 adjusts its own control voltage according to the filtered error signal and outputs the target frequency, thereby achieving high-quality frequency synthesis.

[0035] Further, the following is an introduction to a method for determining the configuration parameters of the frequency synthesizer 30 in this embodiment. The method is: the client issues a target instruction, which is the target frequency of the output, the controller 20 calculates the ratio of the frequency of the phase detector 323 to the target frequency, and obtains a first frequency division coefficient, and the controller 20 calculates the ratio of the frequency of the phase detector 323 to the target frequency, and obtains a second frequency division coefficient. It can be understood that the frequency of the phase detector 323 in this embodiment is a determined value, for example, it can be 50MHz.

[0036] The following describes a method for determining the configuration parameters of the frequency synthesizer 30 using specific data as an example:

[0037] For example, if the target frequency is 100MHz and the target frequency is 300MHz, then the first frequency division coefficient can be the ratio of 100MHz to 50, which is 2, and the second frequency division coefficient can be the ratio of 300MHz to 50, which is 6. For another example, if the target frequency is 100MHz and the target frequency is 2000MHz, then the first frequency division coefficient can be the ratio of 100MHz to 50, which is 2, and the second frequency division coefficient can be the ratio of 2000MHz to 50, which is 40.

[0038] Figure 3 This is a schematic diagram of the structure of a second embodiment of a phase-locked loop 32 of a calibration source module according to an embodiment of the present application. Figure 3 The specific structure of the phase-locked loop 32 will be described.

[0039] Based on the above embodiments, Figure 3 As shown, the voltage controlled oscillator module 325 may include a first frequency multiplier 3251, a voltage controlled oscillator 3252 and a third frequency divider 3253. The input end of the first frequency multiplier 3251 is connected to the loop filter 3252, and the output end is connected to the voltage controlled oscillator 3252. The first frequency multiplier 3251 can be used to multiply the DC control signal; the input end of the voltage controlled oscillator 3252 is connected to the first frequency multiplier 3251, and the voltage controlled oscillator 3252 is used to adjust its own control voltage according to the multiplied signal output by the first frequency multiplier 3251, and output the multiplied frequency; the input end of the third frequency divider 3253 is connected to the voltage controlled oscillator 3252, and the output end is connected to the second frequency divider 322. The third frequency divider 3253 can be used to divide the multiplied frequency and output the first frequency. The configuration parameters of the frequency synthesizer 30 may also include a first multiplication coefficient corresponding to the first frequency multiplier 3251 and a third division coefficient corresponding to the third frequency divider 3253.

[0040] In this embodiment, since the frequency range of the voltage-controlled oscillator 3252 is fixed and the frequency range has multiple segments, and the target frequency may not necessarily belong to any segment, it is necessary to add a first frequency multiplier 3251 and a third frequency divider 3253. At the input end of the voltage-controlled oscillator 3252, the target frequency can be multiplied by the first frequency multiplier 3251, and then the corresponding frequency division is performed at the output end of the voltage-controlled oscillator 3252 by the third frequency divider 3253, so that the output is consistent with the target frequency, thereby improving the application range of the voltage-controlled oscillator 3252.

[0041] The first frequency multiplier 3251 and the third frequency divider 3253 are described in detail below with reference to specific data.

[0042] For example, the frequency range of the voltage-controlled oscillator 3252 is 1.5-3GHz, which is integrated into three sections, namely 1.5GHz-2GHz, 2GHz-2.4GHz, and 2.8GHz-3 GHz. The target frequency is 300MHz, and no range section can be input. At this time, the controller 20 calculates the first frequency multiplication coefficient N of the first frequency multiplier 3251, which is the target frequency multiplied by N. For example, N can be 5, then 300MHz multiplied by 5 equals 1.5GHz, so that it is within 1.5GHz-2GHz, and thus processed by the voltage-controlled oscillator 3252; after the processing is completed, the corresponding frequency division is performed through the third frequency divider 3253. At this time, the third frequency division coefficient of the third frequency divider 3253 is 5, so that the output is consistent with the target frequency.

[0043] Figure 4 This is a schematic diagram of the structure of a third embodiment of a phase-locked loop 32 of a calibration source module according to an embodiment of the present application. Figure 4 The specific structure of the phase-locked loop 32 will be described.

[0044] Based on the above embodiments, Figure 4 As shown, the phase-locked loop 32 may further include a first register 326, a second register 327, a third register 328, and a fourth register 329. The first register 326 is connected to the first frequency divider 321 and the controller 20, and the first register 326 may be used to store the first frequency division coefficient; the second register 327 is connected to the second frequency divider 322 and the controller 20, and the second register 327 may be used to store the second frequency division coefficient. The phase-locked loop 32 also includes a third register 328 and a fourth register 329. The third register 328 is connected to the third frequency divider 3253 and the controller 20, and the third register 328 may be used to store the third frequency division coefficient; the fourth register 329 is connected to the first frequency multiplier 3251 and the controller 20, and the fourth register 329 may be used to store the first frequency multiplication coefficient.

[0045] In this embodiment, the controller 20 calculates the first frequency division coefficient and the second frequency division coefficient according to the reference frequency, the frequency of the phase detector 323, and the target frequency, and calculates the third frequency division coefficient and the first frequency multiplication coefficient according to the frequency of the voltage-controlled oscillator 3252 and the target frequency, and stores them in the first register 326, the second register 327, the third register 328, and the fourth register 329 respectively.

[0046] In addition, it is worth noting that since the first frequency division coefficient, the second frequency division coefficient, the third frequency division coefficient, and the first multiplication coefficient may be integers or non-integers, for example, when it is 3.5, the first register 326 may include a first integer register and a first decimal register, then the integer part 3 will be input into the first integer register, and the decimal part 5 will be input into the first decimal register. Similarly, the second register 327 may include a second integer register and a second decimal register, the third register 328 may include a third integer register and a third decimal register, and the fourth register 329 may include a fourth integer register and a fourth decimal register.

[0047] Figure 5 The structure diagram of the switch filter assembly 40 in the above embodiment is shown below. Figure 5 The switch filter component 40 in the calibration source module of the embodiment of the present application is described in detail.

[0048] In an exemplary embodiment, if Figure 5 As shown, the switch filter component 40 may include multiple switch filters 401, and the switch filter may include a filter 4011 and a switch 4012. The filter can be used to perform corresponding filtering on the first frequency and output a second frequency and corresponding power; the switch 4012 is connected to the controller 20 and the filter 4011, and the switch 4012 can be used to transmit the output of the frequency synthesizer 30 to the filter 4011 or to close the connection between the frequency synthesizer 30 and the filter 4011 according to the instruction of the controller 20.

[0049] In this embodiment, since the calibration source module of this embodiment has an applicable range, the target frequency can be any value within the range, therefore, the switch filter assembly 40 of this embodiment can include multiple switch filters 401, each switch filter 401 includes a switch 4012 and a corresponding filter 4011, and the controller 20 selects to open the corresponding switch according to the target frequency, thereby filtering through the filter 4011. The harmonic suppression capability of the harmonic suppression calibration source module can be improved.

[0050] Exemplarily, the filter 4011 in this embodiment can be an LC filter. For example, when the applicable range of the calibration source module is 30MHz-3000MHz, the switch filter component 40 includes eight LC filters, and the ranges of each filter 4011 are 30-50MHz, 50-80MHz, 80-140MHz, 140-260MHz, 260-500MHz, 500-900MHz, 900-1600MHz, and 1600-3000MHz. After testing, when the filtering range of the LC filter is within the above range, the test results are closer to the simulation results, indicating that the switch filter component 40 of this embodiment can improve the harmonic suppression capability.

[0051] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A calibration source module, characterized in that: Includes receivers, controllers, frequency synthesizers, switch filter components and attenuators; The receiver is used to receive a target frequency instruction; The controller is connected to the receiver, and the controller is used to determine the configuration parameters and the preset attenuation value of the frequency synthesizer according to the target frequency instruction; The frequency synthesizer is connected to the controller, and the frequency synthesizer is used to adjust the frequency according to the configuration parameters to obtain a first frequency; The switch filter component is connected to the frequency synthesizer, and the switch filter component is used to filter the first frequency and output a second frequency and corresponding power; The attenuator is connected to the switch filter component and the controller respectively, and is used to adjust the second frequency according to the preset attenuation value to output a target frequency.

2. The calibration source module according to claim 1, characterized in that: The frequency synthesizer comprises: A reference clock source, wherein the reference clock source is used to output a reference frequency; A phase-locked loop, an input end of which is connected to an output end of the reference clock source, and the phase-locked loop is used to adjust the reference frequency to obtain the first frequency.

3. The calibration source module according to claim 2, characterized in that: The phase-locked loop includes: a first frequency divider, a phase detector, a loop filter, a voltage-controlled oscillation module, and a second frequency divider; The first frequency divider is connected to the reference clock source and is used to divide the reference frequency; The phase detector is connected to the first frequency divider, and is used to compare the frequency divided signal output by the first frequency divider with the frequency divided signal output by the second frequency divider, and output a signal error; The loop filter is connected to the phase detector and is used to filter the signal error and output a DC control signal; The voltage-controlled oscillation module is connected to the loop filter and is used to adjust its own control voltage according to the DC control signal and output the first frequency; The input end of the second frequency divider is connected to the voltage-controlled oscillation module, and the output end is connected to the phase detector, and is used to divide the first frequency.

4. The calibration source module according to claim 3, characterized in that: The configuration parameters of the frequency synthesizer include a first frequency division coefficient corresponding to the first frequency divider and a second frequency division coefficient corresponding to the second frequency divider.

5. The calibration source module according to claim 3, characterized in that: The voltage-controlled oscillator module includes a first frequency multiplier, a voltage-controlled oscillator and a third frequency divider: An input end of the first frequency multiplier is connected to a loop filter, and the first frequency multiplier is used to multiply the frequency of the DC control signal; The input end of the voltage-controlled oscillator is connected to the first frequency multiplier, and the voltage-controlled oscillator is used to adjust its own control voltage according to the frequency multiplication signal output by the first frequency multiplier, and output the frequency multiplication frequency; An input end of the third frequency divider is connected to the voltage-controlled oscillator, and an output end is connected to the second frequency divider. The third frequency divider is used to divide the multiplied frequency and output the first frequency.

6. The calibration source module according to claim 5, characterized in that: The configuration parameters of the frequency synthesizer also include: a first frequency multiplication coefficient corresponding to the first frequency multiplier, and a third frequency division coefficient corresponding to the third frequency divider.

7. The calibration source module according to claim 4, characterized in that: The phase-locked loop also includes: A first register, connected to the first frequency divider and the controller, the first register being used to store the first frequency division coefficient; The second register is connected to the second frequency divider and the controller, and the second register is used to store the second frequency division coefficient.

8. The calibration source module according to claim 6, characterized in that: The phase-locked loop also includes: A third register, connected to the third frequency divider and the controller, and used to store a third frequency division coefficient; A fourth register is connected to the first frequency multiplier and the controller, and is used to store a first frequency multiplication coefficient.

9. The calibration source module according to claim 1, characterized in that: The switch filter assembly comprises a plurality of switch filters, wherein the switch filters include: A filter, used to perform corresponding filtering on the first frequency and output a second frequency and corresponding power; A switch is connected to the controller and the filter, and is used to transmit the output of the frequency synthesizer to the filter or close the connection between the frequency synthesizer and the filter according to the instruction of the controller.

10. The calibration source module according to claim 9, characterized in that: The filter is an LC filter.

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