Identification card centralized detection device

Abstract

The utility model provides an identification card centralized detection device and belongs to the identification card charging field. The technical problem to be solved is to provide an identification card centralized detection device which can charge identification cards in batches and can detect the health states of identification card batteries. According to the technical scheme, the device comprises a shell and a circuit board, the circuit board comprises a main control module, the main control module is electrically connected with a battery detection module, a display module and a power supply module, the main control module comprises a first chip, a pin 46 of the first chip and a pin 49 of the first chip are electrically connected with one port of a debugging interface H5 respectively, a pin 7 of the first chip is connected with a reset circuit in parallel, and the reset circuit is connected with a power supply module. The battery detection module comprises a plurality of second chips, a plurality of fourth chips, a plurality of current monitoring modules and a plurality of telecommunication ports of identification cards, a pin 1 of each second chip is electrically connected with a pin of the first chip, and an enabling end EN of each current monitoring module is electrically connected with an enabling control pin of the first chip; the utility model is applied to the identification card.

Description

Technical Field

[0001] The utility model provides a centralized detection device for identification cards, belonging to the technical field of identification card charging. Background Art

[0002] Currently, the forms of charging identification cards on the market are generally plug-in charging and wireless charging. Regardless of plug-in charging or wireless charging, one charging device can only charge one identification card, and cannot monitor the health of the identification card battery. Only when the identification card cannot work normally due to battery failure can it be forced to maintain and replace the battery. This may cause the identification card to work in a sub-healthy manner, bring safety hazards to operators, and reduce work efficiency.

[0003] The reference document (CN 213637120 U) provides a personnel locator card charger, which can charge multiple personnel locator cards at one time by setting multiple charging slots on the charging housing, and sets three power detection indicator lights to indicate that the personnel locator cards are in three different power ranges. It does not provide a circuit structure for charging identification cards in batches, nor can it determine the health of the battery. Utility Model Content

[0004] In order to solve the technical problem that a charging device can only charge one identification card and cannot monitor the health status of the identification card battery, the utility model proposes an identification card centralized detection device that can charge identification cards in batches and detect the health status of identification card batteries. The purpose is to improve the hardware structure of the identification card or the combined connection of the hardware modules and / or circuits to improve the charging efficiency of the identification card, detect the health status of the identification card, and prevent the identification card battery from working with a disease.

[0005] In order to solve the above technical problems, the technical solution adopted by the utility model is: an identification card centralized detection device, including a housing and a circuit board, a main control module is arranged on the circuit board, and the main control module is electrically connected to a battery detection module, a display module and a power module;

[0006] The main control module includes a first chip, wherein pin 1 of the first chip is connected to one end of a resistor R51 and a positive electrode of a power supply BT1, the other end of the resistor R51 is connected to a 3V3 power supply, and the negative electrode of the power supply BT1 is grounded; pin 3 of the first chip is connected to one end of a capacitor C27 and one end of a crystal oscillator X2, pin 4 of the first chip is connected to the other end of the crystal oscillator X2 and one end of a capacitor C28, and the other end of the capacitor C27 is connected to the other end of the capacitor C28 and then grounded; pin 5 of the first chip is connected to one end of a resistor R17, one end of a crystal oscillator X3, and one end of a capacitor C17, pin 6 of the first chip is connected to the other end of the resistor, the other end of the crystal oscillator X3, and a capacitor C18, and the other end of the capacitor C17 is connected to the capacitor C18. The other end of C18 is connected in parallel and then grounded; the 13th pin of the first chip is connected in series with the resistor R18 and then connected to the 3V3 power supply and one end of the capacitor C19, and the other end of the capacitor C19 is grounded; the 37th pin of the first chip is electrically connected to the 11th pin of the fifth chip, and the 38th pin of the first chip is electrically connected to the 12th pin of the fifth chip; the 46th pin of the first chip is electrically connected to the 2nd port of the debug interface H5, and the 49th pin of the first chip is electrically connected to the 1st port of the debug interface H5, the 7th pin of the first chip is connected in parallel to one end of the switch SW1 of the reset circuit, one end of the resistor R16 and one end of the capacitor C16, the other end of the switch SW1 is connected in parallel to the other end of the capacitor C16 and then grounded, and the other end of the resistor R16 is connected to the power supply;

[0007] The battery detection module includes a plurality of second chips, a plurality of fourth chips, a plurality of current monitoring modules and a plurality of telecommunication ports of identification cards;

[0008] Pin 1 of each second chip is electrically connected to a pin of the first chip, pin 3 of the second chip is connected in parallel to the output end of the current monitoring module and one end of the resistor R97, and the other end of the resistor R97 is connected in parallel to the telecommunications port 1 of the identification card and pin 4 of the second chip;

[0009] Pin 4 of the fourth chip is connected in parallel to pin 53 of the first chip and one end of resistor R117, the other end of resistor R117 is connected to a power supply, pin 5 of the fourth chip is connected in parallel to pin 52 of the first chip and one end of resistor R116, the other end of resistor R116 is connected to a power supply, pin 9 of the fourth chip is connected in parallel to one end of capacitor C1 and one end of resistor R114, pin 10 of the fourth chip is connected in parallel to the other end of capacitor C1 and one end of resistor R113, the other end of resistor R113 is connected in parallel to the output end of the current monitoring module and one end of resistor R115, the other end of resistor R114 is connected in parallel to the other end of resistor R115 and then connected in series to telecommunication port 1 of the identification card;

[0010] The enable end EN of each current monitoring module is electrically connected to an enable control pin of the first chip, the output end of the enable end EN of the current monitoring module is connected in series with the resistor R4, and is connected to one end of the resistor R7 and the base of the transistor, the emitter of the transistor is connected in parallel with the other end of the resistor R7 and then grounded, the collector of the transistor is connected in parallel with the gate of the field effect tube and one end of the resistor R3, the source of the field effect tube is connected in parallel with the other end of the resistor R3 and then connected to the power supply, the drain of the field effect tube is connected in parallel with one end of the capacitor C7, one end of the capacitor C9 and the output end of the current monitoring module, and the other end of the capacitor C7 is connected in parallel with the other end of the capacitor C9 and then grounded;

[0011] The power module includes a fifth chip and a step-down circuit, the 13th pin of the fifth chip is electrically connected to the 5th port of the display module, and the 14th pin of the fifth chip is electrically connected to the 6th port of the display module.

[0012] Furthermore, pin 2 of the second chip is grounded, pin 5 of the second chip is connected in parallel to one end of a 1 μF capacitor and a power supply, and the other end of the 1 μF capacitor is grounded.

[0013] Furthermore, pin 1 of the fourth chip, pin 2 of the fourth chip, and pin 3 of the fourth chip are respectively connected in series with a resistor and then connected to the power supply, pin 6 of the fourth chip is connected to the power supply and one end of capacitor C2, the other end of capacitor C2 is grounded, pin 7 of the fourth chip is grounded, and pin 8 of the fourth chip is electrically connected to the bus input signal VBUS.

[0014] Further, the step-down circuit includes a third chip, and pin 1 of the third chip is connected in parallel to one end of capacitor C11, one end of capacitor C13, one end of electrolytic capacitor C35, and the negative pole of the LED lamp and then grounded; the other end of the capacitor C11 and the other end of the electrolytic capacitor C35 are connected in parallel to pin 3 of the third chip, a power supply and one end of a fuse F1, the other end of the fuse F1 is connected in parallel to one end of capacitor C37, one end of electrolytic capacitor C36, port 1 of power supply interface CN4 and a power supply, the other end of the capacitor C37, the other end of the electrolytic capacitor C36 and port 2 of the power supply interface CN4 are connected in parallel to ground; pin 2 of the third chip is connected in parallel to pin 4 of the third chip, the other end of capacitor C13, one end of resistor R50 and the power supply, and the other end of the resistor R50 is connected in series with the positive pole of the LED lamp.

[0015] Further, pin 1 of the fifth chip is connected in series with capacitor C3 and then connected to pin 3 of the fifth chip, pin 2 of the fifth chip is connected in series with capacitor C5 and then connected in parallel to one end of capacitor C8, pin 16 of the fifth chip and a power supply, and the other end of capacitor C8 is grounded; pin 4 of the fifth chip is connected in series with capacitor C4 and then connected to pin 5 of the fifth chip, pin 6 of the fifth chip is connected in series with one end of capacitor C6, and the other end of capacitor C6 is connected in parallel to pin 15 of the fifth chip and then grounded; pin 7 of the fifth chip is electrically connected to port 3 of the information output interface H9, pin 8 of the fifth chip is electrically connected to port 2 of the information output interface H9, and port 1 of the information output interface H9 is grounded.

[0016] Furthermore, the 3V3 power supply is connected in parallel to a number of capacitors and then grounded.

[0017] Furthermore, the model of the first chip is Arteli's AT32F403ARGT7.

[0018] Furthermore, the model of the second chip is INA180A2IDBVR.

[0019] Furthermore, the model of the third chip is AMS1117-3.3.

[0020] Furthermore, the model of the fourth chip is XP3232EEN; the model of the fifth chip is INA226AIDGSR; and the display module adopts the DC32480M035 serial port display screen of Dacai Technology, which has a touch function.

[0021] The beneficial effects of the present invention compared with the prior art are as follows:

[0022] 1. The setting of the main control module and the battery detection module of the utility model enables the battery health status of the identification card to be monitored while it is being charged, which can effectively prevent the identification card from working with a defect, reduce the safety hazards of the operators, and improve the work efficiency;

[0023] 2. The utility model can display the charging current and voltage of each identification card through the display module, and warn the identification card at the end of the battery life cycle; the battery detection module can be controlled by the main control module to cut off the charging current of the identification card that is fully charged;

[0024] 3. The utility model is provided with multiple identification card communication interfaces, which can be used for charging a single or multiple identification cards. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The utility model is further described below in conjunction with the accompanying drawings:

[0026] Figure 1 This is a schematic diagram of the first chip and its circuit connection relationship of the utility model;

[0027] Figure 2 This is a schematic diagram of the reset circuit structure of the utility model;

[0028] Figure 3 This is a schematic diagram of the debugging interface circuit structure of the utility model;

[0029] Figure 4 This is a schematic diagram of the second chip and its circuit connection relationship of the utility model;

[0030] Figure 5 This is a schematic diagram of the fourth chip and its circuit connection relationship of the utility model;

[0031] Figure 6 for Figure 4 A schematic diagram of the circuit structure of the telecommunication port of the connected identification card;

[0032] Figure 7 The circuit structure of the current monitoring module of the utility model is shown in FIG. Figure 1 ;

[0033] Figure 8 The circuit structure of the current monitoring module of the utility model is shown in FIG. Figure 2 ;

[0034] Fig. 9 This is a schematic diagram of the fifth chip and its circuit connection relationship of the utility model;

[0035] Fig.10 This is a schematic diagram of the circuit structure of the display module of the utility model;

[0036] Fig.11 This is a schematic diagram of the 3.3V step-down circuit structure of the utility model. DETAILED DESCRIPTION

[0037] In the present invention, unless otherwise specified, the directional words used, such as "up, down, top, bottom", usually refer to the directions shown in the drawings, or to the components themselves in the vertical, perpendicular or gravity directions; similarly, for ease of understanding and description, "inside and outside" refer to the inside and outside relative to the outline of each component itself, but the above-mentioned directional words are not used to limit the present invention.

[0038] like Figures 1 to 11 As shown, the utility model provides an identification card centralized detection device, including a shell and a circuit board, the circuit board includes a main control module, a battery detection module, a display module and a power module; the main control module is an embedded processor, the main control module is provided with a UART interface, an ADC interface, an IIC interface, and a GPIO interface, the main control module is connected to the battery detection module via the ADC and IIC interfaces, and the main control module is also electrically connected to the power module and the display module.

[0039] The current detection module includes a plurality of second chips, a plurality of fourth chips, a plurality of current monitoring modules and a plurality of telecommunication ports of identification cards.

[0040] The main control module includes a first chip, wherein pin 1 of the first chip is connected to one end of a resistor R51 and a positive electrode of a power supply BT1, the other end of the resistor R51 is connected to a 3V3 power supply, and the negative electrode of the power supply BT1 is grounded; pin 3 of the first chip is connected to one end of a capacitor C27 and one end of a crystal oscillator X2, pin 4 of the first chip is connected to the other end of the crystal oscillator X2 and one end of a capacitor C28, the other end of the capacitor C27 is connected in parallel to the other end of the capacitor C28 and then grounded; pin 5 of the first chip is connected to one end of a resistor R17, one end of a crystal oscillator X3 and one end of a capacitor C17, pin 6 of the first chip is connected to the other end of the resistor R17, the other end of the crystal oscillator X3 and a capacitor C18, the other end of the capacitor C17 is connected in parallel to the other end of the capacitor C18 and then grounded; Use 8MHz crystal oscillator X3; Pin 13 of the first chip is connected in series with resistor R18 and then connected to 3V3 power supply and one end of capacitor C19, and the other end of capacitor C19 is grounded; Pin 37 of the first chip is electrically connected to pin 11 of the fifth chip, and pin 38 of the first chip is electrically connected to pin 12 of the fifth chip; Pin 46 of the first chip is electrically connected to port 2 of debug interface H5, and pin 49 of the first chip is electrically connected to port 1 of debug interface H5, and pin 7 of the first chip is connected to one end of switch SW1 of the reset circuit, one end of resistor R16 and one end of capacitor C16, and the other end of switch SW1 is connected to the other end of capacitor C16 and then grounded, and the other end of resistor R16 is connected to power supply; 3V3 power supply is connected to several capacitors and then grounded;

[0041] Pin 1 of the fourth chip, pin 2 of the fourth chip, and pin 3 of the fourth chip are respectively connected in series with a resistor and then connected to the power supply, pin 4 of the fourth chip is connected in parallel to pin 53 of the first chip and one end of resistor R117, the other end of resistor R117 is connected to the power supply, pin 5 of the fourth chip is connected in parallel to pin 52 of the first chip and one end of resistor R116, and the other end of resistor R116 is connected to the power supply; pin 6 of the fourth chip is connected in parallel to the power supply and one end of capacitor C2, the other end of capacitor C2 is grounded, pin 7 of the fourth chip is grounded, pin 8 of the fourth chip is electrically connected to the bus input signal VBUS, pin 9 of the fourth chip is connected in parallel to one end of capacitor C1 and one end of resistor R114, pin 10 of the fourth chip is connected in parallel to the other end of capacitor C1 and one end of resistor R113, the other end of resistor R113 is connected in parallel to the output end of the current monitoring module and one end of resistor R115, the other end of resistor R114 is connected in parallel to the other end of resistor R115 and then connected in series to telecommunications port 1 of the identification card;

[0042] Pin 1 of each second chip is electrically connected to a pin of the first chip. In this embodiment, pin 2 of the first chip, pin 14 of the first chip, pin 15 of the first chip, pin 16 of the first chip, pin 17 of the first chip, pin 20 of the first chip, pin 21 of the first chip, pin 22 of the first chip, pin 23 of the first chip, pin 35 of the first chip, pin 41 of the first chip, pin 42 of the first chip, pin 43 of the first chip, pin 44 of the first chip, pin 45 of the first chip, and pin 50 of the first chip are electrically connected to pin 1 of a second chip respectively; pin 3 of the second chip is connected in parallel to the output end of the current monitoring module and one end of the resistor R97, and the other end of the resistor R97 is connected in parallel to the telecommunication port 1 of the identification card and pin 4 of the second chip; pin 5 of the second chip is connected in parallel to one end of a 1μF capacitor and a power supply, and the other end of the 1μF capacitor is grounded; pin 2 of the second chip is grounded.

[0043] The enable terminal EN of each current monitoring module is electrically connected to an enable control pin of the first chip, the output terminal of the enable terminal EN of the current monitoring module is connected in series with the resistor R4, and is connected to one end of the resistor R7 and the base of the transistor, the emitter of the transistor is connected in parallel with the other end of the resistor R7 and then grounded, the collector of the transistor is connected in parallel with the gate of the field effect tube and one end of the resistor R3, the source of the field effect tube is connected in parallel with the other end of the resistor R3 and then connected to the power supply, the drain of the field effect tube is connected in parallel with one end of the capacitor C7, one end of the capacitor C9 and the output terminal of the current monitoring module, the other end of the capacitor C7 is connected in parallel with the other end of the capacitor C9 and then grounded; the model of the transistor is S8050M-C, and the model of the field effect tube is AO3401.

[0044] The power module includes a step-down circuit and a fifth chip; the step-down circuit includes a third chip, and pin 1 of the third chip is connected in parallel to one end of a capacitor C11, one end of a capacitor C13, one end of an electrolytic capacitor C35, and the negative pole of an LED lamp, and then grounded; the other end of the capacitor C11 and the other end of the electrolytic capacitor C35 are connected in parallel to pin 3 of the third chip, a power supply and one end of a fuse F1, the other end of the fuse F1 is connected in parallel to one end of a capacitor C37, one end of an electrolytic capacitor C36, port 1 of a power supply interface CN4, and a power supply, the other end of the capacitor C37, the other end of the electrolytic capacitor C36, and port 2 of the power supply interface CN4 are connected in parallel to ground; pin 2 of the third chip is connected in parallel to pin 4 of the third chip, the other end of the capacitor C13, one end of a resistor R50, and a power supply, and the other end of the resistor R50 is connected in series The positive pole of the LED lamp is connected; pin 1 of the fifth chip is connected in series with capacitor C3 and then connected to pin 3 of the fifth chip, pin 2 of the fifth chip is connected in series with capacitor C5 and then connected to one end of capacitor C8, pin 16 of the fifth chip and the power supply, and the other end of capacitor C8 is grounded; pin 4 of the fifth chip is connected in series with capacitor C4 and then connected to pin 5 of the fifth chip, pin 6 of the fifth chip is connected in series with one end of capacitor C6, and the other end of capacitor C6 is connected to pin 15 of the fifth chip and then grounded; pin 7 of the fifth chip is electrically connected to port 3 of the information output interface H9, pin 8 of the fifth chip is electrically connected to port 2 of the information output interface H9, and port 1 of the information output interface H9 is grounded; pin 13 of the fifth chip is electrically connected to port 5 of the display module, and pin 14 of the fifth chip is electrically connected to port 6 of the display module.

[0045] The utility model fixes the identification card through the identification card slot arranged on the shell, the model of the first chip is AT32F403ARGT7 of Artly, the model of the second chip is INA180A2IDBVR, the model of the third chip is AMS1117-3.3, the model of the fourth chip is XP3232EEN, the model of the fifth chip is INA226AIDGSR, and the display module adopts the DC32480M035 serial port display screen of Dacai Technology, which has a touch function.

[0046] When charging a single or multiple identification cards, the charging interface on the identification card is electrically connected to the telecommunications port of the identification card of the utility model. When the battery of the identification card cannot be charged normally, the battery detection module of the utility model detects the current abnormality and displays the voltage and current information of the corresponding identification card through the display screen, so that the identification card battery in a sub-healthy state can be replaced and repaired, realizing centralized charging integration and having a battery detection function.

[0047] The utility model can realize charging and power detection for 20 identification cards at the same time by setting the first chip and its circuit connection relationship, the second chip and its circuit connection relationship and the fourth chip and its circuit connection relationship. Those skilled in the art can realize charging and power detection for a required number of identification cards at the same time based on the design concept of the utility model as needed.

[0048] Regarding the specific structure of the utility model, it should be explained that the connection relationship between the various component modules adopted in the utility model is definite and feasible. Except for special instructions in the embodiments, the specific connection relationship can bring corresponding technical effects and solve the technical problems raised by the utility model without relying on the execution of corresponding software programs. The components, modules, models of specific components and the connection methods between each other appearing in the utility model, as well as the conventional use methods and expected technical effects brought about by the above-mentioned technical features, except for specific instructions, all belong to the disclosed contents in patents, journal articles, technical manuals, technical dictionaries, and textbooks that can be obtained by technical personnel in this field before the application date, or belong to the existing technologies such as conventional technologies and common knowledge in this field, and there is no need to elaborate, so that the technical solution provided in this case is clear, complete and feasible, and the corresponding physical products can be reproduced or obtained according to the technical means.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model, rather than to limit it. Although the utility model has been described in detail with reference to the aforementioned embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the utility model.

Claims

1. A centralized detection device for identification cards, characterized in that: It includes a housing and a circuit board, wherein a main control module is arranged on the circuit board, and the main control module is electrically connected to a battery detection module, a display module and a power supply module; The main control module includes a first chip, wherein pin 1 of the first chip is connected to one end of a resistor R51 and a positive electrode of a power supply BT1, the other end of the resistor R51 is connected to a 3V3 power supply, and the negative electrode of the power supply BT1 is grounded; pin 3 of the first chip is connected to one end of a capacitor C27 and one end of a crystal oscillator X2, pin 4 of the first chip is connected to the other end of the crystal oscillator X2 and one end of a capacitor C28, and the other end of the capacitor C27 is connected to the other end of the capacitor C28 and then grounded; pin 5 of the first chip is connected to one end of a resistor R17, one end of a crystal oscillator X3, and one end of a capacitor C17, pin 6 of the first chip is connected to the other end of the resistor, the other end of the crystal oscillator X3, and a capacitor C18, and the other end of the capacitor C17 is connected to the capacitor C18. The other end of C18 is connected in parallel and then grounded; the 13th pin of the first chip is connected in series with the resistor R18 and then connected to the 3V3 power supply and one end of the capacitor C19, and the other end of the capacitor C19 is grounded; the 37th pin of the first chip is electrically connected to the 11th pin of the fifth chip, and the 38th pin of the first chip is electrically connected to the 12th pin of the fifth chip; the 46th pin of the first chip is electrically connected to the 2nd port of the debug interface H5, and the 49th pin of the first chip is electrically connected to the 1st port of the debug interface H5, the 7th pin of the first chip is connected in parallel to one end of the switch SW1 of the reset circuit, one end of the resistor R16 and one end of the capacitor C16, the other end of the switch SW1 is connected in parallel to the other end of the capacitor C16 and then grounded, and the other end of the resistor R16 is connected to the power supply; The battery detection module includes a plurality of second chips, a plurality of fourth chips, a plurality of current monitoring modules and a plurality of telecommunication ports of identification cards; Pin 1 of each second chip is electrically connected to a pin of the first chip, pin 3 of the second chip is connected in parallel to the output end of the current monitoring module and one end of the resistor R97, and the other end of the resistor R97 is connected in parallel to the telecommunications port 1 of the identification card and pin 4 of the second chip; Pin 4 of the fourth chip is connected in parallel to pin 53 of the first chip and one end of resistor R117, the other end of resistor R117 is connected to a power supply, pin 5 of the fourth chip is connected in parallel to pin 52 of the first chip and one end of resistor R116, the other end of resistor R116 is connected to a power supply, pin 9 of the fourth chip is connected in parallel to one end of capacitor C1 and one end of resistor R114, pin 10 of the fourth chip is connected in parallel to the other end of capacitor C1 and one end of resistor R113, the other end of resistor R113 is connected in parallel to the output end of the current monitoring module and one end of resistor R115, the other end of resistor R114 is connected in parallel to the other end of resistor R115 and then connected in series to telecommunication port 1 of the identification card; The enable end EN of each current monitoring module is electrically connected to an enable control pin of the first chip, the output end of the enable end EN of the current monitoring module is connected in series with the resistor R4, and is connected to one end of the resistor R7 and the base of the transistor, the emitter of the transistor is connected in parallel with the other end of the resistor R7 and then grounded, the collector of the transistor is connected in parallel with the gate of the field effect tube and one end of the resistor R3, the source of the field effect tube is connected in parallel with the other end of the resistor R3 and then connected to the power supply, the drain of the field effect tube is connected in parallel with one end of the capacitor C7, one end of the capacitor C9 and the output end of the current monitoring module, and the other end of the capacitor C7 is connected in parallel with the other end of the capacitor C9 and then grounded; The power module includes a fifth chip and a step-down circuit, the 13th pin of the fifth chip is electrically connected to the 5th port of the display module, and the 14th pin of the fifth chip is electrically connected to the 6th port of the display module.

2. The identification card centralized detection device according to claim 1, characterized in that: Pin 2 of the second chip is grounded, pin 5 of the second chip is connected in parallel to one end of a 1 μF capacitor and a power source, and the other end of the 1 μF capacitor is grounded.

3. The identification card centralized detection device according to claim 1, characterized in that: Pin 1 of the fourth chip, pin 2 of the fourth chip, and pin 3 of the fourth chip are respectively connected in series with a resistor and then connected to the power supply, pin 6 of the fourth chip is connected to the power supply and one end of capacitor C2, the other end of capacitor C2 is grounded, pin 7 of the fourth chip is grounded, and pin 8 of the fourth chip is electrically connected to the bus input signal VBUS.

4. The identification card centralized detection device according to claim 1, characterized in that: The step-down circuit includes a third chip, and pin 1 of the third chip is connected in parallel to one end of capacitor C11, one end of capacitor C13, one end of electrolytic capacitor C35, and the negative pole of the LED lamp and then grounded; the other end of the capacitor C11 and the other end of the electrolytic capacitor C35 are connected in parallel to pin 3 of the third chip, a power supply and one end of a fuse F1, the other end of the fuse F1 is connected in parallel to one end of capacitor C37, one end of electrolytic capacitor C36, port 1 of power supply interface CN4 and a power supply, the other end of the capacitor C37, the other end of the electrolytic capacitor C36 and port 2 of the power supply interface CN4 are connected in parallel to ground; pin 2 of the third chip is connected in parallel to pin 4 of the third chip, the other end of capacitor C13, one end of resistor R50 and the power supply, and the other end of the resistor R50 is connected in series with the positive pole of the LED lamp.

5. The identification card centralized detection device according to claim 1, characterized in that: Pin 1 of the fifth chip is connected in series with capacitor C3 and then connected to pin 3 of the fifth chip, pin 2 of the fifth chip is connected in series with capacitor C5 and then connected in parallel to one end of capacitor C8, pin 16 of the fifth chip and a power supply, and the other end of capacitor C8 is grounded; pin 4 of the fifth chip is connected in series with capacitor C4 and then connected to pin 5 of the fifth chip, pin 6 of the fifth chip is connected in series with one end of capacitor C6, and the other end of capacitor C6 is connected in parallel to pin 15 of the fifth chip and then grounded; pin 7 of the fifth chip is electrically connected to port 3 of the information output interface H9, pin 8 of the fifth chip is electrically connected to port 2 of the information output interface H9, and port 1 of the information output interface H9 is grounded.

6. The identification card centralized detection device according to claim 1, characterized in that: The 3V3 power supply is connected in parallel to a number of capacitors and then grounded.

7. The identification card centralized detection device according to claim 1, characterized in that: The model of the first chip is Arteli's AT32F403ARGT7.

8. The identification card centralized detection device according to claim 1, characterized in that: The model of the second chip is INA180A2IDBVR.

9. The identification card centralized detection device according to claim 4, characterized in that: The model of the third chip is AMS1117-3.

3.

10. The identification card centralized detection device according to claim 1, characterized in that: The model of the fourth chip is XP3232EEN; the model of the fifth chip is INA226AIDGSR; the display module adopts the DC32480M035 serial port display screen of Dacai Technology, which has a touch function.

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