Image sensor and electronic device

Abstract

The utility model provides an image sensor and an electronic device, and the image sensor comprises a semiconductor substrate which is provided with a first surface and a second surface which are opposite to each other, and comprises a device function layer; one side, facing the second surface of the semiconductor substrate, of the electrically modified layer is exposed out of the device functional layer; the device isolation region is located in the device function layer, and a contact part is arranged between one side far away from the first surface of the semiconductor substrate and the electrical modification layer; the first doped region is at least located in the electrically modified layer and is correspondingly located between the device isolation regions. According to the utility model, the isolation of the pixel areas of the image sensor is designed, so that the isolation between the pixel areas can be effectively realized, the problem of electrical crosstalk in the prior art is relieved, the size of the pixel can be flexibly obtained according to actual requirements, and the design of a small-pixel device is facilitated.

Description

Technical Field

[0001] The utility model belongs to the field of image acquisition, and in particular relates to an image sensor and electronic equipment. Background Art

[0002] Image sensors are an important component of digital cameras. Depending on the components, they can be divided into two categories: CCD (charge coupled device) and CMOS (metal oxide semiconductor). With the continuous development of CMOS integrated circuit manufacturing technology, especially the design and manufacturing technology of CMOS image sensors, CMOS image sensors have gradually replaced CCD image sensors and become the mainstream. CMOS image sensors have the advantages of low voltage, low power consumption, low cost and high integration, and have important application value in the fields of machine vision, consumer electronics, high-definition monitoring and medical imaging.

[0003] However, as the pixel size becomes smaller and smaller, the full well capacity (FWC) and dynamic range requirements of the pixel become higher and higher, and the thickness of the substrate (such as the silicon substrate) needs to be larger and larger. The difficulty that comes with it is that the isolation (such as P-type ion doping injection) needs to be deeper and deeper, that is, the energy required is getting larger and larger, and the corresponding photoresist needs to be thicker and thicker. However, it is limited by the exposure process, such as the exposure aspect ratio of the photoresist. When the photoresist is too thick, the critical dimension CD required to ensure the photoresist morphology is too large. This cannot meet the area requirements of the photoelectric conversion element (such as PD) for small pixels, making it difficult to obtain excellent performance in the small pixel process. The electrical signal crosstalk and area acquisition caused by the above-mentioned problems of small pixels are difficult to effectively solve.

[0004] Therefore, it is necessary to provide an image sensor and an electronic device to solve the problems of electrical signal crosstalk, effective area acquisition and process implementation of small pixels in the prior art. Utility Model Content

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide an image sensor and an electronic device for solving the problems of blooming of electrical signals between pixels of the image sensor in the prior art, effective acquisition of the photosensitive area on demand, and process implementation.

[0006] In order to achieve the above-mentioned object and other related objects, the utility model provides a method for preparing an image sensor, and the preparation method comprises the following steps:

[0007] Providing a semiconductor substrate, wherein the semiconductor substrate comprises a device function layer;

[0008] The device function layer includes an electrical modification layer, the semiconductor substrate has a first surface and a second surface opposite to each other, and a side of the electrical modification layer facing the second surface is exposed to the device function layer;

[0009] Prepare a first barrier layer on the first surface of the semiconductor substrate;

[0010] Preparing a device isolation region in the device functional layer based on the first barrier layer, wherein a contact portion is formed between a side of the device isolation region away from the first surface and the electrical property modification layer;

[0011] Prepare a second barrier layer on the first surface of the semiconductor substrate;

[0012] Based on the second barrier layer, a first doping region is formed at least in the electrical property modification layer, and the first doping region is correspondingly prepared between the device isolation regions.

[0013] Optionally, the method for forming the electrical modification layer in the device functional layer includes:

[0014] A first ion implantation is performed from the first surface to the corresponding device function layer, and a side of the ion implantation layer facing the second surface is exposed to the device function layer to obtain the electrical property modification layer.

[0015] Optionally, a first ion implantation without a mask is performed from the first surface to form an electrical property modification layer.

[0016] Optionally, the method for forming the electrical modification layer in the device functional layer includes:

[0017] The electrical modification layer is prepared based on an epitaxial process; an epitaxial compensation layer is formed on the electrical modification layer based on an epitaxial process, and the electrical modification layer and the epitaxial compensation layer thereon form the device functional layer;

[0018] A semiconductor substrate having a first surface and a second surface is obtained based on the device functional layer, and a side of the electrical property modification layer facing the second surface of the semiconductor substrate is exposed to the device functional layer.

[0019] Optionally, after forming the first doping region, the preparation method further comprises the steps of:

[0020] Prepare a third barrier layer on the first surface of the semiconductor substrate;

[0021] Based on the third blocking layer, a second doped region is formed in at least the remaining device functional layer on the electrical modification layer, and the second doped region is located between the device isolation regions and corresponds to the first doped region, wherein the third blocking layer and the second blocking layer can be the same or different blocking layers.

[0022] The utility model further provides an image sensor, wherein the image sensor is preferably prepared by the preparation method of the image sensor of the utility model, and of course, other methods can also be used for preparation, and the image sensor includes:

[0023] A semiconductor substrate having a first surface and a second surface opposite to each other, and including a device functional layer;

[0024] An electrical modification layer, configured corresponding to the device functional layer, wherein a side of the electrical modification layer facing the second surface of the semiconductor substrate is exposed from the device functional layer;

[0025] a device isolation region, located in the device functional layer, wherein a side of the device isolation region away from the first surface of the semiconductor substrate has a contact portion with the electrical property modification layer; and

[0026] The first doped region is at least located in the electrical property modification layer and correspondingly located between the device isolation regions.

[0027] Optionally, the device functional layer further includes an epitaxial compensation layer, which is formed on the electrical modification layer, or there is a distance between a side of the electrical modification layer facing the first surface of the semiconductor substrate and a side of the device functional layer facing the first surface of the semiconductor substrate.

[0028] Optionally, the device isolation area is arranged in a mesh shape, and the mesh device isolation area defines a plurality of pixel areas.

[0029] Optionally, the image sensor further includes a second doping region, wherein the second doping region is located between the device isolation regions and corresponds to the first doping region.

[0030] Optionally, the electrical modification layer covers a side facing the second surface and is exposed from the device functional layer.

[0031] Optionally, the doping concentration of the electrical property modification layer is greater than the doping concentration of the remaining device functional layers.

[0032] Optionally, the doping concentration of the electrical modification layer is greater than the doping concentration of the epitaxial compensation layer.

[0033] Optionally, the doping concentration of the device isolation region is equal to the doping concentration of the electrical property modification layer.

[0034] Optionally, the doping concentration of the first doping region is equal to the doping concentration of the second doping region.

[0035] Optionally, the first doped region extends from the electrical property modification layer to the remaining device functional layer to form a doped region of the photoelectric conversion element.

[0036] Optionally, the device function layer, the electrical modification layer, the device isolation region and the epitaxial compensation layer have the same doping type and are different from the doping type of the first doping region. The first doping region and the second doping region have the same doping type.

[0037] Optionally, the image sensor includes a plurality of pixel units and an isolation overflow region extending from a first surface of a device functional layer close to a semiconductor substrate to an interior of the device functional layer, wherein the device isolation region is located between adjacent pixel units, the isolation overflow region is located within the pixel unit, and a spacing is provided between the isolation overflow region and the electrical modification layer to form an overflow channel based on an area corresponding to the spacing.

[0038] Optionally, a recessed region is formed on a side of the isolation overflow region facing the electrical modification layer, and the overflow channel between preset sub-pixels in the pixel unit is formed based on the recessed region.

[0039] Optionally, a central recessed area corresponding to the center of the pixel unit is formed on one side of the isolation overflow area facing the electrical modification layer, and an overflow channel between sub-pixels in the pixel unit is formed based on the central recessed area.

[0040] Optionally, the pixel unit includes at least two sub-pixels, and the isolation overflow region is arranged between adjacent sub-pixels.

[0041] The utility model provides an electronic device comprising the image sensor described in any one of the above schemes.

[0042] As described above, the image sensor and electronic device of the utility model have the following beneficial effects: the utility model designs the isolation of the pixel area of ​​the image sensor and improves the preparation process steps, which can effectively realize the isolation between the pixel areas, alleviate the electrical crosstalk (blooming) problem in the prior art, and can also flexibly obtain the pixel size according to actual needs, which is conducive to the design of small pixel devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 Shown is a basic structural block diagram of an image sensor system.

[0044] Figure 2 Shown is a schematic diagram of a pixel circuit of an image sensor.

[0045] Figure 3 Shown is a process flow chart for preparing an image sensor provided in an embodiment of the present application.

[0046] Figures 4 to 12 The schematic diagram shows the structure obtained in each step of preparing the image sensor provided in the first embodiment of the present application, wherein: Fig.12 Shown is a diagram of the structure after the gate of a transistor element is prepared.

[0047] Fig.13 Shown is an image sensor structure with an isolated overflow region provided in the first embodiment of the present application.

[0048] Fig.14 Display as Fig.13 Top view corresponding to the pixel unit in .

[0049] Fig.15 Display as Fig.14 Schematic diagram of the cross-sectional structure corresponding to point AB.

[0050] Fig.16 Shown is a schematic diagram of a photoelectric conversion region for forming a potential gradient provided in the first embodiment of the present application.

[0051] Figures 17 to 20 The schematic diagram shows the structure obtained in each step of preparing the image sensor provided in the second embodiment of the present application, wherein: Fig. 20 Shown is a structural diagram after preparing two doped regions.

[0052] Fig.21 Shown is a schematic diagram of a cross-sectional structure obtained from a comparative example provided in this application.

[0053] Fig. 22 Shown is a comparison diagram of a top view of a structure obtained by a comparative example and an embodiment provided in the present application.

[0054] Component number description

[0055] 101, 501-semiconductor substrate; 102, 502-electrical modification layer; 103, 503-device isolation region; 104, 504-first doping region; 105, 505-second doping region; 106-gate; 107-isolation overflow region; 108-central recessed region; 1011-pixel unit; s-overflow channel; 502'-epitaxial compensation layer. DETAILED DESCRIPTION

[0056] The following is an explanation of the implementation of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0057] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components.

[0058] Features described and / or shown for one embodiment may be used in one or more other embodiments in the same or similar manner, combined with features in other embodiments, or replace features in other embodiments. For example, when describing the embodiments of the utility model in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general proportion. The schematic view is only an example and should not limit the scope of protection of the present invention. In actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0059] For ease of description, when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or one or more intervening layers may exist. A structure described as having a first feature "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which another feature is formed between the first and second features, so that the first and second features may not be in direct contact. In addition, "coupled" means that it can be directly or indirectly connected.

[0060] The illustrations provided in this embodiment are only used to illustrate the basic concept of the utility model in a schematic manner, so the illustrations only show the components related to the utility model rather than the number, shape and size of the components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the layout of the components may also be more complicated. The contents proposed by the utility model are described in detail below in conjunction with the accompanying drawings.

[0061] Figure 1 The basic structure block diagram of an image sensor system is shown. The image sensor includes a readout circuit and a control circuit connected to a pixel array. In addition, a functional logic unit is connected to the readout circuit, and the readout circuit and the control circuit are connected to a status register to realize the control of the pixel array. The pixel array includes a plurality of pixels (P1, P2, P3) arranged in rows (R1, R2, R3...Ry) and columns (C1, C2, C3...Cx). The pixel signal output by the pixel array is output to the readout circuit via the column line. In some applications, after the pixel acquires the image data, it is read out using the readout mode specified by the status register and then transmitted to the functional logic unit. In a specific implementation, the readout circuit may include an analog-to-digital conversion (ADC) circuit and other circuits.

[0062] In some applications, the status register may include a programmable selection system to determine whether the readout system is exposed and readout through a rolling shutter mode or a global shutter mode. The functional logic unit may store raw image data or image data after image processing. In some implementations, the readout circuit may read out a row of image data at a time along the readout column line. Of course, other methods may also be used to read out the image data. The operation of the control circuit can be determined by the current setting of the status register. For example, the control circuit generates a shutter signal for controlling image acquisition. In some applications, this shutter signal can be a global exposure signal so that all pixels of the pixel array simultaneously acquire their image data through a single acquisition window. In other applications, this shutter signal can also be a rolling exposure signal so that the pixels of each pixel row of the pixel array continuously implement exposure reading operations through the acquisition window.

[0063] Figure 2 A schematic diagram of a pixel unit in an image sensor is shown. Figure 2 As shown in the figure, each pixel unit includes a photoelectric conversion element (e.g., a photodiode PD) and a pixel circuit (as shown in the dotted box in the figure). The photodiode can be a buried photodiode (PPD) used in current image sensors. In an application example, the pixel circuit includes a reset transistor (RST), a source follower transistor (SF), and a pixel selection transistor (RS), which are connected to the transistors shown in the figure. Figure 2 The transfer transistor (TX) and photodiode shown in . In a stacked structure application example, the pixel circuit includes a reset transistor, a source follower transistor, a pixel selection transistor disposed on a first circuit chip, and also includes a transfer transistor disposed on a second circuit chip, and the photodiode in the second circuit chip is connected to other transistors in the first circuit chip based on the transfer transistor. In a further application example, the pixel circuit may also include a gain control transistor (DCG) connected between a floating diffusion region (FD) and a reset transistor. During operation, the photoelectric conversion element generates photocharges in response to incident light during exposure, the transfer transistor is connected to a transfer signal, which controls the transfer transistor to transfer the accumulated charge in the photoelectric conversion element to the floating diffusion region, the reset transistor is connected between the power supply voltage and the floating diffusion region, responds to the reset signal to reset the sensor pixel circuit (for example, discharges or charges the floating diffusion region and the photodiode to the current voltage), the floating diffusion region is connected to the gate of the source follower transistor, the source follower transistor is connected between the power supply voltage and the pixel selection transistor, responds to the potential of the floating diffusion region and outputs it, the pixel selection transistor connects the source follower transistor and the bit line, responds to the pixel selection control signal to implement pixel selection readout and outputs it to the readout column.

[0064] However, as the pixel size of existing image sensors becomes smaller and smaller, the full well and dynamic range of pixels are becoming more and more demanding, and the requirements for the manufacturing process are becoming higher and higher. It is difficult for traditional processes to effectively achieve isolation between pixels and flexibly obtain the required size according to actual needs. This is more obvious in small pixel devices. There is electrical signal crosstalk between pixels or the pixel size cannot meet the requirements. It is difficult to effectively realize the preparation of devices using traditional processes. The electrical signal crosstalk and area acquisition caused by the above problems are difficult to effectively solve. The utility model can effectively improve the above problems through the design of the image sensor manufacturing process and structure.

[0065] Embodiment 1:

[0066] See also Figures 3 to 16 As shown, this embodiment provides a method for preparing an image sensor. Figure 3 The flowchart of the preparation method is shown, and the preparation method comprises the following steps:

[0067] S1: providing a semiconductor substrate, wherein the semiconductor substrate comprises a device functional layer;

[0068] S2: an electrical modification layer is formed in the device functional layer, the semiconductor substrate has a first surface and a second surface opposite to each other, and a side of the electrical modification layer facing the second surface is exposed in the device functional layer;

[0069] S3: preparing a first barrier layer on the first surface of the semiconductor substrate;

[0070] S4: preparing a device isolation region in the device functional layer based on the first barrier layer, wherein a contact portion is formed between a side of the device isolation region away from the first surface and the electrical property modification layer;

[0071] S5: preparing a second barrier layer on the first surface of the semiconductor substrate;

[0072] S6: forming a first doped region at least in the electrical property modification layer based on the second barrier layer, and the first doped region is correspondingly prepared between the device isolation regions.

[0073] It should be noted that the preparation order of the above steps corresponding to the existing process can be changed according to actual needs without affecting the realization of the beneficial effects of the present application, and is not limited to the above order of S1 to S6.

[0074] The preparation of the image sensor according to the embodiment of the present application will be described in detail below with reference to specific drawings.

[0075] First, if Figure 4-5As shown, steps S1 and S2 are performed to provide a semiconductor substrate 101, the semiconductor substrate 101 includes a device function layer, an electrical modification layer 102 is formed in the device function layer, the semiconductor substrate 101 has a first surface 101a and a second surface 101b opposite to each other, and the electrical modification layer 101 is exposed to the device function layer on the side facing the second surface 101b of the semiconductor substrate 101. The electrical modification layer 101 may be fully exposed on the surface of the device function layer, or a portion of the electrical modification layer 101 may be exposed on the device function surface.

[0076] In one example, the device functional layer has a first doping type of doping. In this embodiment, the first doping type is described as P-type to obtain a corresponding type of image sensor. Of course, in other examples, the first doping type can also be set to N-type according to actual conditions corresponding to different types of image sensors.

[0077] See also Figure 4 As shown, the semiconductor substrate 101 has a first surface 101a (front surface) and a second surface 101b (back surface) opposite to each other. The semiconductor substrate 101 may be a structure composed of a single material layer, including but not limited to a silicon substrate, and its material may be single crystal silicon, single crystal germanium, polycrystalline silicon, amorphous silicon, or a silicon germanium compound, etc. Of course, the semiconductor substrate 101 may also be silicon on insulator SOI, etc. In addition, the semiconductor substrate 101 may also have an N-type doped or P-type doped region to meet actual needs.

[0078] In addition, the semiconductor substrate 101 as the substrate of the image sensor may also be a multi-layer structure, such as including a semiconductor substrate and an epitaxial layer formed on the surface of the semiconductor substrate. In this case, the epitaxial layer serves as a device functional layer to realize the preparation of the image sensor device. In addition, in other embodiments, the semiconductor substrate 101 may be any structure used to prepare the image sensor functional area in the field of image sensors, and the photosensitive element, each transistor, and interconnection wiring of the CMOS image sensor may be prepared based on the semiconductor substrate 101.

[0079] In one example, the device functional layer may be a part of the semiconductor substrate 101, for example, it may be a P-type epitaxial layer (EPI) formed on a semiconductor substrate (such as a silicon substrate), and the epitaxial layer may be directly formed by an epitaxial process, or may be formed by other methods of existing processes. In this case, the semiconductor substrate and the epitaxial layer constitute the semiconductor substrate 101, and the epitaxial layer serves as the device functional layer. In one implementation, each functional region (including semiconductor devices) in the image sensor is prepared in the device functional layer. In other examples, the semiconductor substrate 101 as a whole may be considered to be a device functional layer of the first doping type, in which case the functional region in the image sensor may be prepared in the semiconductor substrate 101. Of course, if necessary, the structure required for the image sensor may also be prepared in the semiconductor substrate or in other material layers. Further, a back-illuminated image sensor may be prepared based on the semiconductor substrate and the device functional layer.

[0080] It should be noted that, in order to facilitate the description and display of the relationship between various structures and regions in the image sensor preparation process, the semiconductor substrate 101 in the various drawings of this embodiment can be directly understood as the device functional layer, the first surface 101a of the semiconductor substrate 101 can be directly understood as the first surface of the device functional layer, and the second surface 101b of the semiconductor substrate 101 can be directly understood as the second surface of the device functional layer.

[0081] See also Figure 5 As shown, in one implementation, the method for preparing an electrical modification layer 102 in a device functional layer includes: performing a first ion implantation from a first surface 101a of a semiconductor substrate 101 corresponding to the device functional layer, and making a side of the ion implantation layer facing a second surface 101b of the semiconductor substrate 101 exposed to the device functional layer, and obtaining the electrical modification layer 102 based on the ion implantation layer.

[0082] Among them, the electrical modification layer 102 exposed in the device functional layer can be formed by directly implanting the first ion into the device functional layer on the side of the second surface 101b of the semiconductor substrate 101; or the ion implantation layer can be formed by ion doping in the device functional layer through the first ion implantation. Further, in subsequent processes, such as the flipping and thinning process of the semiconductor substrate 101, the semiconductor substrate 101 is thinned to form an ion implantation layer exposed on the back side of the device functional layer, and the electrical modification layer 102 is obtained based on the ion implantation layer.

[0083] As an example, the doping type of the electrical modification layer 102 is consistent with the doping type of the device functional layer, and both are the first doping type. In a further example, the doping concentration of the electrical modification layer 102 is greater than the doping concentration of the device functional layer, so as to facilitate signal isolation between adjacent pixels and improve electrical crosstalk. The doping concentration here is the first type doping concentration of the corresponding area when it is finally formed in the image sensor.

[0084] In one implementation, a maskless first ion implantation is performed from the first surface 101a of the semiconductor substrate 101 to form the electrical modification layer 102. The maskless implantation may be performed directly without setting a mask in the region corresponding to the device functional layer, for example, the region corresponding to the pixel array of the image sensor may be implanted directly in a large area without setting a mask, or the region corresponding to the chip of the entire image sensor may be implanted directly, so as to improve the doping concentration of the corresponding region as a whole by simplifying the implantation process.

[0085] Then, if Figure 6-7 As shown, steps S3 and S4 are performed to prepare a first barrier layer 201 on the first surface 101a of the semiconductor substrate 101, and a device isolation region 103 is prepared in the device functional layer based on the first barrier layer 201, wherein a side of the device isolation region 103 away from the first surface 101a of the semiconductor substrate has a contact portion with the electrical modification layer 103, and the figure shows an example in which the entire surface of the device isolation region 103 is in contact.

[0086] As an example, the doping type of the device isolation region 103 is consistent with the doping type of the electrical modification layer 102, and both are the first doping type. In a further example, the doping concentration of the device isolation region 103 is consistent with the doping concentration of the electrical modification layer 102, and a region with corresponding upper and lower doping concentrations can be formed in the device function layer corresponding to the device isolation region 103, so that a plurality of pixels can be isolated based on the region.

[0087] Specifically, there is a contact portion between the device isolation region 103 and the electrical modification layer 102, which can effectively form an isolation region between pixels. The provision of the contact portion is conducive to preventing crosstalk of electrical signals between adjacent pixels isolated by the device isolation region 103. In addition, the prior formation of the electrical modification layer 102 can simplify the formation process of the device isolation region 103. Preferably, the entire surface of the device isolation region 103 on one side facing the second surface 101b of the semiconductor substrate 101 is in contact with the electrical modification layer 102 to form the above-mentioned contact portion. Of course, in other examples, the contact portion can also be formed by partial surface contact according to actual needs.

[0088] In one implementation, the preparation of the device isolation region 103 specifically includes:

[0089] First, if Figure 6 As shown, a first barrier layer 201 is formed on the first surface 101a of the semiconductor substrate 101, and the first barrier layer 201 includes a barrier block 201a and an opening area 201b, wherein the opening area 201b is removed in a subsequent process to form a device isolation area 103 corresponding to the area. In one example, the first barrier layer 201 is a photoresist layer; then, as shown in FIG. Figure 7 As shown, the remaining material of the blocking block 201a of the material layer at the opening region 201b is removed to serve as a mask layer for a subsequent ion implantation process to form a device isolation region 103.

[0090] Specifically, when the material of the first barrier layer 201 is selected as photoresist, the material layer of the opening area 201b is removed by using an exposure and development process. Based on the technical solution of the utility model, since the electrical modification layer 102 corresponds to the device functional layer design, the process of using a photolithography process to form a mask layer for ion implantation is easy to implement. Further, a maskless implantation process corresponding to the semiconductor substrate can also be used. At the same time, a device isolation area 103 is formed on the electrical modification layer 102, which can reduce the depth of the device isolation area 103 and does not affect the isolation effect between adjacent pixels. The device isolation area 103 with a smaller depth is conducive to the implementation of the photolithography process, thereby optimizing the critical size CD1 and quality of the photoresist corresponding to the opening area 201b, which is conducive to obtaining the required pixel size, and can increase the critical size CD2 corresponding to the photoelectric conversion element, and ultimately improve the device performance.

[0091] As an example, the first barrier layer 201 has an opening area 201b, and the opening area 201b defines a plurality of pixel areas, and the device isolation area 103 located between adjacent pixel areas is obtained based on the mesh-shaped opening area 201b and the second ion implantation. The pixel area can be designed according to the actual device requirements, and the pixel area can have one photoelectric conversion element and a corresponding pixel circuit, or multiple photoelectric conversion elements and corresponding shared pixel circuits, and the device isolation area 103 of the present application is set between adjacent pixel areas.

[0092] Specifically, the mesh opening area 201b corresponds to the shape of the pixel area to be defined. For example, the pixel array can be arranged in an array of rows and columns. The mesh opening area 201b includes lateral areas arranged at intervals and longitudinal areas arranged at intervals, and the two are arranged crosswise to have a crossover area. The lateral area and the longitudinal area are arranged vertically. Of course, there can also be an angle between the two. In addition, in addition to defining a quadrilateral area, the mesh opening area 201 can also define a hexagonal or octagonal area, which can correspond to the shape of the pixel area to be isolated. Based on the design of the present application, a mask plate can be used to form a device isolation area 103, which simplifies the process, saves costs, and can effectively improve the mask quality in the photolithography exposure process.

[0093] Finally, if Figure 8-11 As shown, steps S5 and S6 are performed to prepare a second barrier layer 301 on the first surface 101 a of the semiconductor substrate 101 , and based on the second barrier layer 301 , at least a first doped region 104 is formed in the electrical modification layer 102 , and the first doped region 104 is correspondingly prepared between the device isolation regions 103 .

[0094] As an example, after forming the first doping region 104, the image sensor manufacturing method further includes the steps of:

[0095] Forming a third barrier layer 401 on the first surface 101a of the semiconductor substrate 101;

[0096] Based on the third barrier layer 401 , a second doping region 105 is formed at least in the remaining device functional layer on the electrical property modification layer 102 . The second doping region 105 is located between the device isolation regions 103 and corresponds to the first doping region.

[0097] In one implementation, the preparation of the first doping region 104 and the second doping region 105 specifically includes:

[0098] First, if Figure 8 As shown, a second barrier layer 301 is formed on the first surface 101a of the semiconductor substrate 101, and the second barrier layer 301 includes a barrier block 301a and an opening area 301b, wherein the opening area 301b is removed in a subsequent process to form a first doped area 104 corresponding to the area. In one example, the second barrier layer 301 is a photoresist layer; then, as shown Fig. 9 As shown, the remaining material of the blocking block 301a of the material layer at the opening region 301b is removed to serve as a mask layer for the subsequent ion implantation process to form the first doped region 104;

[0099] Continue, as Fig.10 As shown, a third barrier layer 401 is formed on the first surface 101a of the semiconductor substrate 101, and the third barrier layer 401 includes a barrier block 401a and an opening area 401b, wherein the opening area 401b is removed in a subsequent process to form a second doped area 105 corresponding to the area. In one example, the third barrier layer 401 is a photoresist layer; finally, as shown Fig.11 As shown, the material of the remaining blocking block 401a of the material layer at the opening region 401b is removed to serve as a mask layer for a subsequent ion implantation process to form the second doping region 105.

[0100] Specifically, when the material of the second barrier layer 301 and the third barrier layer 401 is photoresist, the material layer of the opening areas 301b and 401b is removed by an exposure and development process. At this time, the opening areas 301b and 401b correspond to the critical size CD2 of the doping area of ​​the photoelectric conversion element, and the size of the corresponding pixel of the image sensor can be obtained. In one example, the first doping area 104 is formed based on the second barrier layer 301 by a third ion implantation, and the second doping area 105 is formed based on the third barrier layer 401 by a fourth ion implantation. In this example, the doping area of ​​the photoelectric conversion element, such as the first doping area and the second doping area, is formed based on a multi-pass process, which is conducive to the flexible adjustment of the doping concentration of the photoelectric conversion element. Further, the process conditions of different doping areas can be configured, such as the thickness of the second barrier layer is greater than the thickness of the fourth barrier layer, which is conducive to the improvement of device performance by the photolithography implantation process.

[0101] It should be noted that the third barrier layer 401 can also be selected as the same barrier layer as the second barrier layer 301, that is, when the second doping region 105 is implanted, the second barrier layer 301 is no longer removed, but the barrier layer of the first doping region 104 is directly used as a mask for the fourth ion implantation. Further, when forming the doping region of the photoelectric conversion element, a mask plate (barrier layer) is used for multiple implantations. In addition, for the implantation process under each barrier layer, the doping energy, dose and corresponding doping channel number can be set according to actual needs. For example, the first doping region 104 corresponding to the second barrier layer 301 can be formed by multiple implantations.

[0102] As an example, the first doping region 104 and the second doping region 105 have the same doping type, which is different from the doping type of the device isolation region 103. In this embodiment, the first doping region 104 and the second doping region 105 are both doped with the second doping type, and the N type is used as an example for explanation in this embodiment.

[0103] In one example, the injection concentration of the first doping region 104 is greater than the injection concentration of the second doping region 105, that is, in the actual injection process, there is a doping concentration difference. For example, the injection concentration of the third ion implantation forming the first doping region 104 is greater than the fourth ion implantation forming the second doping region 105. Based on the concentration difference, the concentration of the electrical modification layer 102 formed with the first doping type can be adjusted by adjusting the concentration of the first doping region 104 of the second doping type with a higher concentration, so that the overall doping level of the doping region of the photoelectric conversion element between the device isolation region 103 can be adjusted. In an optional example, after adjustment of different doping implantation processes, the device functional layer regions corresponding to the first doping region 104 and the second doping region 105 have the same doping concentration, that is, the doping concentration of the doping region of the photoelectric conversion element is consistent.

[0104] As an example, the thickness of the first doping region 104 is consistent with the thickness of the electrical modification layer 102, and the thickness of the second doping region 105 can be set according to the required thickness of the doping region of the actual photoelectric conversion element. For example, it can be formed to the surface of the device functional energy layer, and further can be the first surface 101a of the semiconductor substrate.

[0105] In another example, the first doping region 104 extends from the electrical modification layer 102 to the remaining device functional layer to form a doping region of the photoelectric conversion element. That is, in this example, the doping region of the photoelectric conversion element is formed by only one doping step. Fig.16 As shown, based on the method of this example, since the electrical modification layer 102 of the first doping type is formed first, a photoelectric conversion element doping region with a concentration gradient of the second doping type can be formed based on an injection process. In this example, the second doping type concentration in the device functional layer corresponding to the electrical modification layer 102 is low, and the second doping type concentration in the remaining device functional layer area is high, thereby forming a potential field that is conducive to the transmission of electrons to the first surface of the semiconductor substrate, thereby improving device performance.

[0106] See also Fig.12 As shown, in one implementation, after forming the first doping region 104, in one example, after forming the second doping region 105, the method for preparing the image sensor further includes the steps of:

[0107] A transistor element is prepared in the device functional layer from the first surface 101a of the semiconductor substrate 101 to obtain an image sensor based on at least the transistor element and the first doping region 104 or based on the transistor element and the first doping region 104 and the second doping region 105. Further, a back-illuminated image sensor can be prepared on this basis.

[0108] Specifically, the figure only shows a gate 106 in the transistor element, and the transistor element may also include other transistors or doping regions in the existing image sensor pixel circuit, such as a transmission transistor TX, a reset transistor RST, a source follower transistor SF, a pixel selection transistor SEL, and may further include a conversion gain transistor DCG, a charge overflow transistor OFG, etc., to form different image sensors. In addition, Fig.13 As shown, it is also shown that floating diffusion points FD1 and FD2 are formed on the first surface of the device functional layer. Of course, other structures required for the image sensor, such as the electrical interconnection layer and / or the supporting substrate, are prepared using existing processes.

[0109] The preparation of the back-illuminated image sensor also includes flipping the above structure to continue to prepare related structures based on the second surface 101b of the semiconductor substrate 101, for example, preparing structures such as back deep trench isolation BDT I, grid, color filter CFA, lens ML, etc. on the second surface of the semiconductor substrate. Based on the design of the present application, the electrical modification layer 102 and the device isolation area 103 form an isolation structure between pixels. Due to the improvement of the process, etc., an ideal isolation effect can be achieved, and it can be directly used as isolation between pixels. The preparation of the back deep trench isolation BDT I can be omitted, which simplifies the overall process steps and saves costs.

[0110] It should be noted that the design of the present application can make the electrical modification layer 102 exposed on the side of the device functional layer facing the second surface 101b of the semiconductor substrate 101, and the design can be used to improve the performance of the surface of the device functional layer, for example, the interface performance here can be improved. In the process of the back-illuminated image sensor, the semiconductor substrate (device functional layer) is thinned after flipping, so as to implement relevant subsequent processes based on the thinned surface. Based on the design of the present application, the electrical modification layer 102 of the first doping type is formed preferentially, which can be used as a pinning layer of the surface and can also repair damage during the thinning process. Furthermore, the electrical modification layer 102 formed by the ion implantation process has good pinning performance.

[0111] As an example, the electrical modification layer 102 covers and is exposed to the device functional layer on the side facing the second surface 101b of the semiconductor substrate 101. In some embodiments, the electrical modification layer 102 may be arranged corresponding to the entire surface of the device functional layer, and further, the entire corresponding surface may be the surface of the electrical modification layer 102 as the surface of the device functional layer, that is, it covers and is exposed to the device functional layer, so that the above arrangement is conducive to improving the utilization rate of device raw materials and facilitating the function of the electrical modification layer.

[0112] See also Figure 13-15 As shown, in one example, the image sensor includes a plurality of pixel units 1011, and the preparation method further includes the step of preparing an isolation overflow region 107 in the device functional layer from the first surface 101a of the semiconductor substrate 101, the device isolation region 103 is located between adjacent pixel units 1011, the isolation overflow region 107 is located within the pixel unit, and there is a spacing between the isolation overflow region 107 and the electrical modification layer 102 to form an overflow channel s based on the corresponding area of ​​the spacing, which is located on the opposite side of the device functional layer relative to the transistor.

[0113] In an optional example, each pixel unit 111 includes at least two sub-pixels, and the isolation overflow region 107 is formed between adjacent sub-pixels with overflow requirements. In addition, other isolation structures can be configured between sub-pixels that do not have overflow requirements, for example, the same structure as the device isolation region 103 between adjacent pixel units can be configured, and the two can be completed in the same process step. In addition, the isolation overflow region 107 and the device isolation region 103 can be obtained by doping with the same doping type, and the two can also have the same doping concentration, but the depths of the two are different, so that an overflow channel s is formed corresponding to the isolation overflow region 107. In addition, the isolation overflow region 107 and the device isolation region 103 can be prepared based on the same process step, or they can be prepared separately.

[0114] Specifically, sub-pixels having overflow channels s can exchange signals through the overflow channels. For example, when one of the sub-pixels has a full well, the signal can overflow to other sub-pixels.

[0115] In one example, an overflow channel s is set corresponding to all sub-pixels in the same pixel unit 1011, see Fig.14 As shown. The above design of the present application is conducive to the flexible acquisition of signals corresponding to the pixel array of the image sensor. For example, for a pixel unit that performs signal merging (binning), when the above overflow path exists, it can overflow to other sub-pixels that share the overflow channel when a certain sub-pixel is full. In the subsequent signal merging, more signals representing image information can be obtained, which can improve the linearity of the final merged signal and prevent electrical crosstalk between pixel units. In addition, full-pixel reading can be performed to obtain image information based on each sub-pixel, thereby improving the resolution of image sensor imaging, which is conducive to applications in dark light scenes.

[0116] As an example, a recessed area is formed on the side of the isolation overflow area 107 facing the electrical modification layer 102, and an overflow channel s is formed between preset sub-pixels in the pixel unit 1011 based on the recessed area; wherein the preset sub-pixel can be a sub-pixel with overflow requirements selected according to actual needs. As for the formation of the recessed area, there can be a gap between the surface of the entire isolation overflow area 107 facing the electrical modification layer 102 and the electrical modification layer 102, or there can be a gap between a part of the surface and the electrical modification layer 102, and the isolation overflow area 107 is set between adjacent preset sub-pixels to form the above-mentioned overflow channel s for signal interaction. The formation of the isolation overflow area 107 corresponding to the recessed area can be achieved by using existing processes based on one step or multiple steps.

[0117] like Fig.14 and Fig.15As shown, in an optional example, a central depression region 108 corresponding to the center of the pixel unit 1011 is formed on the side of the isolation overflow region 107 facing the electrical modification layer 102, and an overflow channel s between each sub-pixel in the pixel unit 1011 is formed based on the central depression region 108. In the figure, four sub-pixels are used as an example for explanation, and it can be considered that the parts of the four isolation overflow regions 107 between the four adjacent sub-pixels facing the surface of the electrical modification layer 102 have a spacing with the electrical modification layer 102, see Fig.15 As shown in the depression in the figure, the depression of each isolation overflow area 107 corresponds to the center of the pixel unit 1011 to form a central depression area 108; of course, in other examples, the entire surface of the four isolation overflow areas 107 facing the electrical modification layer 102 between the four adjacent sub-pixels may have a spacing with the electrical modification layer 102, and the depression in the overall depth corresponds to the center of the pixel unit 1011 to form a central depression area 108. Optionally, the central depression area 108 corresponds to the center of the pixel unit 1011 and is symmetrically arranged to correspond to each sub-pixel, and further optionally, the central depression area 108 is a centrally symmetrical pattern about the center of the pixel unit 1011.

[0118] See also Fig.21 and Fig. 22 As shown, the comparative example provides a method for obtaining the image sensor 000, such as Fig.21 As shown, ion implantation is directly performed on the first surface of the semiconductor substrate 001 to form a device isolation region 003, and a photoelectric conversion doping region 002 is formed between adjacent device isolation regions 003. Correspondingly, in order to prepare pixels of a required size, it is difficult to obtain a device isolation region 003 of an ideal depth by using the existing method, and electron leakage is likely to occur below the device isolation region 003, forming signal crosstalk (blooming); in addition, as Fig. 22 As shown, the existing direct injection method is used to form the device isolation region 003'. In order to meet the basic performance requirements of the device, a device structure with a device isolation region 003' and a photoelectric conversion doping region 002' as shown on the left side of the figure is obtained. By adopting the design of the utility model, a device isolation region 103 and a photoelectric conversion doping region 105 can be obtained accordingly, and the size of the photosensitive region can be increased, thereby meeting the photosensitive area of ​​the design requirement size, which is particularly suitable for small-size pixels, and is beneficial to improving resolution, increasing full well, and improving image quality.

[0119] See also Figure 12-16 and Fig. 20As shown, this embodiment also provides an image sensor, wherein the image sensor structure of this embodiment is preferably prepared by the above-mentioned method for preparing the image sensor. Of course, it can also be prepared by other methods. The structure and corresponding features of the device in this embodiment refer to the description of the method for preparing the image sensor, which will not be repeated here. The image sensor includes:

[0120] The semiconductor substrate 101 has a first surface 101 a and a second surface 101 b opposite to each other, and includes a device functional layer;

[0121] The electrical modification layer 102 corresponds to the device functional layer configuration, wherein the electrical modification layer 102 is exposed on the device functional layer on the side facing the second surface 101b of the semiconductor substrate 101; the semiconductor substrate 101 in the figure can be understood as the device functional layer. Of course, in other examples, the semiconductor substrate may be larger and include more structures;

[0122] The device isolation region 103 is located in the device functional layer. A contact portion is formed between the side of the device isolation region 103 away from the first surface 101a of the semiconductor substrate 101 and the electrical property modification layer 102 to improve crosstalk.

[0123] The first doped region 104 is at least located in the electrical property modification layer 102 and correspondingly located between the device isolation regions.

[0124] As an example, there is a gap between the side of the electrical modification layer 102 facing the first surface 101a of the semiconductor substrate 101 and the side of the device functional layer facing the first surface 101a of the semiconductor substrate 101. Figure 12-15 The structure shown corresponds to the preparation method of the first embodiment, the electrical modification layer 102 is prepared in the device functional layer, and the remaining device functional layers except the electrical modification layer 102 are finally retained in the image sensor.

[0125] As an example, the device isolation area 103 is arranged in a mesh shape, and the mesh device isolation area 103 defines a plurality of pixel areas; the pixel area can be defined according to actual needs, and isolation is achieved based on the device isolation area 103 .

[0126] As an example, the image sensor further includes a second doping region 105, which is located between the device isolation regions 103 and corresponds to the first doping region 104. The second doping region 105 and the first doping region 104 may correspond one to one, so as to obtain a doping region of the pixel photosensitive element based on the two, such as an N doping region.

[0127] As an example, the device functional layer, the electrical modification layer 102 and the device isolation region 103 have the same doping type, for example, they may all be doped with the first doping type, such as P-type doping; the doping types of the above regions are different from the doping types of the first doping region 104 and the second doping region 105, and the first doping region 104 and the second doping region 105 have the same doping type, for example, they may all be doped with the second doping type, such as N-type doping.

[0128] As an example, the doping concentration of the electrical modification layer 102 is greater than the doping concentration of the corresponding device functional layer, where the corresponding device functional layer refers to the remaining device functional layer portion above the electrical modification layer 102, that is, the doping concentration of the first doping type of the device functional layer before the first ion implantation is performed in Embodiment 1.

[0129] As an example, the doping concentration of the device isolation region 103 is equal to the doping concentration of the electrical modification layer 102. Here, the two have the same concentration when they are formed in the image sensor. In the implementation, since both are formed in the same device functional layer based on ion doping, the doping concentrations of the two doping processes are the same. Of course, in other implementations, since the two are performed step by step, different concentrations can also be configured based on this according to needs.

[0130] As an example, the doping concentration of the first doping region 104 is greater than the doping concentration of the second doping region 105; here, it means that during the doping process, the injection concentration of the first doping region 104 when ion injection is performed is greater than the injection concentration of the second doping region 105 when ion injection is performed. In this way, the high concentration of the first doping region 104 can balance the different types of doping concentrations of the electrical modification layer 102 in the corresponding area, so that the concentrations of the doping regions of the photosensitive elements formed by the first doping region 104 and the second doping region 105 are consistent.

[0131] As an example, the first doped region 104 extends from the electrical modification layer 102 to the remaining device functional layer to form a doped region of the photoelectric conversion element; this example corresponds to Fig.16 In the structure shown, the first doping region 104 is prepared so as to span regions with different first doping type concentrations. When the first doping layer 104 with consistent second doping type concentrations is formed, a doping region of the photosensitive element having a final concentration gradient can be obtained, thereby obtaining an internal potential with a gradient, which is beneficial to electron transport.

[0132] As an example, the image sensor includes a plurality of pixel units 1011, and the image sensor also includes an isolation overflow region 107 prepared in the device functional layer from the first surface 101a of the semiconductor substrate 101, the device isolation region 103 is located between adjacent pixel units, the isolation overflow region 107 is located within the pixel unit, and there is a spacing between the isolation overflow region 107 and the electrical modification layer 102 to form an overflow channel s based on the corresponding area of ​​the spacing.

[0133] As an example, a recessed region is formed on one side of the isolation overflow region 107 facing the electrical modification layer 102 , and an overflow channel s between predetermined sub-pixels in the pixel unit is formed based on the recessed region.

[0134] As an example, a central recessed area 108 corresponding to the center of the pixel unit 1011 is formed on one side of the isolation overflow area 107 facing the electrical modification layer 102 , wherein an overflow channel s between each sub-pixel in the pixel unit 1011 is formed based on the central recessed area 108 .

[0135] As an example, the device functional layer further includes an epitaxial compensation layer 502', and the epitaxial compensation layer 502' is formed on the electrical property modification layer 502. This example corresponds to Fig. 20 In the structure shown, the characteristics of the epitaxial compensation layer 502' of this example are consistent with the performance of the remaining device functional layers above the electrical modification layer 102. For example, the doping concentration of the epitaxial compensation layer 502' is lower than the doping concentration of the electrical modification layer 502. Further, when the device isolation region 503 is prepared in the epitaxial compensation layer 502', the doping concentration at the device isolation region 503 finally formed is consistent with the doping concentration of the electrical modification layer 502. The doping concentration of the device isolation region 503 during preparation can be adjusted according to the concentration of the epitaxial compensation layer 502', so that the final corresponding concentration in the image sensor is consistent. In addition, it should be noted that the descriptions of "consistent", "same" and the like in this application are based on the design, and changes within the industry-permitted range that occur during the actual process are acceptable and do not affect the implementation of this application.

[0136] Embodiment 2:

[0137] See also Figure 17-20 As shown, this embodiment provides another method for preparing an image sensor. The main difference between this embodiment 2 and embodiment 1 is the method for preparing an electrical modification layer in the device functional layer. The following will mainly describe the differences between this embodiment and embodiment 1 in the preparation. For other similar processes and structures, refer to embodiment 1. In addition, this embodiment uses the corresponding reference numerals of the corresponding structures in embodiment 1.

[0138] In this embodiment, the method for preparing the electrical modification layer 502 in the device functional layer includes:

[0139] First, if Fig.17As shown, an electrical modification layer 502 is prepared based on an epitaxial process; then, as Fig.18 As shown, an epitaxial compensation layer 502' is formed on the electrical modification layer 502 based on an epitaxial process, and the electrical modification layer 502 and the epitaxial compensation layer 502' thereon form a device functional layer; further, based on the device functional layer, a semiconductor substrate 501 having a first surface and a second surface is obtained, and the side of the electrical modification layer 502 facing the second surface of the semiconductor substrate 501 is exposed to the device functional layer. It should be noted that, consistent with the first embodiment, the semiconductor substrate 501 is shown as a device functional layer here, and the actual semiconductor substrate 501 may be larger.

[0140] Specifically, the electrical modification layer 502 can be prepared by using an existing epitaxial process. For example, the electrical modification layer 502 can be formed by epitaxial growth on a silicon substrate. Further, the existing epitaxial process can be continued to be used on the electrical modification layer 502 to form an epitaxial compensation layer 502', wherein the epitaxial compensation layer 502' here corresponds to the remaining device functional layer after the first ion implantation in Example 1, that is, the doping concentration of the first doping type of the epitaxial compensation layer 502' can be less than that of the electrical modification layer 502. At this time, the obtained structure corresponds to the device functional layer and the semiconductor substrate after the electrical modification layer 102 is formed in Example 1.

[0141] Then, if Fig.19 As shown, a device isolation region 503 is prepared in the device functional layer from the first surface 502a of the semiconductor substrate 502; then, as shown in Fig. 20 As shown, a first doping region 504 and a second doping region 505 are prepared in the device functional layer from the first surface 502a of the semiconductor substrate 502. The features, preparation process and technical effects of the corresponding structural regions can all be found in the description of the first embodiment, and will not be repeated here.

[0142] Embodiment three:

[0143] The present application also provides an electronic device, including an image sensor as described in any one of the above schemes. The electronic device can be a security monitoring, vehicle-mounted electronics, mobile phone camera, machine vision and other equipment. The image sensor based on the present application can obtain high-quality image information, and it can also be used for infrared utilization equipment.

[0144] In summary, the image sensor and electronic device of the present application have the following beneficial effects: the present invention designs the isolation of the pixel area of ​​the image sensor and improves the manufacturing process steps, which can effectively achieve the isolation between the pixel areas, alleviate the electrical crosstalk (blooming) problem in the prior art, and can flexibly obtain the pixel size according to actual needs, which is conducive to the design of small pixel devices. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0145] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. All equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. An image sensor, characterized in that: The image sensor comprises: A semiconductor substrate having a first surface and a second surface opposite to each other, and including a device functional layer; An electrical modification layer, configured corresponding to the device functional layer, wherein a side of the electrical modification layer facing the second surface of the semiconductor substrate is exposed from the device functional layer; a device isolation region, located in the device functional layer, wherein a side of the device isolation region away from the first surface of the semiconductor substrate has a contact portion with the electrical property modification layer; and The first doped region is at least located in the electrical property modification layer and correspondingly located between the device isolation regions.

2. The image sensor according to claim 1, wherein: The device functional layer further includes an epitaxial compensation layer, which is formed on the electrical modification layer, or a distance is provided between a side of the electrical modification layer facing the first surface of the semiconductor substrate and a side of the device functional layer facing the first surface of the semiconductor substrate.

3. The image sensor according to claim 1, wherein: The device isolation region is arranged in a mesh shape, and the mesh device isolation region defines a plurality of pixel regions; and / or, the electrical modification layer covers a side facing the second surface and is exposed on the device functional layer.

4. The image sensor according to claim 1, wherein: The first doping region extends from the electrical property modification layer to the remaining device functional layer to form a doping region of the photoelectric conversion element.

5. The image sensor according to claim 1, wherein: The image sensor further includes a second doping region located between the device isolation regions and corresponding to the first doping region.

6. The image sensor according to claim 5, characterized in that The doping concentration of the electrical modification layer is greater than the doping concentration of the corresponding device functional layer, and the doping concentration of the device isolation region is equal to the doping concentration of the electrical modification layer; and / or, the doping concentration of the first doping region is equal to the doping concentration of the second doping region; and / or, the doping type of the device functional layer, the electrical modification layer and the device isolation region is the same and different from the doping type of the first doping region; and / or, the doping type of the first doping region and the second doping region is the same.

7. The image sensor according to claim 1, wherein: The image sensor further comprises: A transistor element is formed in the device function layer from the first surface of the semiconductor substrate to obtain the image sensor based on at least the transistor element and the first doping region.

8. The image sensor according to any one of claims 1 to 7, characterized in that: The image sensor includes a plurality of pixel units and an isolation overflow region extending from a first surface of the device functional layer close to the semiconductor substrate to the device functional layer, wherein the device isolation region is located between adjacent pixel units, the isolation overflow region is located within the pixel unit, and there is a spacing between the isolation overflow region and the electrical modification layer to form an overflow channel based on an area corresponding to the spacing.

9. The image sensor according to claim 8, wherein: A recessed area is formed on the side of the isolation overflow region facing the electrical modification layer, and the overflow channel between preset sub-pixels in the pixel unit is formed based on the recessed area; or, a central recessed area corresponding to the center of the pixel unit is formed on the side of the isolation overflow region facing the electrical modification layer, and the overflow channel between each sub-pixel in the pixel unit is formed based on the central recessed area; and / or, the pixel unit includes at least two sub-pixels, and the isolation overflow region is arranged between adjacent sub-pixels.

10. An electronic device, characterized in that: The electronic device comprises the image sensor as claimed in any one of claims 1 to 9.

Images