A circuit structure of a PCB board

Abstract

The utility model discloses a circuit structure of a PCB board, including a board body, a copper foil circuit is arranged on the surface of the board body, the board body is solder-resisted and opened to form several rows of bare copper groups located on the copper foil circuit, each row of bare copper groups includes several bare copper areas arranged at intervals, a solder layer is arranged on the surface of the bare copper area, and the bare copper areas in two adjacent rows of bare copper groups in the several rows of bare copper groups are staggered, and the bare copper areas are rectangular. The utility model improves the current carrying capacity and heat dissipation performance of the copper foil circuit by setting the bare copper areas and distributing them according to a regular pattern.

Description

Technical Field

[0001] The utility model belongs to the technical field of PCB, in particular to a circuit structure of a PCB board, which is used for improving the current interception capacity of the circuit. Background Art

[0002] Today's electronic products are becoming more and more powerful, and the number of chips has increased. In order to be beautiful and compact, the volume of the product must be compressed to a certain size to achieve lightness and thinness, which will result in a relatively reduced internal board space. Due to space issues on the PCB board, it is often encountered that the effective width of the copper foil board cannot meet the flow of current. To meet the flow of current, the space for placing parts is often squeezed, causing inconvenience in space layout.

[0003] The current carrying capacity of the circuit on the PCB board determines the design of the number of electronic components. The larger the current carrying capacity of the circuit, the more electronic components can be satisfied; the smaller the current carrying capacity of the circuit, the more difficult it is to satisfy the needs of more electronic components, otherwise it will cause damage to the electronic components or the PCB board.

[0004] At present, in order to improve the current carrying capacity of the circuit on the PCB, the solution is usually to increase the width of the circuit. The wider the circuit, the stronger the current carrying capacity, and the narrower the circuit, the weaker the current carrying capacity. With the intelligence and miniaturization of modern electronic products, the integrated functions are powerful and the structure is compact, which makes the product have very high requirements on the appearance, layout and wiring design of the core component PCB. Especially for wiring, there is not enough space to increase the line width, resulting in too small current carrying capacity of the circuit. If the line width is to be increased, the PCB size needs to be widened, thereby increasing the cost of PCB materials and making the product volume larger.

[0005] The problem with the existing technology is that the width of the copper foil circuit cannot meet the current flow, and there is no extra space on the PCB board with increasingly dense electronic components to increase the copper foil width. Therefore, other methods are needed to improve the current carrying capacity of the circuit. Tinning the bare copper of the circuit is an important means to enhance the current carrying capacity of the circuit. When the copper foil width on the circuit cannot be increased under the condition of a certain electroplating thickness, the following situations will occur:

[0006] (1) When a large current passes through, the copper foil is burned, causing a short circuit;

[0007] (2) Insufficient power supply at the load end causes the load to fail to work normally, which will have devastating consequences for the product once it occurs;

[0008] If the width of the power supply copper foil is increased, the space of other chips will be occupied, and some modules may have to be reduced, which will affect the function and performance of the product. Utility Model Content

[0009] In order to solve the above technical problems, the utility model provides a circuit structure of a PCB board to improve the current carrying capacity and heat dissipation performance of the copper foil circuit.

[0010] In order to solve the above technical problems, the utility model adopts the following technical solutions:

[0011] A circuit structure of a PCB board includes a board body, a copper foil circuit is provided on the surface of the board body, a solder mask window is opened on the board body to form a plurality of rows of bare copper groups located on the copper foil circuit, each row of bare copper groups includes a plurality of bare copper areas arranged at intervals, a solder layer is provided on the surface of the bare copper areas, and the bare copper areas in two adjacent rows of bare copper groups in the plurality of rows of bare copper groups are staggered.

[0012] As a further improvement, the bare copper area is rectangular.

[0013] As a further improvement, the length value of the bare copper area is greater than the width value, and the length direction of the bare copper area is the same as the length direction of the copper foil circuit.

[0014] As a further improvement, the size of the bare copper area is calculated by multiplying the length by the width and is in the range of 3*1mm to 5*2mm, and the maximum width of the bare copper area is smaller than the width of the copper foil circuit.

[0015] As a further improvement, a plurality of bare copper areas in each row of bare copper groups are distributed at intervals of a first gap, and the width of the first gap is 0.3-0.5 mm.

[0016] As a further improvement, among the several rows of bare copper groups, two adjacent rows of bare copper groups are spaced apart by a second gap, and the width of the second gap is 0.3-0.5 mm.

[0017] As a further improvement, the first gap and the second gap have the same value.

[0018] As a further improvement, in the plurality of rows of bare copper groups, the bare copper areas contained in each row of bare copper groups are the same in size and shape.

[0019] As a further improvement, the solder layer disposed on the surface of the bare copper area includes a bottom layer of solder and a surface layer of solder, and the surface layer of solder is disposed on the bottom layer of solder.

[0020] As a further improvement, the bottom layer solder is formed by performing hot air leveling and tin spraying operation on the surface of the bare copper area, and the surface layer solder is formed by performing wave soldering and tin spraying operation on the bottom layer solder.

[0021] Compared with the prior art, the utility model has the following beneficial technical effects:

[0022] By opening solder mask windows on the copper foil circuit, multiple bare copper areas are formed, and the bare copper areas are rectangular and staggered according to the set interval distance, forming a masonry wall structure as a whole. The current carrying capacity is improved by the regular distribution of rectangular bare copper areas without increasing the width of the copper foil circuit. Moreover, due to the regular distribution, the current carrying capacity is more uniform and there will be no weak areas.

[0023] The maximum value of the bare copper area is 5*2mm. If it is too large, the tinning will be uneven and the current carrying capacity will be weakened. The minimum value is 3*1mm. If it is too small, there will be too many breakpoints and the current carrying capacity will be weakened.

[0024] The bare copper area cannot exceed the copper foil circuit, that is, the bare copper area is completely within the copper foil circuit. It can be flexibly set according to the size of the copper foil circuit to cover the copper foil circuit to the greatest extent, which can meet the needs of PCB boards of different sizes.

[0025] By soldering the bare copper area, first perform hot air leveling and tin spraying, and then perform wave soldering and tin spraying. The two tin spraying operations can meet the current carrying capacity of the circuit and simultaneously play a role in heat dissipation. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a partial main structural diagram of the utility model;

[0027] Figure 2 This is a schematic diagram of the main structure of the bare copper area in the utility model;

[0028] Figure 3 for Figure 1 A is an enlarged schematic diagram;

[0029] Figure 4 This is a schematic diagram of the distribution state of the bare copper area in the utility model;

[0030] Figure 5 It is a structural schematic diagram of a PCB board.

[0031] Reference numerals:

[0032] Copper foil circuit 1, bare copper area 2, first gap 3, second gap 4, board body 5, first row bare copper group 6, second row bare copper group 7, third row bare copper group 8, fourth row bare copper group 9. DETAILED DESCRIPTION

[0033] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0034] In the description of the present utility model, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like are involved, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present utility model, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0035] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection. It can be a mechanical connection or an electrical connection. It can be directly connected or indirectly connected through an intermediate medium. It can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0036] Embodiment 1

[0037] refer to Figure 1-5 As shown, a circuit structure of a PCB board includes a board body 5, a copper foil circuit 1 is provided on the surface of the board body 5, and the board body 5 is subjected to solder mask opening to form several rows of bare copper groups located on the copper foil circuit 1, and the several rows of bare copper groups are arranged at intervals, and each row of bare copper groups includes several bare copper areas 2 arranged at intervals, and the surface of the bare copper area 2 is provided with a solder layer, and the bare copper areas in two adjacent rows of bare copper groups in the several rows of bare copper groups are staggered. The board body involved in this embodiment is a multi-layer circuit board or a single-layer circuit board. For the copper foil circuit on the board body, its routing often extends along the preset path of the board body. For example, for a rectangular board body, the copper foil circuit runs from one side to the other side and then bends back to continue routing. The bare copper area is set along the copper foil circuit.

[0038] like Figure 4As shown, on the copper foil circuit 1 on the board, it does not mean that the bare copper area 2 is laid on all the circuits, but that the bare copper area 2 is set on a single copper foil circuit. Multiple rows of bare copper groups are arranged side by side and spaced apart. The several rows of bare copper groups mentioned here refer to the structure set on the same copper foil circuit, that is, on the same copper foil circuit, at least two rows of bare copper groups are set, and the adjacent two rows of bare copper areas are staggered. After soldering the bare copper area, the overall current carrying capacity of the copper foil circuit can be effectively improved without changing the width of the copper foil circuit, and the current carrying capacity is also more uniform.

[0039] For the dislocation distribution of bare copper areas in two adjacent rows, Figure 4 The partial schematic diagram of is used as a reference for detailed description. On a copper foil circuit, there are four rows of bare copper groups, which are defined from top to bottom as the first row of bare copper group 6, the second row of bare copper group 7, the third row of bare copper group 8 and the fourth row of bare copper group 9. The first row of bare copper group 6 and the second row of bare copper group 7 are arranged alternately, the second row of bare copper group 8 and the third row of bare copper group 9 are arranged alternately, and the third row of bare copper group 8 and the fourth row of bare copper group 9 are arranged alternately. The number of bare copper areas contained in the first row of bare copper group 6, the second row of bare copper group 7, the third row of bare copper group 8 and the fourth row of bare copper group 9 is the same. The arrangement of the bare copper areas contained in the first row of bare copper group 6 and the third row of bare copper group 8 is the same, and the arrangement of the bare copper areas contained in the second row of bare copper group 7 and the fourth row of bare copper group 9 is the same. In other words, for several rows of bare copper groups, different arrangements of alternating intervals from top to bottom are adopted. If defined from top to bottom, the bare copper areas in odd rows are arranged in the same way, and the bare copper areas in even rows are arranged differently, and the bare copper areas in odd rows and even rows are arranged differently. The bare copper areas in the bare copper group in the second row are staggered with the bare copper areas in the bare copper group in the first row, which means that the bare copper areas in the second row are not arranged directly opposite to the bare copper areas in the first row, but the bare copper areas in the second row are facing the gap between the two adjacent bare copper areas in the first row, so that the whole structure is formed as a masonry wall. To make it more regular, the gap formed by the two adjacent bare copper areas in the first row can be used as the center, and the center of the bare copper area in the length direction of the second row can be directly opposite to the center.

[0040] By utilizing the regular staggered distribution of bare copper in different rows, the current carrying capacity can be improved while ensuring that there will be no areas with weak current carrying capacity, making the current carrying capacity of the entire copper foil circuit more uniform.

[0041] Each bare copper area is spaced apart from other adjacent bare copper areas in the up-down direction and the left-right direction, so that soldering can be better performed.

[0042] Embodiment 2

[0043] refer to Figure 1-5As shown, the length of the bare copper area 2 is greater than the width, and the overall shape is rectangular, and the length direction of the bare copper area is the same as the length direction of the copper foil line. Since the copper foil line extends in the length direction and is limited in the width direction, in order to fill the bare copper area on the copper foil line as much as possible, the length of the bare copper area is set larger than the width, which can be better distributed. The bare copper area needs to be entirely located within the copper foil line, so the width of the bare copper area needs to be smaller than the width of the copper foil line, which can also ensure that the bare copper area can maximize the effect of improving the current carrying capacity.

[0044] like Figure 4 As shown, when there are four rows of bare copper groups on the copper foil circuit 1, the side of the bare copper area in the outermost row of bare copper groups is spaced from the side of the copper foil circuit to ensure that all bare copper areas are located on the copper foil circuit. During design, the size of the bare copper area is adjusted according to the gap between two adjacent bare copper areas and the width and length of the copper foil circuit, so that the bare copper area is covered to the greatest extent on the copper foil circuit.

[0045] The bare copper area is rectangular, and its length is greater than its width, so it is a long strip extending from one end of the copper foil circuit to the other. All bare copper areas on the copper foil circuit are set to the same shape and size, which ensures that the current carrying capacity is evenly distributed, and there will be no problem of strong or weak parts, thus improving quality.

[0046] For the specific size of the bare copper area, a range value is usually set. According to the size of the conventional copper foil circuit, the size of the bare copper area is calculated by multiplying the length by the width, which is in the range of 3*1mm to 5*2mm, that is, the minimum length is 3mm and the maximum is 5mm, and the minimum width is 1mm and the maximum is 2mm. Of course, this is based on the fact that the width of the copper foil circuit itself is greater than 1mm, and under normal circumstances, the width of the copper foil circuit on the PCB board will be greater than 1mm. The maximum length and width of the bare copper area is 5*2mm. According to actual testing, if the size of the bare copper area is greater than the maximum value of 5*2mm, uneven tinning will occur, and uneven tinning will further weaken the current carrying capacity; if the size of the bare copper area is less than the minimum value of 3*1mm, more breakpoints will appear, which will further weaken the current carrying capacity. Therefore, according to the different sizes of PCB boards and the size of copper foil circuits, the range value of the bare copper area is set to 3*1mm~5*2mm as a better value. Within this limited range, the bare copper area can be flexibly changed according to the different sizes of copper foil circuits, and the appropriate size can be selected to maximize the filling of copper foil circuits.

[0047] In addition, several bare copper areas 2 in the bare copper group in the same row are spaced apart by first gaps 3 , and the width of the first gaps 3 is 0.3-0.5 mm.

[0048] In the plurality of rows of bare copper groups, two adjacent rows of bare copper groups are spaced apart by a second gap 4, and the width of the second gap 4 is 0.3-0.5 mm.

[0049] That is, two adjacent bare copper areas in the same row are spaced by a first gap, and bare copper groups in two adjacent rows above and below are spaced by a second gap, so that a bare copper area has gaps with other adjacent bare copper areas in the up, down, left and right directions. By arranging all bare copper areas at intervals and setting the gaps to a corresponding size, it is possible to facilitate soldering of the bare copper areas and ensure that the bare copper areas can be completely tinned.

[0050] As for the relationship between the first gap and the second gap, it is preferred that the values ​​of the first gap and the second gap are the same, so that the current carrying capacity of the copper foil circuit can be more uniform and weak areas are less likely to appear.

[0051] In this embodiment, the widths of the first gap and the second gap are both set to 0.4 mm. At this spacing distance, better performance can be maintained, especially preventing the bare copper area from bridging, pulling or insufficient tin after soldering.

[0052] Embodiment 3

[0053] refer to Figure 1-5 As shown, after the bare copper area 2 is set on the copper foil circuit 1 of the board body 5, soldering treatment is required to form a solder layer on the surface of the bare copper area, and the solder layer includes a bottom solder and a surface solder, and the surface solder is set on the bottom solder. The bottom solder is formed by performing a hot air leveling tin spraying operation on the surface of the bare copper area, and the surface solder is formed by performing a wave soldering tin spraying operation on the bottom solder.

[0054] For soldering operations, the bare copper area is spaced to prepare for good tinning. The reason why it needs to go through two tinning processes is that the first hot air leveling tinning is mainly used to level the surface of the bare copper area, making the surface of the bare copper area flat, and then the wave soldering tinning is performed. Moreover, these two tinning processes are the normalized processes of the product, so as to meet the current carrying capacity of the circuit and play a role in heat dissipation at the same time.

[0055] for Figure 1-5 , only a partial part of the PCB board is shown, not the entire circuit board. Figure 5 This is a schematic diagram of a PCB board, in which only part of the copper foil circuit is illustrated. In practical applications, it can be applied to copper foil circuits of various routings.

[0056] It should be noted that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or make equivalent substitutions for some of the technical features therein. However, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A circuit structure of a PCB board, comprising a board body, characterized in that: A copper foil circuit is provided on the surface of the board, and solder mask windows are opened on the board to form several rows of bare copper groups located on the copper foil circuit. Each row of bare copper group includes several bare copper areas arranged at intervals, and a solder layer is provided on the surface of the bare copper area. Among the several rows of bare copper groups, the bare copper areas in two adjacent rows of bare copper groups are staggered.

2. The circuit structure of the PCB board according to claim 1, characterized in that: The bare copper area is rectangular.

3. The circuit structure of the PCB board according to claim 2, characterized in that: The length value of the bare copper area is greater than the width value, and the length direction of the bare copper area is the same as the length direction of the copper foil circuit.

4. The circuit structure of the PCB board according to claim 3, characterized in that: The size of the bare copper area is calculated by multiplying the length by the width and is in the range of 3*1mm to 5*2mm. The maximum width of the bare copper area is smaller than the width of the copper foil circuit.

5. The circuit structure of the PCB board according to claim 2, characterized in that: The plurality of bare copper areas in each row of bare copper groups are spaced apart according to a first gap, and the width of the first gap is 0.3-0.5 mm.

6. The circuit structure of the PCB board according to claim 5, characterized in that: In the plurality of rows of bare copper groups, two adjacent rows of bare copper groups are spaced apart by a second gap, and the width of the second gap is 0.3-0.5 mm.

7. The circuit structure of the PCB board according to claim 6, characterized in that: The first gap and the second gap have the same value.

8. The circuit structure of the PCB board according to claim 4, characterized in that: In the plurality of rows of bare copper groups, the bare copper areas contained in each row of bare copper groups are the same in size and shape.

9. The circuit structure of the PCB board according to claim 1, characterized in that: The solder layer arranged on the surface of the bare copper area comprises a bottom solder layer and a surface solder layer, and the surface solder layer is arranged on the bottom solder layer.

10. The circuit structure of the PCB board according to claim 9, characterized in that: The bottom solder is formed by performing hot air leveling and tin spraying on the surface of the bare copper area, and the surface solder is formed by performing wave soldering and tin spraying on the bottom solder.

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