Composite identification and measurement system

Abstract

The utility model discloses a composite mark and a measuring system, the composite mark is formed on a wafer, the wafer comprises a first direction and a second direction which are perpendicular to each other, the composite mark comprises a first pattern and a second pattern, and the first pattern is formed in a first layer of the wafer; the second pattern is formed in the second layer of the wafer corresponding to the first pattern, and the second pattern comprises a simulation pattern of the key pattern formed on the wafer. The first patterns are formed on the peripheries of the second patterns, and in the first direction, the distances between the outer contours of the adjacent first patterns and the outer contours of the adjacent second patterns are equal; in the second direction, the distances between the outer contours of the adjacent first patterns and the outer contours of the adjacent second patterns are equal. The composite mark is measured in the mode that the line width is measured through the measurement equipment, the key size and the overlay error are measured at the same time through one composite mark, the occupation ratio of the measurement mark to a mask plate is greatly reduced, and meanwhile the productivity is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor measurement, in particular to a composite marking and measurement system. Background Art

[0002] In the prior art, the measurement of critical dimension (CD) is generally performed by measuring CD Bar (critical dimension bar) by a critical dimension scanning electron microscope (CD-SEM) machine to monitor the critical dimension of the device area. The measurement of overlay error (OVL) is still mainly based on image-based overlay error measurement (IBO). Furthermore, currently, the critical dimension mark (e.g., CDbar) and the overlay error mark are usually set separately on the wafer, and different measurement machines are used for measurement to obtain the critical dimension and overlay error respectively.

[0003] It can be seen that the current CD measurement and overlay error measurement cannot be measured simultaneously by one machine or one mark. The critical dimension (CD) mark and the overlay error (OVL) mark can only be set separately on the wafer. However, the two marks will occupy more mask area, resulting in a waste of resources. Subsequently, the two marks need to be measured by different measurement machines, which also makes the measurement steps cumbersome and the operating costs of the two machines are higher. Utility Model Content

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a composite marking and measurement system to achieve the measurement of key dimensions and overlay errors through one mark, greatly saving the occupancy rate of the measurement mark on the mask and improving production capacity.

[0005] In order to achieve the above-mentioned purpose and other related purposes, the utility model provides a composite mark, which is formed on a wafer, and the wafer includes a first direction and a second direction perpendicular to each other, and the composite mark includes:

[0006] A first pattern formed in a first layer of the wafer;

[0007] A second pattern is formed in a second layer of the wafer corresponding to the first pattern, the second pattern including a simulated pattern of a key pattern formed on the wafer;

[0008] The projections of the first pattern and the second pattern on the wafer are staggered, and in the first direction, the outer contours of adjacent first patterns are spaced equally between the outer contours of the second pattern; in the second direction, the outer contours of adjacent first patterns are spaced equally between the outer contours of the second pattern.

[0009] Optionally, the first layer is the front layer and the second layer is the current layer; or, the first layer is the current layer and the second layer is the front layer.

[0010] Optionally, the first pattern is a circular rectangle.

[0011] Optionally, the first pattern is an annular rectangle, and the intersection of two adjacent sides of the annular rectangle is in a disconnected state.

[0012] Optionally, an outer contour of the projection of the second pattern on the wafer is a rectangle or a square.

[0013] Optionally, the second pattern includes strip-shaped graphics.

[0014] Optionally, the second pattern includes a dense area and a single-root area, and the spacing between adjacent strip-shaped patterns in the dense area is smaller than the spacing between adjacent strip-shaped patterns in the single-root area.

[0015] Optionally, the second pattern includes a hole-shaped pattern.

[0016] According to one aspect of the utility model, a measurement system is also provided, the measurement system comprising:

[0017] The composite logo as above;

[0018] A measuring device, used to measure the distance between the borders of any pattern in the composite mark, and obtain the key size of the simulated pattern in the second pattern, the width size of the first pattern, and the distance size between the border of the first pattern and the border of the second pattern;

[0019] A calculation module is used to obtain the width dimension of the first pattern along the same direction, the distance dimension between the boundary of the first pattern and the boundary of the second pattern, and calculate the overlay error between the current layer and the previous layer based on the width dimension of the first pattern along the same direction, the distance dimension between the boundary of the first pattern and the boundary of the second pattern.

[0020] Optionally, the measuring equipment includes:

[0021] An image acquisition device, used for acquiring image information of the composite mark;

[0022] A measurement module, used for acquiring an image edge signal in the image information, and selecting and measuring a key dimension of the analog graphic in the second pattern, a width dimension of the first pattern, and a distance dimension between a boundary of the first pattern and a boundary of the second pattern based on the image edge signal;

[0023] Optionally, a critical dimension of the simulation graphic in the second pattern is greater than 1 μm, and the image acquisition device is an AOI optical device.

[0024] Compared with the prior art, the composite marking and measurement system described in the utility model has at least the following beneficial effects:

[0025] The composite mark of the utility model is formed on a wafer, and the wafer includes a first direction and a second direction perpendicular to each other. The composite mark includes a first pattern and a second pattern. The first pattern is formed in the first layer of the wafer; the second pattern is formed in the second layer of the wafer corresponding to the first pattern, and the second pattern includes a simulated pattern of the key pattern formed on the wafer. Among them, the projections of the first pattern and the second pattern on the wafer are staggered, and in the first direction, the outer contours of adjacent first patterns and the outer contours of the second pattern are spaced equally at all locations. In the second direction, the outer contours of adjacent first patterns and the outer contours of the second pattern are spaced equally at all locations. The composite mark is measured by measuring the line width through a measuring device (such as an AOI machine), so that the critical size and the overlay error can be measured simultaneously through a composite mark, which greatly saves the occupation ratio of the measurement mark to the mask, and improves the production capacity and measurement efficiency.

[0026] The measurement system of the utility model is used to measure the above-mentioned composite mark, and also has the above-mentioned technical effects. In addition, the image acquisition device of the measurement system can adopt AOI equipment. For the process of large CD, AOI (automatic optical identification system) plus existing functional modules can be used to measure CD and OVL at the same time, which greatly reduces the process time and improves production capacity. The price of AOI equipment is much lower than that of CD-SEM machine. Measuring the size of key dimensions through AOI machine has stronger economic adaptability. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Schematic diagram of the structure of three typical overlay error markers in the prior art;

[0028] Figure 2 This is a schematic diagram of the structure of the composite mark in the example of the first embodiment of the present utility model;

[0029] Figure 3 It is a schematic diagram of the structure of a composite mark in another example of an embodiment of the utility model;

[0030] Figure 4 It is a schematic diagram of the structure of the composite identification with single root area and dense area marked in the example of the first embodiment of the utility model.

[0031] List of reference numerals:

[0032] 100 First Pattern

[0033] 200 Second Pattern

[0034] 201 Single root zone

[0035] 202 Congested Area

[0036] 211 Bar graph

[0037] 212 Hole Shape

[0038] X first direction

[0039] Y Second direction DETAILED DESCRIPTION

[0040] The following is a specific embodiment of the present invention. People familiar with the technology can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. The details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0041] It should be noted that the illustrations provided in the embodiments of the present invention are only used to illustrate the basic concept of the present invention in a schematic manner. Although the illustrations only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of each component can be changed at will during actual implementation, and the layout of the components may also be more complex. The structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions that can be implemented in this application, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size should still fall within the scope of the technical content disclosed in this application without affecting the effects and purposes that can be achieved by the present invention.

[0042] In the prior art, the critical dimension (CD) mark and the overlay error (OVL) mark are usually set separately on the wafer, and different measurement machines are used for measurement. Specifically, for the detection of critical dimensions, a CD-SEM (critical dimension scanning electron microscope) machine is generally used for measurement. CD-SEM uses secondary electron imaging technology to form an image and finally determines the size of the critical dimension. For the detection of overlay error (OVL), there are currently two main measurement technologies on the market, image-based overlay error measurement (Image-Based Overlay, IBO) and diffraction-based overlay error measurement (Diffraction-Based Overlay, DBO). The existing IBO technology is to obtain the image of the overlay measurement mark on the two layers in the wafer, and then analyze the grayscale on the mark image to determine the center of the measurement mark image, and then obtain the relative displacement between the two layers. As Figure 1As shown, most of the existing IBO technologies use three typical overlay error markers: Box-in-Box, Bar-in-Bar (BIB), and Advanced Image Metrology (AIM). Among them, a is a box-in-box, b is a bar-in-Bar (BIB), and c is an advanced image metrology (AIM). The black lines outside the marker are prepared by the current layer process, and the gray lines inside are prepared by the previous layer process. After the two parts of the pattern are prepared, the image of the overlay error marker is obtained, and then the grayscale on the overlay error marker is analyzed to determine the center of the current layer and the previous layer overlay error marker respectively, and the relative displacement between the two layers of the wafer (i.e., the overlay error) is obtained through the deviation of the centers of the two layers. Among them, the AIM marker is composed of a series of equidistant lines, and has a higher signal-to-noise ratio than the other two markers.

[0043] Classic marking does not involve CD measurement, and cannot simulate and monitor the CD environment. In addition, classic marking calculates the overlay error by measuring the center deviation of the current / previous layer, and does not measure the line width. Furthermore, it is impossible to perform simultaneous measurements using one machine or one marking.

[0044] In addition, different product process dimensions have different requirements, and the critical dimensions of some semiconductor processes can reach more than 1μm. For example, the CD of the metal layer in the back-end of the semiconductor process is relatively large. Generally, in a 0.18μm process, the CD of the metal layer in the back-end can reach more than 1μm, for example: 2.5μm. For these processes with larger CDs, the measurement accuracy requirements are lower. Separating multiple marks to measure CD and OVL will result in a waste of production capacity and cannot meet the production needs of modern semiconductor wafer fabs.

[0045] In order to solve the background technology and the above-mentioned technical problems, this embodiment provides a composite mark and measurement system to achieve key dimensions and overlay errors in the same composite mark, and can save the occupancy ratio of the measurement mark to the mask, while improving production capacity.

[0046] Example 1

[0047] This embodiment provides a composite identifier. Figure 2Or 3, the composite mark is formed on a wafer, and the wafer includes a first direction X and a second direction Y, and the first direction X and the second direction Y are perpendicular to each other. The composite mark includes a first pattern 100 and a second pattern 200, the first pattern 100 is formed in the first layer of the wafer, and the second pattern 200 is formed in the second layer of the wafer. Optionally, the first layer can be the current layer, and the second layer can be the front layer. Or, the first layer can be the front layer, and the second layer can be the current layer. In this embodiment, the first layer is the front layer and the second layer is the current layer as an example for explanation. Of course, the two can also be interchanged, and the utility model does not limit this. When designing, it is assumed that there is no overlay error between the current layer and the front layer. At this time, in the first direction X, the outer contours of the adjacent first patterns 100 and the outer contours of the second pattern 200 are spaced equally at all locations. In the second direction Y, the outer contours of the adjacent first patterns 100 and the outer contours of the second pattern 200 are spaced equally at all locations. After the current layer and the front layer are subsequently formed, the overlay error between the current layer and the front layer is measured by measuring the distances between the outer contours of the adjacent first patterns 100 and the outer contours of the second patterns 200 in a certain direction.

[0048] Reference Figure 2 Or 3, the first pattern 100 is an annular pattern, such as an annular rectangle. Of course, the first pattern 100 can also be other annular patterns, and this embodiment does not limit this. Each side of the annular rectangle is in the shape of an elongated strip and has a certain width. Optionally, the intersection of two adjacent sides of the annular rectangle can be closed or disconnected. In this embodiment, the intersection of two adjacent sides of the annular rectangle is disconnected.

[0049] Reference Figure 2Or 3, the second pattern 200 is formed in the inner area surrounded by the first pattern 100, that is, inside the annular rectangle. Moreover, in the first direction, the outer contours of the adjacent first patterns 100 are spaced at equal intervals from the inner contours of the second pattern 200. In the second direction, the outer contours of the adjacent first patterns 100 are spaced at equal intervals from the outer contours of the second pattern 200. The outer contour of the projection of the second pattern 200 on the wafer is a rectangle or a square, and of course it can also be other graphics. This embodiment does not limit the outer contour of the projection of the second pattern 200 on the wafer. The second pattern 200 contains a simulated graphic of the key graphics formed on the wafer, and the key dimensions of the key graphics on the wafer can be obtained by measuring the key dimensions on the simulated graphic. Since the graphic design in the second pattern 200 is related to the key graphics formed on the current wafer, it is a simulated graphic of the key graphics formed on the wafer. Furthermore, the graphics in the second pattern 200 are actually not fixed and need to be determined based on the key graphics on the wafer. It should be noted that, in addition to the examples in the figure, the second pattern 200 in the composite logo also includes but is not limited to various layout methods for measuring key dimensions. The drawings in this embodiment are only for example display and cannot be used as a limitation of the present invention.

[0050] In one example, refer to Figure 2 , the outer contour of the projection of the second pattern 200 on the wafer is a square, and the second pattern 200 includes a stripe pattern 211. And, referring to Figure 4 , the second pattern 200 includes a dense area 202 and a single root area 201, and the spacing between adjacent strip graphics 211 in the dense area 202 is smaller than the spacing between adjacent strip graphics 211 in the single root area 201. Generally, the width of the strip graphics 211 in the dense area 202 is the same as the width of the strip graphics 211 in the single root area 201. However, in the semiconductor process, the key dimensions of the device area on the wafer will be monitored. The strip graphics 211 of different lengths in the figure correspond to different environments corresponding to the simulated lines in the process. Taking the long strip graphics 211 (long lines) as an example, multiple parts can simulate the situation where there is only one photoresist line in the single root area 201 after photolithography, and the area of ​​the short bar below simulates the situation of the line dense area 202 (dense), so as to realize the monitoring of the line size in different environments. During photolithography, a pattern within a certain range will affect the structural profile. Therefore, although the size of the strip pattern 211 in the dense area 202 and the single root area 201 is the same, the difference in the surrounding pattern environment will also lead to differences in the final structure size. Therefore, the single root area 201 and the dense area 202 need to be set in the simulation pattern to accurately detect the critical dimension (CD).

[0051] In one example, refer to Figure 3, the outer contour of the projection of the second pattern 200 on the wafer is a square, the second pattern 200 includes a hole-shaped pattern 212, a plurality of hole-shaped patterns 212 are arranged at intervals in the second pattern 200, and the spacing between adjacent hole-shaped patterns 212 is the same. Optionally, as in the above example, the hole-shaped pattern 212 in this example can also be divided into a dense area 202 and a single root area 201. The same spacing between the hole-shaped patterns 212 in the second pattern 200 in this example is only shown here as an example and cannot be understood as a limitation to the present invention.

[0052] Example 2

[0053] This embodiment also provides a measurement system, which includes a composite marker, a measurement device and a calculation module. Figure 2 Or 3, the composite mark adopts the composite mark in Example 1. The measuring device is used to measure the distance between the boundaries of any graphic in the composite mark, and obtain the key size of the simulated graphic in the second pattern, the width size of the first pattern, and the distance size between the boundary of the first pattern and the boundary of the second pattern. Optionally, the measuring device can be a CD-SEM. The calculation module is used to obtain the width size of the first pattern 100 along the same direction, the distance size between the boundary of the first pattern 100 and the boundary of the second pattern 200, and calculate the overlay error between the current layer and the previous layer based on the width size of the first pattern 100 along the same direction and the distance size between the boundary of the first pattern 100 and the boundary of the second pattern 200.

[0054] In one embodiment, also refer to Figure 2 Or 3, the measuring device includes an image acquisition device and a measuring module. The image acquisition device is used to collect image information of the composite mark. The measuring module is used to obtain the image edge signal in the image signal, and selects to measure and obtain the key size of the analog figure in the second pattern 200, the width size of the first pattern 100, and the distance size between the boundary of the first pattern 100 and the boundary of the second pattern 200 based on the image edge signal. In this embodiment, the image acquisition device can be an AOI optical device. Different product process size requirements are different. When measuring the back-end metal layer in the semiconductor process, the key size of some semiconductor processes reaches 1μm and above. For example, the key size (CD) of the back-end metal layer in the 0.18μm process can reach 1μm or more, such as: 2.5μm. Due to the large size of the key size, AOI optical equipment can be used for image information acquisition. In addition, the price of AOI optical equipment is much lower than that of CD-SEM machine. Measuring the size of the key size through the AOI machine has stronger economic adaptability.

[0055] It should be noted that the measurement module and the calculation module are both common functional modules in the prior art, and as long as they can realize online measurement and calculation functions, no other special improvements are required. Of course, the measurement and calculation can also be performed offline after acquiring the image signal.

[0056] The following is a detailed description of using the composite mark in Example 1 and the measurement system in Example 2 to simultaneously measure the critical dimension and the overlay error.

[0057] Figure 2 The figure shows a composite mark using an example of this embodiment 1, the light-colored part is the front-layer mark, and the dark-colored part is the current-layer mark. In the figure, m is the safety distance reserved when designing the mark (the width of m must not be too large to affect the process, nor too small to affect the internal structure); X2, X4, Y2, and Y4 are the line widths of the front-layer mark (the size of the marks on the same layer is consistent, generally greater than 2μm); X1, X3, Y1, and Y3 are the distances between the current-layer and front-layer marks (the size of the marks on the same layer is consistent, generally greater than 2μm), and a and b are the key dimensions to be concerned about (line & space).

[0058] By selecting different positions during the measurement process, different structures can be measured and monitored. Figure 2 , select an area A along the first direction X, capture the image signal of the selected area, collect the edge signals of each image module in the selected area, set the edge signal of each image to belong to OVL or CD, and then classify and measure the signals to obtain the results of each key parameter (X1, Y1, a, b, etc.). When measuring the overlay error, select the OVL image signal, and calculate the overlay error based on the OVL image signal. The calculation formula of the overlay error is: X-direction error OVL = (X2 / 2+X1)-(X4 / 2+X3), Y-direction error OVL = (Y2 / 2+Y1)-(Y4 / 2+Y3). After the calculation is completed, the key size and overlay error results are fed back to the measurement system.

[0059] In summary, the composite mark of the utility model is formed on a wafer, and the wafer includes a first direction and a second direction perpendicular to each other. The composite mark includes a first pattern and a second pattern. The first pattern is formed in the first layer of the wafer; the second pattern is formed in the second layer of the wafer corresponding to the first pattern, and the second pattern includes a simulated pattern of the key pattern formed on the wafer. Among them, the first pattern is formed on the periphery of the second pattern, and in the first direction, the outer contours of adjacent first patterns are spaced at all distances from the outer contours of the second pattern. In the second direction, the outer contours of adjacent first patterns are spaced at all distances from the outer contours of the second pattern. The composite mark is measured by measuring the line width using a measuring device (such as an AOI machine), so that the critical dimension and the overlay error can be measured simultaneously through a composite mark, which greatly saves the occupation ratio of the measurement mark to the mask, and improves the production capacity and measurement efficiency.

[0060] The measurement system of the utility model is used to measure the above-mentioned composite mark, and also has the above-mentioned technical effects. In addition. The image acquisition device can use AOI equipment. For the process of large CD, AOI (automatic optical identification system) plus existing functional modules can be used to achieve simultaneous measurement of CD and OVL, which greatly reduces the process time and improves production capacity. The price of AOI equipment is much lower than that of CD-SEM machine. Measuring the size of key dimensions through AOI machine has stronger economic adaptability.

[0061] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. A composite mark, the composite mark is formed on a wafer, the wafer includes a first direction and a second direction perpendicular to each other, characterized in that: The composite identifier includes: a first pattern formed in a first layer of the wafer; A second pattern is formed in a second layer of the wafer corresponding to the first pattern, wherein the second pattern includes a simulated pattern of a key pattern formed on the wafer; The projections of the first pattern and the second pattern on the wafer are staggered, and in the first direction, the distances between the outer contours of adjacent first patterns and the outer contours of adjacent second patterns are equal; in the second direction, the distances between the outer contours of adjacent first patterns and the outer contours of adjacent second patterns are equal.

2. The composite mark according to claim 1, characterized in that: The first layer is the front layer, and the second layer is the current layer; Alternatively, the first layer is the current layer, and the second layer is the front layer.

3. The composite mark according to claim 1, characterized in that: The first pattern is a circular rectangle.

4. The composite mark according to claim 1, characterized in that: The first pattern is an annular rectangle, and the intersection of two adjacent sides of the annular rectangle is in a disconnected state.

5. The composite mark according to claim 1, characterized in that: The outer contour of the projection of the second pattern on the wafer is a rectangle or a square.

6. The composite mark according to claim 5, characterized in that: The second pattern includes a stripe pattern; or the second pattern includes a hole pattern.

7. The composite mark according to claim 6, characterized in that: The second pattern includes a dense area and a single root area, and the spacing between adjacent strip patterns in the dense area is smaller than the spacing between adjacent strip patterns in the single root area.

8. A measurement system, characterized in that: The measuring system comprises: The composite mark according to any one of claims 1 to 7; A measuring device, used to measure the distance between the borders of any pattern in the composite mark, and obtain the key size of the simulated pattern in the second pattern, the width size of the first pattern, and the distance size between the border of the first pattern and the border of the second pattern; A calculation module is used to obtain the width dimension of the first pattern along the same direction and the distance dimension between the boundary of the first pattern and the boundary of the second pattern, and calculate the overlay error between the current layer and the previous layer based on the width dimension of the first pattern along the same direction and the distance dimension between the boundary of the first pattern and the boundary of the second pattern.

9. The measuring system according to claim 8, characterized in that: The measuring equipment comprises: An image acquisition device, used for acquiring image information of the composite mark; The measuring module is used to obtain an image edge signal in the image information, and select to measure a key dimension of the analog graphic in the second pattern, a width dimension of the first pattern, and a distance dimension between a boundary of the first pattern and a boundary of the second pattern based on the image edge signal.

10. The measuring system according to claim 9, characterized in that: The critical dimension of the simulation figure in the second pattern is greater than 1 μm, and the image acquisition device is an AOI optical device.

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