Single photon avalanche diode array, photoelectric ranging module and electronic device

Abstract

The present application relates to the field of semiconductors, and discloses a single-photon avalanche diode array, a photoelectric ranging module, and an electronic device, including a plurality of single-photon avalanche diode units, each of which has a PN junction in the light-receiving region on the front side, and a metal grid on the back side between the plurality of single-photon avalanche diode units; each single-photon avalanche diode unit includes: a first dielectric layer located on the upper surface of the light-receiving region on the back side and the upper surface of the metal grid; a stop layer located on the first dielectric layer; a second dielectric layer located above the light-receiving region of the stop layer; the stop layer is located on the highest upper surface of the metal grid and is flush with the upper surface of the second dielectric layer, and the stop layer and the first dielectric layer and the second dielectric layer are different types of film layers; and a passivation layer located on the upper surface of the stop layer and the second dielectric layer. The stop layer is provided in the present application to ensure that the thickness of the first dielectric layer and the second dielectric layer in different regions on the wafer are equal, thereby avoiding color anomalies.

Description

Technical Field

[0001] The present application relates to the field of semiconductors, and in particular to a single photon avalanche diode array, a photoelectric ranging module and an electronic device. Background Art

[0002] A single photon avalanche diode (SPAD) is a photoelectric detection avalanche diode with single-photon detection capability. It has the advantages of high avalanche gain, fast response speed, low power consumption, low cost, and easy integration with CMOS (Complementary Metal Oxide Semiconductor) circuits.

[0003] In order to reduce the crosstalk between adjacent single-photon avalanche diode units in a single-photon avalanche diode array, a metal grid can be prepared. Since the metal grid has a concave-convex structure, the thickness of the passivation layer on the metal grid is uneven, the stress is too large, and cracks are easily caused on the passivation layer. In order to solve this problem, a dielectric layer can be deposited on the surface of the metal grid, and ground and polished to make the surface flat, and then the passivation layer is deposited. However, during polishing, since the wafer where the single-photon avalanche diode array is located is subjected to different forces at different positions on the polishing machine, the grinding rate of the edge and center areas of the wafer is different, which leads to different thicknesses of the dielectric layer at the edge and center areas of the wafer, causing abnormal color on the wafer surface. In addition, due to the uneven thickness of the dielectric layer, the optical path is different, and the photon detection efficiency of different photon avalanche diode units on the same wafer is inconsistent.

[0004] Therefore, how to solve the above technical problems should be the focus of technical personnel in this field. Utility Model Content

[0005] The purpose of this application is to provide a single-photon avalanche diode array, a photoelectric ranging module and an electronic device to avoid color anomalies on the wafer surface and improve the consistency of the photon detection efficiency of each single-photon avalanche diode unit.

[0006] In order to solve the above technical problems, the present application provides a single-photon avalanche diode array, comprising a plurality of single-photon avalanche diode units, wherein a PN junction is provided in the light receiving area on the front side of each single-photon avalanche diode unit, and a metal grid is provided on the back side between the plurality of single-photon avalanche diode units; each of the single-photon avalanche diode units comprises:

[0007] A first dielectric layer located on the upper surface of the light receiving area on the back side and the upper surface of the metal grid;

[0008] a stop layer located on the first dielectric layer;

[0009] a second dielectric layer located above the light receiving area of ​​the stop layer;

[0010] The stop layer is located on the highest upper surface of the metal grid and is flush with the upper surface of the second dielectric layer, and the stop layer, the first dielectric layer, and the second dielectric layer are different types of film layers;

[0011] A passivation layer is located on the upper surfaces of the stop layer and the second dielectric layer.

[0012] Optionally, the stop layer in the single-photon avalanche diode unit is in a concave shape, and the first dielectric layer in the single-photon avalanche diode unit is in a concave shape, and the concave part corresponds to the light receiving area.

[0013] Optionally, the stop layer includes a silicon nitride layer and / or a silicon nitride oxide layer, and the first dielectric layer and the second dielectric layer include a silicon oxide layer.

[0014] Optionally, the passivation layer includes a silicon nitride layer and / or a silicon oxynitride layer.

[0015] Optionally, the metal grid is a tungsten grid or an aluminum grid.

[0016] Optionally, each of the single-photon avalanche diode units further includes a deep trench isolation structure located around the single-photon avalanche diode unit, and the deep trench isolation structure corresponds to the metal grid.

[0017] Optionally, the passivation layer is horizontal and has uniform thickness.

[0018] The present application also provides a photoelectric ranging module, characterized in that the photoelectric ranging module includes any one of the single photon avalanche diode arrays described above.

[0019] The present application also provides an electronic device, characterized in that the electronic device includes the above-mentioned photoelectric ranging module.

[0020] A single-photon avalanche diode array provided in the present application includes a plurality of single-photon avalanche diode units, wherein a PN junction is provided in the light-receiving region on the front side of each of the single-photon avalanche diode units, and a metal grid is provided on the back side between the plurality of the single-photon avalanche diode units; each of the single-photon avalanche diode units includes: a first dielectric layer located on the upper surface of the light-receiving region on the back side and the upper surface of the metal grid; a stop layer located on the first dielectric layer; a second dielectric layer located above the light-receiving region of the stop layer; the stop layer is located on the highest upper surface of the metal grid and is flush with the upper surface of the second dielectric layer, and the stop layer and the first dielectric layer and the second dielectric layer are different types of film layers; and a passivation layer located on the upper surfaces of the stop layer and the second dielectric layer.

[0021] It can be seen that the single-photon avalanche diode array in the present application includes a plurality of single-photon avalanche diode units, each of which includes a metal grid, a first dielectric layer and a second dielectric layer, and a stop layer is provided between the first dielectric layer and the second dielectric layer. Therefore, when grinding the second dielectric layer during the preparation process, the grinding can be stopped when the stop layer is ground, and the first dielectric layer will not be affected, thereby ensuring that the thickness of the first dielectric layer and the thickness of the second dielectric layer in different regions on the wafer are equal, and color abnormalities on the wafer surface are avoided. At the same time, since the thickness of the first dielectric layer and the second dielectric layer in different regions are equal and the optical path is the same, the consistency of the photon detection efficiency of each single-photon avalanche diode unit on the same wafer is improved.

[0022] In addition, the present application also provides a photoelectric ranging module and electronic equipment having the above advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 A schematic diagram of the thickness of a dielectric layer in the center area of ​​a wafer in the related art;

[0025] Figure 2 A schematic diagram of the thickness of a dielectric layer in a wafer edge region in the related art;

[0026] Figure 3 A schematic diagram of the structure of a single photon avalanche diode array provided in an embodiment of the present application;

[0027] Figures 4 to 9A process flow chart of manufacturing a single photon avalanche diode array provided in an embodiment of the present application;

[0028] In the figure, 100, single photon avalanche diode unit, 1, PN junction, 2, metal grid, 3, first dielectric layer, 4, stop layer, 5, passivation layer, 6, microlens, 7, second dielectric layer, 8, deep trench isolation structure. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0030] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0031] In the related art, the thickness of the dielectric layer 9 in the single photon avalanche diode unit at different positions of the wafer (the center area and the edge area of ​​the wafer) is as follows: Figure 1 and Figure 2 As shown, the thickness HTK1 of the dielectric layer 9 in the center area of ​​the wafer is greater than the thickness HTK2 of the dielectric layer 9 in the edge area of ​​the wafer. Due to the different thicknesses in different areas of the wafer, the color of the wafer surface is abnormal. In addition, due to the uneven thickness of the dielectric layer 9, the optical path is different, and the photon detection efficiency of different photon avalanche diode units on the same wafer is poorly consistent.

[0032] In view of this, the present application provides a single photon avalanche diode array, please refer to Figure 3 The single-photon avalanche diode array includes a plurality of single-photon avalanche diode units 100, each of which has a PN junction 1 in the light receiving area on the front side, and a metal grid 2 on the back side between the plurality of single-photon avalanche diode units 100; each of the single-photon avalanche diode units 100 includes:

[0033] A first dielectric layer 3 located on the upper surface of the light receiving area on the back side and the upper surface of the metal grid 2;

[0034] a stop layer 4 located on the first dielectric layer 3;

[0035] A second dielectric layer 7 located above the light receiving area of ​​the stop layer 4;

[0036] The stop layer 4 is located on the highest upper surface of the metal grid 2 and is flush with the upper surface of the second dielectric layer 7, and the stop layer 4 and the first dielectric layer 3 and the second dielectric layer 7 are different types of film layers;

[0037] A passivation layer 5 is located on the upper surfaces of the stop layer 4 and the second dielectric layer 7 .

[0038] It should be noted that the single-photon avalanche diode array further includes a microlens 6 . Each single-photon avalanche diode unit 100 includes a microlens 6 . The microlens 6 is located on the upper surface of the passivation layer 5 and covers the light receiving area.

[0039] The metal grid 2 is located between adjacent single-photon avalanche diode units 100 , that is, the metal grid 2 is located at the edge region of the single-photon avalanche diode unit 100 , and the central region of the single-photon avalanche diode unit 100 corresponds to the light receiving region.

[0040] As an implementation method, the stop layer 4 in the single-photon avalanche diode unit 100 is in a concave shape, and the first dielectric layer 3 in the single-photon avalanche diode unit 100 is in a concave shape, and the concave part corresponds to the light receiving area. That is, the metal grid 2 is a convex structure, so that the first dielectric layer 3 and the stop layer 4 are in a concave shape.

[0041] The stop layer 4 is located on the upper surface of the first dielectric layer 3, that is, the stop layer 4 is distributed on the light receiving area and the metal grid 2, such as Figure 3 shown.

[0042] The stop layer 4 and the second dielectric layer 7 are made of different materials, that is, the stop layer 4 and the second dielectric layer 7 are two different film layers, so that when the second dielectric layer 7 is ground during the manufacturing process, the grinding stops when the grinding reaches the stop layer 4. The highest upper surface of the stop layer 4 is flush with the upper surface of the second dielectric layer 7.

[0043] The first dielectric layer 3 and the second dielectric layer 7 may be dielectric layers of the same material. For example, the first dielectric layer 3 and the second dielectric layer 7 include silicon oxide layers. At this time, the stop layer 4 includes but is not limited to a silicon nitride layer and / or a silicon oxynitride layer.

[0044] When the stop layer 4 includes a silicon nitride layer and a silicon oxynitride layer, the silicon nitride layer and the silicon oxynitride layer are a stacked structure, and the silicon nitride layer can be in contact with the first dielectric layer 3, and the silicon oxynitride layer is located on the upper surface of the silicon nitride layer, or the silicon oxynitride layer can be in contact with the first dielectric layer 3, and the silicon nitride layer is located on the upper surface of the silicon oxynitride layer, both of which are within the protection scope of the present application.

[0045] The metal grid 2 may be a tungsten grid or an aluminum grid. When the metal grid 2 is a tungsten grid, since tungsten reflects less light than aluminum, the tungsten grid reflects less light, which can reduce crosstalk and weaken the flash phenomenon.

[0046] The passivation layer 5 can protect the single photon avalanche diode array. The structure of the passivation layer 5 is not limited in the present application and can be set at will. For example, the passivation layer 5 includes but is not limited to a silicon nitride layer and / or a silicon nitride oxide layer.

[0047] When the passivation layer 5 includes a silicon nitride layer and a silicon oxynitride layer, the silicon nitride layer and the silicon oxynitride layer are a stacked structure. In the direction away from the second dielectric layer 7, the silicon nitride layer and the silicon oxynitride layer can be stacked, or the silicon oxynitride layer and the silicon nitride layer can be stacked, both of which are within the protection scope of the present application.

[0048] Since the highest upper surface of the stop layer 4 is flush with the upper surface of the second dielectric layer 7 , the passivation layer 5 in this embodiment is horizontal and has a uniform thickness, which can avoid excessive stress on the passivation layer 5 and reduce the occurrence of cracks.

[0049] In this embodiment, the single-photon avalanche diode array includes a plurality of single-photon avalanche diode units 100, each of which includes a metal grid 2, a first dielectric layer 3, and a second dielectric layer 7, and a stop layer 4 is provided between the first dielectric layer 3 and the second dielectric layer 7. Therefore, when grinding the second dielectric layer 7 during the preparation process, grinding can be stopped when grinding to the stop layer 4, and the first dielectric layer 3 will not be affected, thereby ensuring that the thickness of the first dielectric layer 3 and the thickness of the second dielectric layer 7 in different regions on the wafer are equal, and color abnormalities on the wafer surface are avoided. At the same time, since the thickness of the first dielectric layer 3 and the second dielectric layer 7 in different regions are equal and the optical path is the same, the photon detection efficiency consistency of each single-photon avalanche diode unit 100 on the same wafer is improved.

[0050] On the basis of the above embodiments, in one embodiment of the present application, each of the single-photon avalanche diode units 100 further includes a deep trench isolation structure 8 located around the single-photon avalanche diode unit 100 , and the deep trench isolation structure 8 corresponds to the metal grid 2 .

[0051] The deep trench isolation structure 8 disposed between adjacent single-photon avalanche diode units 100 can suppress or reduce optical crosstalk and electrical crosstalk between adjacent single-photon avalanche diode units 100 .

[0052] The following is an introduction to the method for manufacturing the single photon avalanche diode array in the present application using a specific case.

[0053] Step S1: Figure 4As shown, the front side surface of the substrate is sequentially doped with N-type and P-type to form a PN junction 1; a single photon avalanche diode unit includes a PN junction 1;

[0054] Step S2: Figure 5 As shown, a metal grid 2 is formed on the back surface of the substrate;

[0055] Step S3: Figure 6 As shown, a first dielectric layer 3 and a stop layer 4 are sequentially deposited on one side of the back surface of the substrate;

[0056] Step S4: Figure 7 As shown, a second dielectric layer 7 is deposited on the upper surface of the stop layer 4;

[0057] Step S5: Figure 8 As shown, the second dielectric layer 7 is subjected to chemical mechanical polishing (CMP), and the polishing stops at the highest upper surface of the stop layer 4;

[0058] Step S6: Fig. 9 As shown, a passivation layer 5 is deposited on the upper surfaces of the stop layer 4 and the second dielectric layer 7; and then the SPAD is fabricated according to the conventional process flow to obtain the following Figure 3 The single-photon avalanche diode array shown.

[0059] The present application also provides a photoelectric ranging module, which includes the single photon avalanche diode array described in any of the above embodiments.

[0060] The present application also provides an electronic device, which includes the photoelectric ranging module described in the above embodiment.

[0061] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0062] The above is a detailed introduction to a single-photon avalanche diode array, a photoelectric ranging module and an electronic device provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the scheme of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the present application.

Claims

1. A single photon avalanche diode array, characterized in that: The single-photon avalanche diode array comprises a plurality of single-photon avalanche diode units, each of which has a PN junction in the light receiving area on the front side, and a metal grid on the back side between the plurality of single-photon avalanche diode units; each of the single-photon avalanche diode units comprises: A first dielectric layer located on the upper surface of the light receiving area on the back side and the upper surface of the metal grid; a stop layer located on the first dielectric layer; a second dielectric layer located above the light receiving area of ​​the stop layer; The stop layer is located on the highest upper surface of the metal grid and is flush with the upper surface of the second dielectric layer, and the stop layer, the first dielectric layer, and the second dielectric layer are different types of film layers; A passivation layer is located on the upper surfaces of the stop layer and the second dielectric layer.

2. The single photon avalanche diode array according to claim 1, characterized in that: The stop layer in the single-photon avalanche diode unit is in a concave shape, and the first dielectric layer in the single-photon avalanche diode unit is in a concave shape, and the concave part corresponds to the light receiving area.

3. The single photon avalanche diode array according to claim 1, characterized in that: The stop layer includes a silicon nitride layer and / or a silicon nitride oxide layer, and the first dielectric layer and the second dielectric layer include a silicon oxide layer.

4. The single photon avalanche diode array according to claim 1, characterized in that: The passivation layer includes a silicon nitride layer and / or a silicon oxynitride layer.

5. The single photon avalanche diode array according to claim 1, characterized in that: The metal grid is a tungsten grid or an aluminum grid.

6. The single photon avalanche diode array according to claim 1, characterized in that: Each of the single-photon avalanche diode units further includes a deep trench isolation structure located around the single-photon avalanche diode unit, and the deep trench isolation structure corresponds to the metal grid.

7. The single photon avalanche diode array according to claim 1, characterized in that: The passivation layer is level and has uniform thickness.

8. A photoelectric distance measurement module, characterized in that: The photoelectric ranging module includes the single photon avalanche diode array as described in any one of claims 1-7.

9. An electronic device, characterized in that: The electronic device comprises the photoelectric ranging module as claimed in claim 8.

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