Semiconductor light-emitting structure

Abstract

The utility model provides a semiconductor light-emitting structure. The semiconductor light-emitting structure comprises a substrate layer; the first semiconductor layer is positioned on the substrate layer; the active layer is positioned on one side, deviating from the substrate layer, of the first semiconductor layer; the second semiconductor layer is located on the side, away from the substrate layer, of the active layer, and acceptor doping ions are arranged in the second semiconductor layer; the hydrogen diffusion barrier layer is located on one side, away from the substrate layer, of the second semiconductor layer, and an opening area is formed in the hydrogen diffusion barrier layer; the second semiconductor layer comprises a first region located at the bottom of the hydrogen diffusion barrier layer and a second region located at the bottom of the opening region, and the resistivity of the first region is higher than that of the second region. The electric leakage of the semiconductor light-emitting structure is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, in particular to a semiconductor light-emitting structure. Background Art

[0002] Semiconductor lasers (LDs) and superluminescent diodes (SLEDs) have broad application prospects in many fields such as display, projection, lighting, and industrial processing due to their advantages of small size, high luminous efficiency, energy saving and environmental protection, good reliability, and long life. In order to achieve stimulated radiation, semiconductor lasers and superluminescent tubes must have a waveguide structure to limit the input carriers and the generated light field distribution to form gain. At present, the common practice is to use a ridge waveguide structure. During the chip preparation process, a part of the p-type layer in the laser epitaxial layer is etched away to form a ridge region. An electrode layer is provided on the upper surface of the ridge region, and an insulating layer is provided on both sides of the ridge region. When the laser is working, carriers (holes) are injected from the electrode layer above the ridge region, and the carriers on both sides are blocked by the insulating layer, thereby forming a spatial restriction on the injected carriers. On the other hand, the areas on both sides of the ridge region are etched away, and the refractive index is different from that of the material directly below the ridge region, forming a refractive index waveguide structure to limit the generated light field.

[0003] During the chip tape-out process, it is necessary to first form a ridge pattern through a photolithography process, then use an etching process to remove the semiconductor layer on both sides of the ridge area, and then deposit an insulating layer on both sides of the ridge area, followed by an electrode layer. This results in a more complicated preparation process, and it is easy to cause etching damage and excessive etching during the preparation process, resulting in leakage. Utility Model Content

[0004] The present application provides a semiconductor light emitting structure to solve the problem of electrical leakage of semiconductor light emitting structures in the prior art.

[0005] In order to solve the above technical problems, the utility model provides a semiconductor light-emitting structure, comprising: a substrate layer; a first semiconductor layer located on the substrate layer; an active layer located on a side of the first semiconductor layer away from the substrate layer; a second semiconductor layer located on a side of the active layer away from the substrate layer, wherein the second semiconductor layer has acceptor doped ions; a hydrogen diffusion barrier layer located on a side of the second semiconductor layer away from the substrate layer, wherein the hydrogen diffusion barrier layer has an opening area; the second semiconductor layer comprises a first region located at the bottom of the hydrogen diffusion barrier layer and a second region located at the bottom of the opening area, wherein the resistivity of the first region is higher than the resistivity of the second region.

[0006] Optionally, the hydrogen diffusion barrier layer is a combination of one or more of a silicon dioxide layer, a chromium oxide layer, a yttrium oxide layer, an erbium oxide layer, a zirconium oxide layer, a titanium carbide layer, a titanium nitride layer, a silicon nitride layer and an aluminum nitride layer.

[0007] Optionally, the hydrogen diffusion barrier layer comprises a hydrogen diffusion barrier interface layer and a main hydrogen diffusion barrier layer, and the main hydrogen diffusion barrier layer is located on a surface of the hydrogen diffusion barrier interface layer that is away from the second semiconductor layer.

[0008] Optionally, the hydrogen diffusion barrier interface layer is an aluminum layer, and the main hydrogen diffusion barrier layer is an aluminum oxide layer; or, the hydrogen diffusion barrier interface layer is a C layer, and the main hydrogen diffusion barrier layer is a SiC layer.

[0009] Optionally, the thickness of the hydrogen diffusion barrier layer is 100 nm to 20000 nm.

[0010] Optionally, the thickness of the hydrogen diffusion barrier layer is 100 nm to 10000 nm.

[0011] Optionally, within a temperature range of 400° C. to 650° C., the hydrogen diffusion barrier layer has a hydrogen permeation barrier factor greater than 100.

[0012] Optionally, within a temperature range of 400° C. to 650° C., the hydrogen diffusion barrier layer has a hydrogen permeation barrier factor greater than 200.

[0013] Optionally, the resistivity of the first region is higher than the resistivity of the second region by more than one order of magnitude.

[0014] Optionally, the second semiconductor layer includes an upper waveguide layer, an upper confinement layer and a contact layer, the upper confinement layer is located on a side of the upper waveguide layer away from the substrate layer, the contact layer is located on a side of the upper confinement layer away from the substrate layer, and the upper confinement layer and the contact layer are doped with acceptor dopant ions; the first region includes the upper confinement layer and the contact layer located at the bottom of the hydrogen diffusion barrier layer.

[0015] Optionally, the second semiconductor layer further includes: a first carrier blocking layer located between the upper waveguide layer and the upper confinement layer, wherein the first carrier blocking layer has acceptor doping ions; and the first region further includes a first carrier blocking layer located at the bottom of the hydrogen diffusion blocking layer.

[0016] Optionally, the acceptor doping ions include Mg ions.

[0017] Optionally, the opening area is in the shape of an elongated strip, and the length direction of the opening area is parallel to the length direction of the cavity.

[0018] Optionally, it further includes: a second electrode layer located on a side of the second semiconductor layer away from the substrate layer and covering the hydrogen diffusion barrier layer; the resistivity of the hydrogen diffusion barrier layer is greater than the resistivity of the second electrode layer.

[0019] The technical solution of this invention has the following technical effects:

[0020] The semiconductor light-emitting structure provided by the technical solution of the utility model has a hydrogen diffusion barrier layer arranged above the second semiconductor layer, and the hydrogen diffusion barrier layer has an opening area, and the opening area is used to define the light-emitting window. During the activation of the acceptor doping ions in the second semiconductor layer, hydrogen atoms escape from the second area at the bottom of the opening area, and the acceptor doping ions in the second area are activated, so that the second area becomes a low-resistance area, and the hydrogen diffusion barrier layer is used to inhibit the activation of the acceptor doping ions in the first area, and the hydrogen atoms in the first area below the hydrogen diffusion barrier layer are difficult to escape, and the acceptor doping ions in the first area cannot be effectively activated, so that the first area becomes a high-resistance area. Therefore, the resistivity of the first area is higher than that of the second area. Due to the difference in resistivity between the first area and the second area, when the working current is injected, the carriers are preferentially injected from the opening area along the second area, so that the second area forms an effective gain waveguide, and the carriers rarely pass through the first area. Therefore, the first area plays a role in current limitation. When a voltage is applied to the semiconductor light-emitting structure, the carrier density in the first region and the second region is different. The difference in carrier density causes the imaginary part of the refractive index of the first region and the imaginary part of the refractive index of the second region to be different, so that the first region limits the light field. Because there is no need to etch to form a ridge region, the etching process is reduced, so the preparation process of the semiconductor light-emitting structure can be simplified, etching damage can be avoided, and leakage can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 A schematic diagram of a semiconductor light emitting structure provided by an embodiment of the utility model;

[0023] Figure 2 A three-dimensional diagram of a semiconductor light emitting structure provided by an embodiment of the utility model;

[0024] Figure 3 A schematic diagram of a semiconductor light emitting structure provided in another embodiment of the present invention. DETAILED DESCRIPTION

[0025] The technical solution of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0026] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0027] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0028] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0029] The present invention provides a semiconductor light emitting structure according to an embodiment of the present invention. Figures 1 to 3 ,include:

[0030] Substrate layer 100;

[0031] A first semiconductor layer 101 located on the substrate layer 100;

[0032] An active layer 102 located on a side of the first semiconductor layer 101 away from the substrate layer 100;

[0033] a second semiconductor layer 103 located on a side of the active layer 102 away from the substrate layer 100, wherein the second semiconductor layer 103 has acceptor doping ions;

[0034] a hydrogen diffusion barrier layer 201 located on a side of the second semiconductor layer 103 away from the substrate layer 100, wherein the hydrogen diffusion barrier layer 201 has an opening;

[0035] The second semiconductor layer 103 includes a first region 103 a located at the bottom of the hydrogen diffusion barrier layer 201 and a second region 103 b located at the bottom of the opening region. The resistivity of the first region 103 a is higher than that of the second region 103 b.

[0036] The hydrogen content in the first region 103 a is greater than the hydrogen content in the second region 103 b .

[0037] In this embodiment, a hydrogen diffusion barrier layer 201 is provided above the second semiconductor layer 103, and the hydrogen diffusion barrier layer 201 has an opening region. During the activation of the acceptor doping ions in the second semiconductor layer 103, hydrogen atoms in the second region 103b at the bottom of the opening region escape, and the acceptor doping ions in the second region 103b are activated, so that the second region 103b becomes a low resistance region, and the hydrogen diffusion barrier layer 201 is used to inhibit the activation of the acceptor doping ions in the first region 103a, and the hydrogen atoms in the first region 103a below the hydrogen diffusion barrier layer are difficult to escape, and the acceptor doping ions in the first region 103a cannot be effectively activated, so that the first region 103a becomes a high resistance region. Due to the difference in resistivity between the first region 103a and the second region 103b, when the working current is injected, the carriers are preferentially injected from the opening region along the second region 103b, so that the second region 103b forms an effective gain waveguide, and the carriers rarely pass through the first region 103a. Therefore, the first region 103a plays a role in current limitation. When a voltage is applied to the semiconductor light emitting structure, the carrier density in the first region 103a and the second region 103b is different. The difference in carrier density causes the imaginary part of the refractive index of the first region 103a to be different from the imaginary part of the refractive index of the second region 103b, so that the first region 103a limits the light field. Because there is no need to etch to form a ridge region, the etching process is reduced, so the preparation process of the semiconductor light emitting structure can be simplified, etching damage can be avoided, and leakage can be reduced.

[0038] In one embodiment, the material of the substrate layer 100 is GaN, or doped n-type GaN, wherein the n-type GaN is doped with n-type ions, and the n-type ions include Si ions. In other embodiments, the material of the substrate layer 100 is other semiconductor materials, which are not limited.

[0039] The conductivity type of the first semiconductor layer 101 is opposite to the conductivity type of the second semiconductor layer 103 .

[0040] In one embodiment, the first semiconductor layer 101 is an n-type semiconductor layer, and the second semiconductor layer 103 is a p-type semiconductor layer.

[0041] In one embodiment, the hydrogen diffusion barrier layer 201 is a combination of one or more of a silicon dioxide layer, a chromium oxide layer, a yttrium oxide layer, an erbium oxide layer, a zirconium oxide layer, a titanium carbide layer, a titanium nitride layer, a silicon nitride layer and an aluminum nitride layer.

[0042] In one embodiment, the hydrogen diffusion barrier layer 201 includes a hydrogen diffusion barrier interface layer and a main hydrogen diffusion barrier layer, and the main hydrogen diffusion barrier layer is located on the surface of the hydrogen diffusion barrier interface layer facing away from the second semiconductor layer. The ability of the main hydrogen diffusion barrier layer to inhibit the activation of the acceptor doping ions in the first region 103a is stronger than the ability of the hydrogen diffusion barrier interface layer to inhibit the activation of the acceptor doping ions in the first region 103a. The hydrogen diffusion barrier interface layer can increase the adhesion between the main hydrogen diffusion barrier layer and the second semiconductor layer 103. In a specific embodiment, the hydrogen diffusion barrier interface layer is an aluminum layer, and the main hydrogen diffusion barrier layer is an aluminum oxide layer; or, the hydrogen diffusion barrier interface layer is a C layer, and the main hydrogen diffusion barrier layer is a Si C layer.

[0043] In one embodiment, the thickness of the hydrogen diffusion barrier interface layer is 10 nm to 8000 nm, for example, 10 nm, 100 nm, 200, 500 nm, 1000 nm, 2000 nm, 3000 nm, 4000 nm or 8000 nm.

[0044] In one embodiment, the thickness of the hydrogen diffusion barrier layer 201 is 100 nm to 20000 nm. If the thickness of the hydrogen diffusion barrier layer 201 is too small, the effect of the hydrogen diffusion barrier layer 201 in suppressing the activation of the acceptor doping ions in the first region 103a is weak. If the thickness of the hydrogen diffusion barrier layer 201 is too large, the stress between the hydrogen diffusion barrier layer 201 and the second semiconductor layer is too large, which may cause the semiconductor light emitting structure to warp and is not conducive to the subsequent chip process.

[0045] In one embodiment, preferably, the thickness of the hydrogen diffusion barrier layer 201 is 100nm to 10000nm, for example, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, 2000nm, 3000nm, 4000nm, 5000nm, 6000nm, 7000nm, 8000nm, 9000nm or 10000nm.

[0046] In one embodiment, within the temperature range of 400° C. to 650° C., the hydrogen permeation barrier factor of the hydrogen diffusion barrier layer 201 is greater than 100, for example, the hydrogen permeation barrier factor of the hydrogen diffusion barrier layer 201 is 105, 110, 115, 120, 130, 140, 150, 200, 250, 300, 350 or 400. This makes the hydrogen diffusion barrier layer 201 have a higher ability to suppress the activation of the acceptor doping ions in the first region 103 a.

[0047] In one embodiment, preferably, within the temperature range of 400° C. to 650° C., the hydrogen diffusion barrier layer 201 has a hydrogen permeation barrier factor greater than 200.

[0048] In one embodiment, the hydrogen concentration in the first region 103 a is 10 to 1000 times, for example, 10 times, 100 times, 200 times, 500 times, 800 times, or 1000 times, of the hydrogen concentration in the second region 103 b .

[0049] In one embodiment, the hydrogen concentration in the first region 103a is greater than or equal to 1*10 18 atoms / cm 3 and less than or equal to 1*10 21 atoms / cm 3 The hydrogen concentration in the second region 103b is greater than or equal to 1*10 16 atoms / cm 3 and less than or equal to 5*10 18 atoms / cm 3 .

[0050] The resistivity of the first region 103a is higher than the resistivity of the second region 103b. In one embodiment, the resistivity of the first region 103a is higher than the resistivity of the second region 103b by more than one order of magnitude, for example, the resistivity of the first region 103a is higher than the resistivity of the second region 103b by one order of magnitude, 10 orders of magnitude, 100 orders of magnitude, or 1000 orders of magnitude.

[0051] In one embodiment, the second semiconductor layer 103 includes an upper waveguide layer, an upper confinement layer and a contact layer, the upper confinement layer is located on a side of the upper waveguide layer away from the substrate layer 100, the contact layer is located on a side of the upper confinement layer away from the substrate layer 100, the upper confinement layer and the contact layer are doped with acceptor doping ions, and the concentration of the acceptor doping ions in the contact layer is greater than the concentration of the acceptor doping ions in the upper confinement layer; the first region 103a includes the upper confinement layer and the contact layer located at the bottom of the hydrogen diffusion barrier layer.

[0052] In one embodiment, the second semiconductor layer 103 further includes: a first carrier blocking layer, located between the upper waveguide layer and the upper confinement layer, wherein the first carrier blocking layer has acceptor doping ions. When the conductivity type of the upper confinement layer and the upper waveguide layer is p-type, the first carrier blocking layer is an electron blocking layer.

[0053] In one embodiment, the material of the upper confinement layer is Al with acceptor doping ions. x1 Ga 1-x1 N. In one embodiment, x1 is 0.02-0.5, for example 0.07. The material of the contact layer is GaN with acceptor doping ions. The material of the upper waveguide layer is In x2 Ga 1-x2 N. In one embodiment, x2 is 0.01 to 0.15, for example, 0.04.

[0054] In one embodiment, the upper waveguide layer is not doped with acceptor doping ions to reduce impurity absorption loss. In another embodiment, the upper waveguide layer is doped with acceptor doping ions, and the concentration of the acceptor doping ions in the upper waveguide layer is less than the concentration of the acceptor doping ions in the upper confinement layer.

[0055] In one embodiment, the concentration of the acceptor doping ions in the first carrier blocking layer is greater than the concentration of the acceptor doping ions in the upper confinement layer and less than the concentration of the acceptor doping ions in the contact layer; the first region 103a further comprises a first carrier blocking layer located at the bottom of the hydrogen diffusion barrier layer. On the one hand, the resistance of the second semiconductor layer 103 is reduced, and on the other hand, the concentration of the acceptor doping ions in the first carrier blocking layer is greater than the concentration of the acceptor doping ions in the upper confinement layer, so that the region where holes and electrons recombine is closer to the active layer.

[0056] In one embodiment, the material of the first carrier blocking layer is Al with acceptor doping ions. x3 G a1-x3 N. In one embodiment, x3 is 0.1-0.95, for example 0.2. x3 is greater than x2.

[0057] In one embodiment, the thickness of the upper confinement layer is 100nm-1000nm, for example 500nm; the thickness of the upper waveguide layer is 50nm-500nm, for example 200nm; the thickness of the contact layer is 2nm-100nm, for example 20nm. The thickness of the first carrier blocking layer is 5nm-50nm, for example 15nm.

[0058] The first region is in contact with the hydrogen diffusion barrier layer.

[0059] It should be noted that, in one embodiment, the entire first semiconductor layer at the bottom of the hydrogen diffusion barrier layer constitutes the first region. In another implementation, a portion of the first semiconductor layer at the bottom of the hydrogen diffusion barrier layer constitutes the first region, and accordingly, the first semiconductor layer further includes a third region located on the side of the first region facing the substrate layer.

[0060] In one embodiment, the first semiconductor layer 101 includes: a lower confinement layer and a lower waveguide layer, wherein the lower waveguide layer is located between the lower confinement layer and the active layer. In a specific embodiment, the lower waveguide layer includes a first lower waveguide layer and a second lower waveguide layer, wherein the second lower waveguide layer is located between the first lower waveguide layer and the active layer, and the refractive index of the second lower waveguide layer is greater than the refractive index of the first lower waveguide layer. The provision of the first lower waveguide layer can improve the growth quality of the second lower waveguide layer and reduce the stress of the second lower waveguide layer.

[0061] The lower confinement layer and the lower waveguide layer have the same conductivity type. The upper confinement layer and the upper waveguide layer have the same conductivity type. The conductivity type of the lower confinement layer is opposite to the conductivity type of the upper confinement layer. The conductivity type of the lower waveguide layer is opposite to the conductivity type of the upper waveguide layer.

[0062] In one embodiment, the material of the first lower waveguide layer is n-type GaN, and the material of the second lower waveguide layer is n-type In x4 Ga 1-x4 N.

[0063] In one embodiment, the lower waveguide layer is a single-layer structure, for example, the material of the lower waveguide layer is n-type In x4 Ga 1-x4 N.

[0064] In one embodiment, x4 is 0.01 to 0.15, for example, 0.04.

[0065] The n-type ions in the lower waveguide layer and the lower confinement layer include Si ions.

[0066] In one embodiment, the material of the lower confinement layer is n-type Al x5 Ga 1-x5 N. In one embodiment, x5 is 0.02-0.5, for example, 0.07.

[0067] In one embodiment, the thickness of the lower limiting layer is 200nm-3000nm, for example, 1200nm; the thickness of the first lower waveguide layer is 2nm-500nm, for example, 300nm; the thickness of the second lower waveguide layer is 10nm-500nm, for example, 250nm. The total thickness of the first lower waveguide layer and the second lower waveguide layer is not less than 100nm and not more than 1000nm.

[0068] In one embodiment, the acceptor dopant ions include Mg ions.

[0069] In one embodiment, the active layer is a plurality of pairs of quantum barriers and quantum wells.

[0070] In one embodiment, the material of the quantum well includes In 0.16 Ga 0.84 N. The material of the quantum barrier includes GaN.

[0071] In one embodiment, the thickness of the quantum well is 3 nm, and the thickness of the quantum barrier is 6 nm.

[0072] In this application, there is no restriction on the material of the active layer, and there is no restriction on the thickness of the quantum well and quantum barrier.

[0073] In one embodiment, the opening area is in the shape of an elongated strip, and the length direction of the opening area is parallel to the length direction of the cavity.

[0074] In one embodiment, the length of the opening area is 100 micrometers to 5000 micrometers, for example, 1180 micrometers, and the width of the opening area is 2 micrometers to 200 micrometers, for example, 45 micrometers.

[0075] In one embodiment, the semiconductor light emitting structure further includes: a first electrode layer 401 located on a side of the substrate layer 100 away from the first semiconductor layer 101 .

[0076] In one embodiment, the semiconductor light emitting structure further includes: a second electrode layer 301 located on a side of the second semiconductor layer 103 away from the substrate layer 100 and covering the hydrogen diffusion barrier layer 201 .

[0077] In one embodiment, the resistivity of the hydrogen diffusion barrier layer 201 is greater than that of the second electrode layer 301. In this way, when the semiconductor light emitting structure is in operation, carriers are directly injected into the second semiconductor layer, the active layer and the first semiconductor layer at the bottom of the opening area along the second electrode layer 301 on the upper side of the opening area.

[0078] In one embodiment, the second electrode layer 301 includes a Pb layer, a Ni layer and an Au layer stacked in sequence. In the second electrode layer, the Pb layer is located between the Ni layer and the second semiconductor layer and between the Ni layer and the hydrogen diffusion barrier layer, and the Ni layer is located between the Pb layer and the Au layer.

[0079] In one embodiment, the first electrode layer 401 includes one or more of Ti, Ni, Pd, Pt and Au.

[0080] In one embodiment, the semiconductor light emitting structure has a front cavity surface and a rear cavity surface that are arranged opposite to each other; the semiconductor light emitting structure further includes: an anti-reflection film located on the front cavity surface, and a reflective film located on the rear cavity surface.

[0081] The method for preparing the above-mentioned semiconductor light-emitting structure includes: providing a substrate layer; forming a first semiconductor layer on the substrate layer; forming an active layer on the side of the first semiconductor layer away from the substrate layer; forming a second semiconductor layer on the side of the active layer away from the substrate layer, wherein the second semiconductor layer has acceptor doping ions; forming a hydrogen diffusion barrier layer on the side of the second semiconductor layer away from the substrate layer, wherein the hydrogen diffusion barrier layer has an opening area; after forming the hydrogen diffusion barrier layer, performing annealing treatment to make the resistivity of the first region higher than the resistivity of the second region.

[0082] The hydrogen content of a first region of the second semiconductor layer located at the bottom of the hydrogen diffusion barrier layer is greater than the hydrogen content of a second region of the second semiconductor layer located at the bottom of the opening region.

[0083] The process of forming the first semiconductor layer includes an epitaxial growth process, such as a MOCVD process. The process of forming the active layer includes an epitaxial growth process, such as a MOCVD process. The process of forming the second semiconductor layer includes an epitaxial growth process, such as a MOCVD process.

[0084] In one embodiment, the parameters of the annealing treatment include: an annealing time of 10s to 120min, such as 30min, and an annealing temperature of 300°C to 800°C, such as 550°C. The annealing treatment adopts a rapid annealing furnace or a tubular annealing furnace.

[0085] Annealing is used to activate the acceptor doping ions in the second semiconductor layer. The activation principle is: annealing breaks the bonding between the acceptor doping ions and H in the second semiconductor layer. When the acceptor doping ions are Mg ions, annealing breaks the Mg-H bond in the second semiconductor layer. During the H escape process, the H escape below the hydrogen diffusion barrier layer is suppressed, so the acceptor doping ions in the first region still remain in a state of being passivated by H, that is, the activation of the acceptor doping ions below the hydrogen diffusion barrier layer is suppressed, and the first region has a high resistance. However, the H escape in the second region at the bottom of the opening region is not suppressed, the acceptor doping ions below the opening region are activated, and the second region has a low resistivity.

[0086] In one embodiment, the process of forming the hydrogen diffusion barrier layer includes any one of a magnetron sputtering process, an electron beam evaporation process, a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, a metal organic vapor deposition (MOCVD) process, an in-situ thermal oxidation process, and an electrochemical deposition process.

[0087] In one embodiment, the step of forming the second semiconductor layer includes: forming an upper waveguide layer on a side of the active layer facing away from the substrate layer; forming an upper confinement layer on a side of the upper waveguide layer facing away from the substrate layer; forming a contact layer on a side of the upper confinement layer facing away from the substrate layer, the upper confinement layer and the contact layer are doped with acceptor doping ions, and the concentration of the acceptor doping ions in the contact layer is greater than the concentration of the acceptor doping ions in the upper confinement layer; the first region includes the upper confinement layer and the contact layer located at the bottom of the hydrogen diffusion barrier layer.

[0088] The step of forming the second semiconductor layer also includes: before forming the upper confinement layer, forming a first carrier blocking layer on a side of the upper waveguide layer away from the substrate layer; the first carrier blocking layer has acceptor doping ions, and the concentration of the acceptor doping ions in the first carrier blocking layer is greater than the concentration of the acceptor doping ions in the upper confinement layer and less than the concentration of the acceptor doping ions in the contact layer. The first region also includes a first carrier blocking layer located at the bottom of the hydrogen diffusion barrier layer.

[0089] In one embodiment, the method for preparing a semiconductor light emitting structure further includes: forming a first electrode layer on a side of the substrate layer away from the first semiconductor layer; and forming a second electrode layer covering the hydrogen diffusion barrier layer on a side of the second semiconductor layer away from the substrate layer.

[0090] In one embodiment, after the hydrogen diffusion barrier layer is formed, an annealing process is performed; after the annealing process is performed, a second electrode layer is formed. In another embodiment, after the second electrode layer is formed, an annealing process is performed.

[0091] In one embodiment, after the second electrode layer is formed, the substrate layer is thinned; after the substrate layer is thinned, the first electrode layer is formed on a side of the substrate layer away from the first semiconductor layer.

[0092] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention of the utility model.

Claims

1. A semiconductor light emitting structure, characterized in that: include: substrate layer; a first semiconductor layer located on the substrate layer; an active layer located on a side of the first semiconductor layer away from the substrate layer; a second semiconductor layer located on a side of the active layer away from the substrate layer, wherein the second semiconductor layer has acceptor doping ions; a hydrogen diffusion barrier layer located on a side of the second semiconductor layer away from the substrate layer, wherein the hydrogen diffusion barrier layer has an opening region; The second semiconductor layer includes a first region located at the bottom of the hydrogen diffusion barrier layer and a second region located at the bottom of the opening region, and the resistivity of the first region is higher than that of the second region.

2. The semiconductor light emitting structure according to claim 1, characterized in that: The hydrogen diffusion barrier layer is a combination of one or more of a silicon dioxide layer, a chromium oxide layer, a yttrium oxide layer, an erbium oxide layer, a zirconium oxide layer, a titanium carbide layer, a titanium nitride layer, a silicon nitride layer and an aluminum nitride layer.

3. The semiconductor light emitting structure according to claim 1, characterized in that: The hydrogen diffusion barrier layer comprises a hydrogen diffusion barrier interface layer and a main hydrogen diffusion barrier layer. The main hydrogen diffusion barrier layer is located on a surface of the hydrogen diffusion barrier interface layer that is away from the second semiconductor layer.

4. The semiconductor light emitting structure according to claim 3, characterized in that: The hydrogen diffusion barrier interface layer is an aluminum layer, and the main hydrogen diffusion barrier layer is an aluminum oxide layer; or, the hydrogen diffusion barrier interface layer is a C layer, and the main hydrogen diffusion barrier layer is a SiC layer.

5. The semiconductor light emitting structure according to claim 1, characterized in that: The thickness of the hydrogen diffusion barrier layer is 100nm-20000nm.

6. The semiconductor light emitting structure according to claim 5, characterized in that: The thickness of the hydrogen diffusion barrier layer is 100nm-10000nm.

7. The semiconductor light emitting structure according to claim 1, characterized in that: In the temperature range of 400° C. to 650° C., the hydrogen diffusion barrier layer has a hydrogen permeation barrier factor greater than 100.

8. The semiconductor light emitting structure according to claim 7, characterized in that: In the temperature range of 400° C. to 650° C., the hydrogen diffusion barrier layer has a hydrogen permeation barrier factor greater than 200.

9. The semiconductor light emitting structure according to claim 1, characterized in that: The resistivity of the first region is higher than the resistivity of the second region by more than one order of magnitude.

10. The semiconductor light emitting structure according to claim 1, characterized in that: The second semiconductor layer includes an upper waveguide layer, an upper confinement layer and a contact layer, wherein the upper confinement layer is located on a side of the upper waveguide layer away from the substrate layer, the contact layer is located on a side of the upper confinement layer away from the substrate layer, and the upper confinement layer and the contact layer are doped with acceptor doping ions; the first region includes the upper confinement layer and the contact layer located at the bottom of the hydrogen diffusion barrier layer.

11. The semiconductor light emitting structure according to claim 10, characterized in that: The second semiconductor layer further includes: a first carrier blocking layer located between the upper waveguide layer and the upper confinement layer, wherein the first carrier blocking layer has acceptor doping ions; the first region further includes a first carrier blocking layer located at the bottom of the hydrogen diffusion blocking layer.

12. The semiconductor light emitting structure according to claim 1, characterized in that: The acceptor doping ions include Mg ions.

13. The semiconductor light emitting structure according to claim 1, characterized in that: The opening area is in the shape of an elongated strip, and the length direction of the opening area is parallel to the length direction of the cavity.

14. The semiconductor light emitting structure according to claim 1, characterized in that: Also includes: A second electrode layer located on a side of the second semiconductor layer away from the substrate layer and covering the hydrogen diffusion barrier layer; The resistivity of the hydrogen diffusion barrier layer is greater than the resistivity of the second electrode layer.

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