UFS chip rotating plate adaptable to UFS chip analyzer
By designing a UFS chip transfer board containing multiple through holes and connection wiring harnesses, the problem of no signal points being set in the UFS chip transfer board in the prior art is solved, and the direct signal transmission between the UFS chip and the analyzer is realized, simplifying the connection process and reducing costs.
Patent Information
- Application Number
- CN202421534435.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-28
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2034-06-28
AI Technical Summary
The existing UFS chip transfer board has no signal point to be drawn out, which requires the need to connect the UFS chip analyzer through multiple devices, which is cumbersome and expensive.
Design a UFS chip transfer board, which includes a transfer board body and multiple through holes, directly connects to the UFS chip analyzer through the wiring harness to establish a signal channel to ensure that the signal is not disturbed.
It realizes direct signal transmission between UFS chips and UFS chip analyzers, simplifies the connection process, reduces costs, and ensures signal stability.
Smart Images

Figure CN222801152U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of UFS testing devices, and in particular relates to a UFS chip transfer plate that can be adapted to a UFS chip analyzer. Background Art
[0002] With the diversification of integrated circuit applications, the requirements for high performance, small size, high reliability and ultra-low power consumption in chips and electronic products are becoming increasingly higher. While this has prompted continuous breakthroughs in advanced packaging technology, how to conduct signal testing and performance evaluation on chips has become an issue that must be considered and resolved.
[0003] In the prior art, the signal of the chip to be tested is usually led out with the help of a test board or a transfer board to complete the test of the chip to be tested. However, the existing UFS (Universal Flash Storage) chip transfer board does not have a corresponding signal point lead-out for direct connection to the UFS chip analyzer for UFS protocol analysis. It is usually necessary to connect the optical fiber through a resistor and then connect it to the signal amplifier, and finally connect the cable to the UFS chip analyzer. It requires more equipment, is more complicated to connect, and increases the cost accordingly. Utility Model Content
[0004] In view of the shortcomings of the prior art mentioned above, the purpose of the utility model is to provide a UFS chip transfer plate that can be directly connected to a UFS chip analyzer, establish a signal channel for transmitting UFS chip signals to the UFS analyzer, and ensure that the signals output by the UFS chip to the UFS analyzer are not interfered with.
[0005] To achieve the above-mentioned purpose and other related purposes, the utility model provides a UFS chip transfer plate that can be adapted to a UFS chip analyzer, including: a transfer plate body, a first through hole is opened on the transfer plate body, and the first through hole is configured to be arranged according to the pin distribution and quantity of the UFS chip to be tested, so as to be electrically connected to the UFS chip to be tested; wherein, a second through hole is also opened on the transfer plate body; the second through hole is connected to the corresponding first through hole through the wiring inside the transfer plate body, and the second through hole is also fixedly equipped with a connecting harness, and is connected to the UFS chip analyzer through the connecting harness, so as to transmit the electrical signal output by the pin of the UFS chip to be tested to the UFS chip analyzer.
[0006] According to a specific embodiment of the utility model, the connecting harness adopts a semi-flexible or flexible radio frequency cable.
[0007] According to a specific embodiment of the utility model, one end of the semi-flexible or flexible RF cable is welded and fixed on the second through hole, and the other end is equipped with a cable connector to connect to the UFS chip analyzer through the cable connector.
[0008] According to a specific embodiment of the utility model, the model of the cable connector is SMP-KB2.
[0009] According to a specific embodiment of the present invention, the connecting harness adopts a semi-flexible cable with a model number of CF086-50-FEP and a radio frequency cable with a model number of RG405.
[0010] According to a specific embodiment of the present invention, at least two groups of second through holes are provided, one group of which corresponds one-to-one to the output pins of the TX signal of the UFS chip to be tested, and the other group of which corresponds one-to-one to the input pins of the RX signal of the UFS chip to be tested.
[0011] According to a specific embodiment of the present invention, the two groups of the second through holes are arranged in a row and at intervals along one side of the length direction of the rotating plate body.
[0012] According to a specific embodiment of the present invention, each group of the second through holes includes at least one first connection hole and one second connection hole, which respectively correspond to the DP port pin and the DN port pin of the TX signal / RX signal of the UFS chip to be tested.
[0013] According to a specific embodiment of the present invention, each group of the second through holes includes a plurality of the first connection holes and a plurality of the second connection holes, and the first connection holes and the second connection holes are arranged as a unit, and adjacent units are equidistantly arranged.
[0014] According to a specific embodiment of the present invention, the first connection holes and the second connection holes of each unit are arranged at intervals.
[0015] The utility model provides a UFS chip transfer board, which can be used to directly connect to a UFS chip analyzer, thereby establishing a signal channel between the UFS chip and the UFS chip analyzer.
[0016] Secondly, the utility model also uses a semi-flexible cable with model number CF086-50-FEP and a radio frequency cable with model number RG405 as the connection harness between the UFS chip transfer board and the UFS chip analyzer, ensuring that the signal output from the UFS chip to the UFS chip analyzer is not interfered with, so as to realize the testing of the UFS chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A schematic structural diagram of a specific embodiment of a UFS chip transfer plate that can be adapted to a UFS chip analyzer provided by the utility model;
[0018] Figure 2A schematic structural diagram of another specific embodiment of a UFS chip transfer plate that can be adapted to a UFS chip analyzer provided by the utility model;
[0019] Figure 3 The present invention is a schematic structural diagram of another specific embodiment of a UFS chip transfer plate that can be adapted to a UFS chip analyzer provided by the present invention. DETAILED DESCRIPTION
[0020] The following describes the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0021] It should be noted that the illustrations provided in the following embodiments are only used to schematically illustrate the basic concept of the present invention, and thus the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0022] See also Figure 1-3 As shown, a UFS chip transfer board that can be adapted to a UFS chip analyzer includes: a transfer board body 10, and a first through hole 11 and a second through hole 12 are opened on the transfer board body. The first through hole 11 is arranged according to the pin distribution and pin quantity of the UFS chip to be tested, so as to be electrically connected to the UFS chip to be tested. For example, reference can be made to Figure 1 The arrangement of the first through holes 11 is shown, and the first through holes 11 are set through the transfer plate body 10. The pins of the UFS chip can be aligned with the first through holes 11 one by one and embedded, and finally fixed by soldering to achieve electrical connection.
[0023] Secondly, the second through hole 12 is also set through the transfer plate body 10, and is connected to the corresponding first through hole 11 through the wiring inside the transfer plate body 10. It can be understood here that any first through hole 11 is used to electrically connect with a corresponding pin of the UFS chip to be tested. When the UFS chip to be tested is installed on the transfer plate body 10 through the first through hole 11 and the electrical connection is completed, the electrical signal output by the pin of the UFS chip to be tested can be transmitted to the second through hole 12 along the wiring inside the transfer plate body 10 through the first through hole 11.
[0024] In addition, a connecting harness 20 is fixedly mounted on the second through hole 12, and is connected to a UFS chip analyzer via the connecting harness 20, so that the electrical signal output by the pin of the UFS chip to be tested can be transmitted to the UFS chip analyzer for detection and analysis.
[0025] In a specific embodiment, the connecting harness 20 may adopt a semi-flexible or flexible RF cable, which can be adjusted according to the actual needs of the site. It is understandable that the semi-flexible or flexible RF cable can be effectively bent so that it can be arranged accordingly in a complex environment. Preferably, in order to ensure that the signal transmitted from the UFS chip to be tested to the UFS chip analyzer through the UFS chip transfer board is not interfered with, a RF cable with a diameter of 20mm, a semi-flexible model CF086-50-FEP, and a model RG405 can be selected. As for the length of the cable, it can be set according to actual needs. Similarly, the size of the second through hole 12 can also be opened according to the diameter of the cable to facilitate welding and fixing.
[0026] In addition, one end of the RF cable is welded and fixed on the second through hole 12 so as to be electrically connected to the pins of the UFS chip to be tested, and the other end needs to be equipped with a cable connector 21 to connect to the UFS chip analyzer to realize the extraction of the signal of the UFS chip to be tested. For this, a cable connector of model SMP-KB2 can be used to connect to the RF cable, so that when the UFS chip to be tested needs to be tested, it can be directly connected to the UFS chip analyzer by plugging and unplugging to establish a signal channel between the UFS chip to be tested and the UFS chip analyzer.
[0027] It should be noted that the specific models of the above-mentioned devices or apparatuses, including the specific selection of the connecting harness 20 and the specific selection of the cable connector 21, are only used as a preferred embodiment for reference, but are not used to limit the scope of protection of the present application. They are only relatively effective in the products that manufacturers can currently provide, and can ensure that the signals transmitted between the UFS chip to be tested and the UFS chip analyzer are not interfered with. It can be understood that they can be replaced accordingly after the manufacturer's product is updated and iterated, and there are no excessive restrictions on this. Without departing from the spirit of the present invention, the modifications and embellishments made to the embodiments of the present invention by those skilled in the art still fall within the scope of the invention patent application of the present invention.
[0028] Furthermore, the number of the second through holes 12 can also be set according to the number of signal input / output pins of the UFS chip to be tested. In a specific embodiment, at least two groups of second through holes 12 are provided, one of which corresponds to the output pins of the TX signal of the UFS chip to be tested, and the other corresponds to the input pins of the RX signal of the UFS chip to be tested.
[0029] It should be noted here that in the field of data transmission, RX and TX are two core concepts, which respectively represent receive and transmit. Simply put, when data flows from one end to the other, the sender uses TX to transmit data, and the receiver uses RX to receive the data.
[0030] Therefore, the number of the second through holes 12 in one group needs to be consistent with the number of the output pins of the TX signal of the UFS chip to be tested, and connected to the corresponding first through holes 11 through the wiring in the transfer board body 10; the number of the second through holes 12 in another group needs to be consistent with the number of the input pins of the RX signal of the UFS chip to be tested, and also connected to the corresponding first through holes 11 through the wiring in the transfer board body 10. Generally speaking, the RX pins and TX pins of the UFS chip to be tested are consistent, so the number of second through holes 12 in each group is also the same.
[0031] Furthermore, the RX pin and TX pin of the UFS chip are usually provided with multiple pins to enhance the data transmission rate, and the RX / TX pins include a DP port pin and a DN port pin to transmit differential current signals. Figure 1 , 2, 3, the UFS chip transfer plate is arranged with the second through holes 12 therein. First, two groups of second through holes 12 can be set according to the output pins of the TX signal and the input pins of the RX signal of the UFS chip to be tested, and the two groups of second through holes 12 can be arranged in columns or rows along one side of the length direction or the width direction of the transfer plate body 10; secondly, since the output pins of the TX signal and the input pins of the RX signal of the UFS chip to be tested both include the DP port pin and the DN port pin, each group of second through holes 12 can be divided into a first connection hole and a second connection hole, which correspond to the DP port pin and the DN port pin, respectively. For example, the first connection holes of one group include R XDP0 and RXDP1, the second connection holes include RXDN0 and RXDN1; wherein the first connection holes of another group include TXDP0 and TXDP1, and the second connection holes include TXDN0 and TXDN1, and since the DP port pin and the DN port pin of the UFS chip to be tested correspond to each other, they are used to output differential current signals, and can be arranged in columns or rows according to one first connection hole and one second connection hole, or the first connection holes can be divided into one group, and the second connection holes can be divided into another group for column arrangement or row arrangement, and adjacent first connection holes and / or second connection holes can be equidistantly arranged, without too many restrictions on this.
[0032] Preferably, the rotating plate body 10 can be a rounded rectangular plate with a length of 11.5mm and a width of 13mm, and the first through hole 11 is a circle with a diameter of 0.3mm, and the spacing between the first through holes 11 adjacent to each other and adjacent to each other are 0.5mm, and the specific number of the first through holes 11 can be set according to the number of pins of the UFS chip. In addition, the spacing between the two groups of second through holes 12 can be set to 2.4-2.8mm, including 2.4mm, 2.5mm, 2.6mm, 2.7mm, 2.8mm, and the spacing between adjacent first connection holes and adjacent second connection holes can be set to 2.4-2.8mm, and the spacing between the first connection hole and the second connection hole can be set to 0.6-1.0mm, including 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1.0mm. At the same time, since the second through holes 12 are arranged along the side of the rotating plate body, the interval between the outermost second through holes 12 and the side can be set to 0.2-0.6mm, including 0.2mm, 0.3mm, 0.4mm, 0.5mm, and 0.6mm.
[0033] It should be noted that the above is only a preferred embodiment for reference, but is not used to limit the scope of protection of the present application. Specifically, the shapes and sizes of the transfer plate body, the first through hole, and the second through hole are not subject to excessive restrictions, and the corresponding spacing between the first through holes and the spacing between the second through holes are not limited. They can be adjusted according to the actual environment and needs to achieve a customized transfer plate design. Without departing from the spirit of the present invention, the modifications and embellishments made to the embodiments of the present invention by those skilled in the art still fall within the scope of the invention patent application of the present invention.
[0034] In summary, the UFS chip transfer board provided by the utility model can be used to directly connect to the UFS chip analyzer, thereby establishing a signal channel between the UFS chip and the UFS chip analyzer.
[0035] Secondly, the utility model also uses a semi-flexible cable with model number CF086-50-FEP and a radio frequency cable with model number RG405 as the connection harness between the UFS chip transfer board and the UFS chip analyzer, ensuring that the signal output from the UFS chip to the UFS chip analyzer is not interfered with, so as to realize the testing of the UFS chip.
[0036] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.
[0037] In the description herein, many specific details, such as examples of components and / or methods, are provided to provide a complete understanding of the embodiments of the present invention. However, those skilled in the art will recognize that embodiments of the present invention may be practiced without one or more specific details or by other devices, systems, components, methods, components, materials, parts, etc. In other cases, well-known structures, materials, or operations are not specifically shown or described in detail to avoid obscuring aspects of the embodiments of the present invention.
[0038] References throughout the specification to "one embodiment," "an embodiment," or "a specific embodiment" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present invention, and not necessarily in all embodiments. Thus, various appearances of the phrases "in one embodiment," "in an embodiment," or "in a specific embodiment" in different places throughout the specification do not necessarily refer to the same embodiment. In addition, the particular features, structures, or characteristics of any specific embodiment of the present invention may be combined with one or more other embodiments in any suitable manner. It should be understood that other variations and modifications of the embodiments of the present invention described and illustrated herein may be based on the teachings herein and will be considered part of the spirit and scope of the present invention.
[0039] It should also be understood that one or more of the elements shown in the figures may also be implemented in a more separate or more integrated manner, or even removed because they are inoperable in certain circumstances or provided because they may be useful depending on the application.
[0040] In addition, unless otherwise explicitly indicated, any marking arrows in the drawings should be regarded as exemplary only and not limiting. In addition, unless otherwise indicated, the term "or" used herein is generally intended to mean "and / or". In the case where the term is not clear because it is anticipated that the ability to separate or combine is provided, the combination of components or steps will also be regarded as indicated.
[0041] As used in the description herein and throughout the claims that follow, "a", "an", and "the" include plural references unless otherwise indicated. Likewise, as used in the description herein and throughout the claims that follow, the meaning of "in" includes "in" and "on" unless otherwise indicated.
[0042] The above description of the illustrated embodiments of the present invention (including that described in the Abstract of the Specification) is not intended to be an exhaustive list or to limit the present invention to the precise form disclosed herein. Although specific embodiments of the present invention and examples of the present invention are described herein for illustrative purposes only, various equivalent modifications are possible within the spirit and scope of the present invention as will be recognized and understood by those skilled in the art. As noted, these modifications may be made to the present invention in accordance with the above description of the embodiments described in the present invention, and these modifications will be within the spirit and scope of the present invention.
[0043] Systems and methods have been generally described herein as details that are helpful for understanding the present invention. In addition, various specific details have been given to provide an overall understanding of the embodiments of the present invention. However, those skilled in the relevant art will recognize that the embodiments of the present invention can be practiced without one or more specific details, or practiced using other devices, systems, accessories, methods, components, materials, parts, etc. In other cases, well-known structures, materials, and / or operations are not specifically shown or described in detail to avoid confusion with various aspects of the embodiments of the present invention.
[0044] Thus, although the present invention has been described herein with reference to specific embodiments thereof, freedom of modification, various changes and substitutions are also within the above disclosure, and it should be understood that in some cases, some features of the present invention will be adopted without corresponding use of other features without departing from the scope and spirit of the proposed utility model. Therefore, many modifications can be made to adapt specific environments or materials to the essential scope and spirit of the present utility model. The present utility model is not intended to be limited to the specific terms used in the claims below and / or the specific embodiments disclosed as the best mode for carrying out the present utility model, but the present utility model will include any and all embodiments and equivalents falling within the scope of the appended claims. Therefore, the scope of the present utility model will be determined solely by the appended claims.
Claims
1. A UFS chip transfer plate adaptable to a UFS chip analyzer, characterized in that: include: A transfer plate body, wherein a first through hole is formed on the transfer plate body, and the first through hole is configured to be arranged according to the pin distribution and quantity of the UFS chip to be tested, so as to be electrically connected to the UFS chip to be tested; Wherein, a second through hole is also provided on the rotating plate body; The second through hole is connected to the corresponding first through hole through the wiring inside the transfer plate body, and the second through hole is also fixedly equipped with a connecting harness, and is connected to the UFS chip analyzer through the connecting harness to transmit the electrical signal output by the pin of the UFS chip to be tested to the UFS chip analyzer.
2. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 1, characterized in that: The connecting harness adopts a semi-flexible or flexible radio frequency cable.
3. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 2, characterized in that: One end of the semi-flexible or flexible RF cable is welded and fixed on the second through hole, and the other end is equipped with a cable connector to connect to the UFS chip analyzer through the cable connector.
4. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 3, characterized in that: The model of the cable connector is SMP-KB2.
5. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 2, characterized in that: The connecting harness adopts a semi-flexible cable of model CF086-50-FEP and a radio frequency cable of model RG405.
6. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 1, characterized in that: The second through holes are provided with at least two groups, one of which corresponds one-to-one to the output pins of the TX signal of the UFS chip to be tested, and the other of which corresponds one-to-one to the input pins of the RX signal of the UFS chip to be tested.
7. The UFS chip transfer plate adaptable to the UFS chip analyzer according to claim 6, characterized in that: The two groups of the second through holes are arranged in rows and at intervals along one side of the length direction of the rotating plate body.
8. The UFS chip transfer plate adaptable to the UFS chip analyzer according to claim 7, characterized in that: Each group of the second through holes includes at least one first connection hole and one second connection hole, which respectively correspond to the DP port pin and the DN port pin of the TX signal / RX signal of the UFS chip to be tested.
9. The UFS chip transfer plate adaptable to the UFS chip analyzer according to claim 8, characterized in that: Each group of the second through holes includes a plurality of the first connection holes and a plurality of the second connection holes, and the first connection holes and the second connection holes are arranged as a unit, and adjacent units are arranged equidistantly.
10. The UFS chip transfer board adaptable to the UFS chip analyzer according to claim 9, characterized in that: The first connection holes and the second connection holes of each unit are arranged at intervals.