Capacitive battery pack equalization circuit and battery pack

Abstract

The utility model relates to a capacitor type battery pack equalization circuit and a battery pack, and the equalization circuit comprises a pulse generator which is used for generating a first synchronization pulse and a second synchronization pulse, and a first synchronization pulse driver is electrically connected with the pulse generator; the first half-bridge switch is electrically connected with the first synchronous pulse driver, and the first synchronous pulse driver drives the first half-bridge switch after receiving the first synchronous pulse; the second synchronous pulse driver is electrically connected with the pulse generator; the second half-bridge switch is electrically connected with the second synchronous pulse driver, and the second synchronous pulse driver drives the second half-bridge switch after receiving the second synchronous pulse; the equalization capacitor is electrically connected with the midpoint of the first half-bridge switch and the midpoint of the second half-bridge switch. According to the invention, voltage and energy balancing can be effectively carried out between adjacent connected and non-adjacent connected battery packs, and the energy balancing speed and efficiency are improved.

Description

[0001] This application claims priority to Chinese patent application No. 202421366251.7 filed on June 14, 2024, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of energy storage technology, and in particular to a capacitive battery pack equalization circuit and a battery pack. Background Art

[0003] In the design and application of battery energy storage systems, the consistency of battery cells is a key factor affecting system performance. Usually, lithium battery cells are combined into battery packs in series and parallel, which are further connected in series to form high-voltage battery packs, also known as battery clusters, and further connected in clusters to form the entire battery energy storage system. This configuration is to meet the requirements of voltage and capacity levels in different application scenarios.

[0004] However, due to differences in manufacturing processes during the production process, battery cells often have differences in capacity, internal resistance and voltage. These differences will gradually increase when the batteries are used in series, eventually leading to the so-called "barrel effect", that is, the performance of the entire system is constrained by individual weaker battery cells, thereby reducing the effective capacity and operating efficiency of the battery energy storage system.

[0005] This problem is particularly prominent in high-voltage industrial and commercial energy storage and large-scale power station energy storage systems, because these application scenarios have higher requirements for the stability and continuous output capacity of the battery system. At present, battery balancing technology is one of the effective methods to solve the inconsistency of battery cells, especially active balancing technology. Compared with the traditional passive balancing method that uses resistors to consume energy, active balancing realizes the effective transfer of energy between battery cells through energy storage elements, and has higher energy conversion efficiency and balancing speed.

[0006] Active balancing technology can be subdivided into cell-to-cell balancing within the battery pack and balancing between battery packs according to the scope and method of balancing. In terms of technical implementation, active balancing technology mainly includes inductive, capacitive and transformer topologies.

[0007] Although there are many balancing technologies, traditional methods often have limitations when dealing with energy and voltage balancing between non-adjacent battery packs, especially when facing the balancing of high-voltage battery packs. For example, patent CN115622200A discloses a voltage balancing method for battery packs, which uses independent DC / DC converters and controllers between battery packs for energy regulation, so that the battery management system requires multiple converters and controllers, increasing system costs, and the system volume and weight will also increase accordingly. Especially when applied to high-voltage battery packs, the design of the DC / DC converter will be more cumbersome and will also face more complex maintenance costs.

[0008] In addition, existing capacitive voltage equalization structures usually rely on a single or a few capacitors to move energy in a battery pack. In multi-battery pack applications, multiple equalization circuits and control logic are required to ensure effective energy distribution between all battery packs. Often, energy can only be transferred between adjacent battery cells or battery packs, reducing the flexibility and effectiveness of equalization. In addition, existing capacitive equalization methods are usually designed as fixed configurations and have poor adaptability when dealing with battery packs with different configurations or different states. For example, when some batteries in a battery pack have significantly different performance characteristics due to aging or loss, traditional capacitive equalization may not be able to effectively identify and adapt to these changes, resulting in poor equalization results. Utility Model Content

[0009] The embodiments of the present application provide a capacitive battery pack balancing circuit and a battery pack to at least solve the energy and voltage balancing problem between battery packs.

[0010] In a first aspect, an embodiment of the present application provides a capacitive battery pack balancing circuit for voltage balancing between a first battery pack and a second battery pack in a battery pack, the circuit comprising:

[0011] A pulse generator, used for generating a first synchronization pulse and a second synchronization pulse;

[0012] A first synchronous pulse driver, electrically connected to the pulse generator;

[0013] A first half-bridge switch, electrically connected to the first synchronization pulse driver, and the first synchronization pulse driver drives the first half-bridge switch after receiving the first synchronization pulse;

[0014] A second synchronous pulse driver, electrically connected to the pulse generator;

[0015] A second half-bridge switch, electrically connected to the second synchronization pulse driver, and the second synchronization pulse driver drives the second half-bridge switch after receiving the second synchronization pulse;

[0016] a balancing capacitor electrically connected to a midpoint of the first half-bridge switch and a midpoint of the second half-bridge switch;

[0017] The positive electrode of the first battery pack is connected to the ground terminal of the lower arm of the second half-bridge switch, and the negative electrode is connected to the ground terminal of the lower arm of the first half-bridge switch;

[0018] The positive electrode of the second battery pack is connected to the upper arm high voltage power supply terminal of the second half-bridge switch, and the negative electrode is connected to the upper arm high voltage power supply terminal of the first half-bridge switch.

[0019] In some embodiments, the first battery pack and the second battery pack are any two battery packs with the same specifications in the same cluster or different clusters of battery packs, and any two battery packs refer to adjacent connected battery packs or non-adjacent connected battery packs in the same cluster of series-connected high-voltage battery packs, wherein the first battery pack is located at the low potential end of the battery pack and the second battery pack is located at the high potential end of the battery pack.

[0020] Based on the above structure, the capacitive battery pack balancing circuit of the present application has a simple topology and can efficiently achieve energy balancing between battery packs. It is suitable for voltage and energy balancing between any two battery packs in series-connected high-voltage battery packs, such as industrial and commercial energy storage systems, and is also suitable for voltage and energy balancing between any two battery packs in parallel-connected high-voltage battery packs with a common ground. It is particularly suitable for use in occasions such as maintenance of battery packs in medium and large energy storage systems.

[0021] In some of the embodiments, the first synchronization pulse of the pulse generator is further connected to the power supply terminal Vcc2 of the second synchronization pulse driver via a rectifier and filter circuit to provide power to the second synchronization pulse driver.

[0022] In some embodiments, the power supply terminal Vcc1 of the pulse generator and the power supply terminal of the first synchronous pulse driver are electrically connected to the positive electrode of the first battery pack.

[0023] In some embodiments, the positive electrode of the first battery pack is connected to the power ground of the second synchronous pulse driver, and the negative electrode is connected to the power ground of the pulse generator and the power ground of the first synchronous pulse driver.

[0024] In some embodiments, the first half-bridge switch and the second half-bridge switch each include two transistors connected in series.

[0025] In some embodiments, the rectification and filtering circuit includes:

[0026] Capacitor C5, connected to the first synchronous pulse output terminal of the pulse generator;

[0027] A diode D2, a cathode connected to the output end of the capacitor C5, and a positive electrode electrically connected to the positive electrode of the first battery pack;

[0028] The diode D5 is connected to the power supply terminal Vcc2 of the second synchronous pulse driver and is connected to the output terminal of the capacitor C5 via a resistor R5.

[0029] In some embodiments, a working status indication circuit is further included, including:

[0030] A plurality of light emitting diodes LED, respectively connected to the output ends of the pulse generator, the first synchronous pulse driver, and the second synchronous pulse driver;

[0031] A current limiting resistor is connected to the output end of each of the light emitting diodes LED.

[0032] Based on the above structure, the process of pulse generation and output can light up the corresponding light-emitting diode LED to clearly know the working status of the balancing circuit.

[0033] In some embodiments, the pulse generator further includes a power supply and a half-bridge output circuit connected thereto, and the half-bridge output circuit includes transistors Q1b and Q2b.

[0034] In another embodiment, the second synchronous pulse driver power supply terminal is further connected to a high voltage power supply, and the high voltage power supply includes:

[0035] A filter capacitor C3 is connected to a power ground of the second synchronous pulse driver;

[0036] The voltage stabilizing diode D3 is connected in parallel to both ends of the filter capacitor C3;

[0037] A bias resistor R3 is connected to the positive electrode P2+ of the second battery pack and the filter capacitor C3;

[0038] The transistor QP3 has a drain connected to the positive electrode P2+ of the second battery pack, a source connected to the output end of the diode D5 and the power supply end Vcc2 of the second synchronous pulse driver via a resistor, and a gate connected to the positive electrode P2+ of the second battery pack via a bias resistor R3.

[0039] In another embodiment, the power supply further includes a BUCK type DCDC circuit, a first output end of which is electrically connected to the pulse generator and the power supply end of the first synchronous pulse driver, and a second output end of which is electrically connected to the power supply end of the second synchronous pulse driver;

[0040] In a second aspect, an embodiment of the present application provides a battery pack, which includes at least two battery packs, and a capacitive battery pack balancing circuit as described in the first aspect is arranged between two of the battery packs or between any two of three or more battery packs.

[0041] Compared with the related art, the capacitive battery pack balancing circuit and battery pack provided in the embodiments of the present application, by using advanced synchronous pulse control and half-bridge switching technology, allow effective voltage and energy balancing between non-adjacent connected battery packs, thereby improving the speed and efficiency of energy balancing, and increasing the adaptability of the circuit structure to different battery states, thereby optimizing the performance and reliability of the entire battery energy storage system, solving the energy and voltage balancing problem between any non-adjacent battery packs, and proposing a more reasonable and reliable topology structure, which is suitable for voltage balancing between high-voltage battery packs in the same cluster and different clusters with a common ground.

[0042] The circuit topology of the present application is reasonable and reliable, which can effectively improve the performance and reliability of the entire battery energy storage system, and can significantly improve the operating efficiency and stability of the battery energy storage system, especially in high-voltage battery applications, and is expected to solve the battery consistency problem that has long plagued the industry.

[0043] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0045] Figure 1 is a schematic diagram of a capacitor battery pack equalization circuit according to an embodiment of the present application;

[0046] Figure 2 is a circuit schematic diagram of a capacitive battery pack balancing circuit according to an embodiment of the present application;

[0047] Figure 3 is a circuit schematic diagram of a capacitive battery pack balancing circuit according to another embodiment of the present application.

[0048] Figure 2 middle:

[0049] 1. Pulse generator, 2. First synchronous pulse driver, 3. First half-bridge switch, 4. Second synchronous pulse driver, 5. Second half-bridge switch, 6. Power supply, 7. Battery pack balancing circuit;

[0050] Figure 3 middle:

[0051] 1. Pulse generator, 2. First synchronous pulse driver, 3. First half-bridge switch, 4. Second synchronous pulse driver, 5. Second half-bridge switch, 61. Power supply, 7. Battery pack balancing circuit. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0053] Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. In addition, it can also be understood that although the efforts made in this development process may be complicated and lengthy, for ordinary technicians in this field related to the content disclosed in this application, some changes in design, manufacturing or production based on the technical content disclosed in this application are just conventional technical means, and should not be understood as insufficient content disclosed in this application.

[0054] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0055] Unless otherwise defined, the technical terms or scientific terms involved in this application should be the usual meanings understood by people with ordinary skills in the technical field to which this application belongs. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "plurality" involved in this application refers to two or more. The terms "first", "second", "third", etc. involved in this application are merely to distinguish similar objects and do not represent a specific ordering of objects.

[0056] High-voltage battery packs in series in the same cluster: refers to a high-voltage battery pack in which all battery packs are connected in series, also known as a battery cluster. This configuration can increase the output voltage and power of the battery pack and is generally used in medium-capacity industrial and commercial energy storage systems.

[0057] High-voltage battery packs with different clusters sharing the same ground: refers to the presence of multiple parallel battery clusters in the battery system, and each battery cluster has its own independent reference ground. This configuration can expand the output capacity, current and power of the battery pack. The complexity of the battery management system, because each battery cluster needs to monitor and control the voltage and current independently. However, it may also provide more flexibility and scalability, because the overall capacity can be adjusted by independently increasing or decreasing the number of parallel battery clusters as needed, which is usually used in large power station-level energy storage systems.

[0058] The present application provides a capacitive battery pack balancing circuit for voltage balancing between a first battery pack P1 and a second battery pack P2 in a battery pack. Figure 1 is a schematic diagram of a capacitor battery pack balancing circuit according to an embodiment of the present application, such as Figure 1 As shown, the equalization circuit includes a pulse generator, a first synchronous pulse driver, a first half-bridge switch, a second synchronous pulse driver, and a second half-bridge switch. Those skilled in the art can understand that Figure 1 The capacitive battery pack balancing circuit structure shown in the figure does not constitute a limitation on the capacitive battery pack balancing circuit, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0059] Combine the following Figure 1 A detailed introduction to the components of the capacitive battery pack balancing circuit:

[0060] The pulse generator is used to generate a first synchronization pulse IN1 and a second synchronization pulse IN2;

[0061] The first synchronous pulse driver is electrically connected to the pulse generator, the first half-bridge switch is electrically connected to the first synchronous pulse driver, and the first synchronous pulse driver drives the first half-bridge switch after receiving the first synchronous pulse;

[0062] The second synchronization pulse driver is electrically connected to the pulse generator, and the second half-bridge switch is electrically connected to the second synchronization pulse driver. The second synchronization pulse driver drives the second half-bridge switch after receiving the second synchronization pulse. Optionally, the first half-bridge switch and the second half-bridge switch include at least two semiconductor transistors, and the semiconductor transistors can be triodes, power field effect transistors and / or IGBTs. Preferably, NMOSFET power field effect transistors are selected.

[0063] The balancing capacitor CB is electrically connected to the midpoint of the first half-bridge switch and the midpoint of the second half-bridge switch;

[0064] The positive pole P1+ of the first battery pack P1 is connected to the ground terminal of the lower arm of the second half-bridge switch, the power supply terminal Vcc1 of the pulse generator and the power supply terminal of the first synchronous pulse driver, and the negative pole P1- is connected to the ground terminal of the lower arm of the first half-bridge switch, the power ground of the pulse generator and the power ground of the first synchronous pulse driver; at the same time, the positive pole of the first battery pack is also connected to the power ground of the second synchronous pulse driver.

[0065] The positive electrode P2+ of the second battery pack P2 is connected to the upper arm high voltage power supply terminal of the second half-bridge switch, and the negative electrode P2- is connected to the upper arm high voltage power supply terminal of the first half-bridge switch.

[0066] In some of the embodiments, the first battery pack P1 and the second battery pack P2 are any two battery packs with the same specifications in the battery packs of the same cluster or different clusters. The any two battery packs refer to adjacently connected battery packs or non-adjacently connected battery packs in the same cluster of series-connected high-voltage battery packs, and may also be any two battery packs in different clusters of parallel-connected high-voltage battery packs with a common ground. The first battery pack is located at the low potential end of the battery pack, and the second battery pack is located at the high potential end of the battery pack. The battery packs include lithium-ion batteries or lead-acid batteries, and may also be other battery types that support multiple uses.

[0067] Based on the above structure, the present application utilizes the first synchronization pulse IN1 and the second synchronization pulse IN2 to turn on the upper arm of the first half-bridge switch and the lower arm of the first half-bridge switch and the second half-bridge switch in turn to achieve energy balance between the two battery packs. The capacitive battery pack balancing circuit has a simple topology and can efficiently achieve energy balance between battery packs. It is suitable for voltage and energy balance between any two battery packs in series high-voltage battery packs, such as industrial and commercial energy storage systems, and is also suitable for voltage and energy balance between any two battery packs in parallel high-voltage battery packs with different clusters and a common ground. It is particularly suitable for use in occasions such as maintenance of battery packs in medium and large energy storage systems.

[0068] Combine the following Figure 2 The preferred embodiment shown in the figure describes and illustrates the capacitive battery pack equalization circuit 7 of the embodiment of the present application, referring to Figure 1 and Figure 2 As shown:

[0069] The pulse generator 1 uses a self-oscillating half-bridge integrated circuit, a 555 timer, and an MCU microcontroller, such as Figure 2 As shown, the embodiment of the present application preferably adopts a self-oscillating half-bridge integrated circuit N1, for example but not limited to IRS21531DS of International Rectifier IR and L6571A / B of STMicroelectronics ST. The pulse generator 1 of the embodiment of the present application is composed of a self-oscillating half-bridge driver integrated circuit N1, a power supply 6 and a half-bridge output circuit, and the half-bridge output circuit includes transistors Q1b and Q2b.

[0070] The first synchronous pulse driver 2 and the second synchronous pulse driver 4 use dedicated high-voltage half-bridge driver chips, such as high-side same-phase single-input IN high-voltage half-bridge driver chips N2 and N3, examples of which are but not limited to IR's IRS2104S, Infineon's 2ED2104, 2ED2184, ST's L6384E and other chip models. The first synchronous pulse driver N2 input terminal of the chip is electrically connected to the midpoint of the half bridge of the pulse generator 1, and outputs the first synchronous pulse IN1; the second synchronous pulse driver N3 input terminal is electrically connected to the high-side output of the half-bridge drive circuit of the pulse generator 1 through the diode D1 and the resistor R1, and outputs the second synchronous pulse IN2; the digital control logic of the chip is responsible for receiving external control signals and converting them into control signals inside the driver chip; the half-bridge drive circuit generates corresponding electrical levels and pulse widths according to the control signals to drive the upper and lower arms of the first half-bridge switch 3 and the second half-bridge switch 5 to be turned on in turn. How to generate corresponding electrical levels and pulse widths to drive the upper and lower arms of the half-bridge switches through control signals is a common function of the pulse driver and is a known technology. Its specific implementation logic will not be expanded in this application.

[0071] The first half-bridge switch 3 and the second half-bridge switch 5 each include two transistors connected in series. Figure 2 As shown, the first half-bridge switch 3 includes transistors Q11b and Q21b, the second half-bridge switch 5 includes transistors Q12b and Q22b, the low voltage end of the first half-bridge switch 3 is connected to the negative electrode P1- of the first battery pack P1, the high voltage end is connected to the negative electrode P2- of the second battery pack P2, the low voltage end of the second half-bridge switch 5 is connected to the positive electrode P1+ of the first battery pack P1, and the high voltage end is connected to the positive electrode P2+ of the second battery pack P2. The first synchronous pulse driving circuit 2 is electrically connected to the positive and negative electrodes P1+ and P1- of the first battery pack P1 and the transistor gate of the first half-bridge switch 3; the second synchronous pulse driving circuit 4 is electrically connected to the positive electrode P2+ of the second battery pack P2, the positive electrode P1+ of the first battery pack P1 and the transistor gate of the second half-bridge switch 5, and the midpoint of the first half-bridge switch 3 and the midpoint of the second half-bridge switch 5 are connected to the balancing capacitor CB.

[0072] The first synchronization pulse IN1 output by the pulse generator 1 through Q1b and Q2b is connected to the input end of the first synchronization pulse driver 2 to drive the first half-bridge switch 3; the second synchronization pulse IN2 generated by the high-side output of the pulse generator 1 is connected to the input end of the second synchronization pulse driver 4 through the resistor R1 and the diode D1 to drive the second half-bridge switch 5;

[0073] Based on the above structure, the first synchronization pulse IN1 and the second synchronization pulse IN2 are used to turn on the upper arms Q21b and Q22b of the first half-bridge switch 3 and the second half-bridge switch 5 and the lower arms Q11b and Q12b of the first half-bridge switch 3 and the second half-bridge switch 5 in turn.

[0074] When the upper arm Q21b of the first half-bridge switch 3 and the upper arm Q22b of the second half-bridge switch 5 are turned on at the same time, the balancing capacitor CB is connected in parallel to the two ends P2+ / P2- of the second battery pack P2. If the voltage of the second battery pack P2 is higher than the voltage of the balancing capacitor, energy will be transferred from the second battery pack P2 to the balancing capacitor CB; next, when the lower arm Q11b of the first half-bridge switch 3 and the lower arm Q12b of the second half-bridge switch 5 are turned on at the same time, the balancing capacitor CB is connected in parallel to the two ends P1+ / P1- of the first battery pack P1. If the voltage of the balancing capacitor CB is higher than the voltage of the first battery pack P1, energy will be transferred from the balancing capacitor CB to the first battery pack P1. By controlling the upper arm of the second half-bridge switch and the lower arm of the second half-bridge switch to be turned on in turn, the process of transferring energy through the balancing capacitor CB is continuously repeated, and the voltage difference between the two battery packs will gradually decrease, thereby achieving voltage and energy balance.

[0075] It should be noted that, in the above-mentioned embodiment, the maximum potential difference between the first battery pack P1 and the second battery pack P2 is equal to or lower than the withstand voltage of the first synchronous pulse driver 2, the second synchronous pulse driver 4 and each transistor in the circuit. Accordingly, the first synchronous pulse driver 2, the second synchronous pulse driver 4 and each transistor in the circuit can be configured based on the maximum voltage difference in the battery pack, so that the balancing circuit of the embodiment of the present application has higher application flexibility.

[0076] In order to clearly know the working state of the battery pack balancing circuit 7, in another embodiment, the balancing circuit of the present application also includes a working state indication circuit, including: multiple light-emitting diodes LED, current limiting resistor, multiple light-emitting diodes LED are respectively connected to the output ends of the pulse generator 1, the first synchronous pulse driver 2, and the second synchronous pulse driver 4; the current limiting resistor is connected to the output end of each of the light-emitting diodes LED. Based on the above structure, the process of pulse generation and output can light up the corresponding light-emitting diode LED to clearly know the working state of the balancing circuit.

[0077] In another embodiment, the first synchronous pulse of the pulse generator 1 is also connected to the power supply terminal Vcc2 of the second synchronous pulse driver 4 via a rectifier and filter circuit to provide power for the second synchronous pulse driver 4. The rectifier and filter circuit includes: a capacitor C5, a diode D2 and a diode D5, the capacitor C5 is connected to the first synchronous pulse output terminal of the pulse generator 1, specifically connected to the source of the half-bridge output circuit Q2b of the pulse generator 1, the cathode of the diode D2 is connected to the output terminal of the capacitor C5, and the anode is electrically connected to the anode of the first battery pack; the diode D5 is connected to the power supply terminal Vcc2 of the second synchronous pulse driver and is connected to the output terminal of the capacitor C5 via a resistor R5.

[0078] In another embodiment, the power supply end of the second synchronous pulse driver 4 is also connected to a high-voltage power supply, which includes: a filter capacitor C3, a voltage regulator diode D3, a bias resistor R3, and a transistor QP3. The filter capacitor C3 is connected to the power supply ground of the second synchronous pulse driver and the positive electrode P1+ of the first battery pack. The voltage regulator diode D3 is connected in parallel to both ends of the filter capacitor C3. The bias resistor R3 is connected to the positive electrode P2+ of the second battery pack and the filter capacitor C3. The drain of the transistor QP3 is connected to the positive electrode P2+ of the second battery pack, and the source is connected to the output end of the diode D5 and the power supply end Vcc2 of the second synchronous pulse driver through a resistor. The gate of the transistor QP3 is connected to the positive electrode P2+ of the second battery pack through the bias resistor R3. The transistor QP3 provides the required power supply for the second synchronous pulse driver 4. The circuit can also be used to provide electrical energy for the first synchronous pulse driver 2 and the pulse generator 1. Figure 2 The power supply 6 in.

[0079] Figure 3 A circuit diagram of another embodiment of the present application is given, and Figure 2 The difference is that the power supply 61 adopts a BUCK type DCDC circuit, which further saves the number of required linear power supplies, simplifies the circuit structure, and reduces the power consumption of the circuit; one of the outputs is Figure 3 The Vcc terminal is connected to the power supply terminal of the pulse generator N1 and the first synchronous pulse driver N2, that is, Figure 1 The Vcc1 terminal is used to supply power to the pulse generator N1 and the first synchronous pulse driver N2. Figure 3 The VBS1 terminal is connected to the power supply terminal of the second synchronous pulse driver N3, that is, Figure 1 The Vcc2 terminal in the middle is used to supply power to the second synchronous pulse driver N3.

[0080] The BUCK type DCDC circuit includes: a DCDC integrated circuit N11 and its peripheral circuits. Preferably, the DCDC integrated circuit N11 adopts HVBUCK ICs such as LN8K17 / L of Shenzhen Lishengmei Semiconductor Company and SDH8321H of Hangzhou Silan Microelectronics, with an output voltage of +15V and a static power consumption of less than 50mW; the peripheral circuit includes an energy storage inductor L11, a freewheeling diode D11, a rectifier diode D12, a rectifier diode D13, a filter capacitor C11, and a filter capacitor C12; when the internal switch tube of the DCDC integrated circuit N11 is turned on, the input voltage is limited to charge the output filter capacitor C12 through the energy storage inductor L11, and when the switch tube is turned off, the current of the energy storage inductor L11 is continued by the freewheeling diode D11, and at the same time, the filter capacitor C12 is charged through the freewheeling diode D12. C11 is charged; when the voltage across the filter capacitor C11 is higher than the stable value of 15V, the conduction time of the internal switch tube of the DCDC integrated circuit N11 is shortened, and the output voltage is reduced, and vice versa; when the switch tube of the DCDC integrated circuit N11 is turned on, the voltage of the filter capacitor C11 charges the VBS1 filter capacitor through the diode D13, and outputs the high-side power supply voltage +15V to provide power for the second synchronous pulse driver N3; optionally, in order to adapt to the voltage range of the first battery pack and the second battery pack, the two output voltages +15V can be selected as +12V.

[0081] In addition, an embodiment of the present application provides a battery pack, which includes at least two battery packs. A capacitive battery pack balancing circuit as described in the above embodiment is arranged between the two battery packs or between any two of three or more battery packs, so as to achieve energy balance between the battery packs. In the case where N battery packs are arranged, multiple battery balancing circuits can also be arranged to balance all the battery packs.

[0082] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A capacitive battery pack equalization circuit, characterized in that: For voltage balancing between a first battery pack and a second battery pack in a battery pack, the circuit comprises: A pulse generator, used for generating a first synchronization pulse and a second synchronization pulse; A first synchronous pulse driver, electrically connected to the pulse generator; A first half-bridge switch, electrically connected to the first synchronization pulse driver, and the first synchronization pulse driver drives the first half-bridge switch after receiving the first synchronization pulse; A second synchronous pulse driver, electrically connected to the pulse generator; A second half-bridge switch, electrically connected to the second synchronization pulse driver, and the second synchronization pulse driver drives the second half-bridge switch after receiving the second synchronization pulse; a balancing capacitor electrically connected to a midpoint of the first half-bridge switch and a midpoint of the second half-bridge switch; The positive electrode of the first battery pack is connected to the ground terminal of the lower arm of the second half-bridge switch, and the negative electrode is connected to the ground terminal of the lower arm of the first half-bridge switch; The positive electrode of the second battery pack is connected to the upper arm high voltage power supply terminal of the second half-bridge switch, and the negative electrode is connected to the upper arm high voltage power supply terminal of the first half-bridge switch.

2. The capacitive battery pack equalization circuit according to claim 1, characterized in that: The first battery pack and the second battery pack are any two battery packs with the same specifications in the battery packs of the same cluster or different clusters, wherein the first battery pack is located at the low potential end of the battery pack and the second battery pack is located at the high potential end of the battery pack.

3. The capacitive battery pack equalization circuit according to claim 1, characterized in that: The first synchronous pulse of the pulse generator is also connected to the power supply terminal Vcc2 of the second synchronous pulse driver via a rectifier and filter circuit.

4. The capacitive battery pack equalization circuit according to claim 1, characterized in that: The power supply terminal Vcc1 of the pulse generator and the power supply terminal of the first synchronous pulse driver are electrically connected to the positive electrode of the first battery pack.

5. The capacitor type battery pack equalization circuit according to claim 4, characterized in that: The positive electrode of the first battery pack is connected to the power ground of the second synchronous pulse driver, and the negative electrode is connected to the power ground of the pulse generator and the power ground of the first synchronous pulse driver.

6. The capacitive battery pack equalization circuit according to claim 1, characterized in that: The first half-bridge switch and the second half-bridge switch each include two transistors connected in series.

7. The capacitor battery pack equalization circuit according to claim 3, characterized in that: The rectifier and filter circuit comprises: Capacitor C5, connected to the first synchronous pulse output terminal of the pulse generator; A diode D2, a cathode connected to the output end of the capacitor C5, and a positive electrode electrically connected to the positive electrode of the first battery pack; The diode D5 is connected to the power supply terminal Vcc2 of the second synchronous pulse driver and is connected to the output terminal of the capacitor C5 via a resistor R5.

8. The capacitive battery pack equalization circuit according to claim 1, characterized in that: Also includes a working status indication circuit, including: A plurality of light emitting diodes LED, respectively connected to the output ends of the pulse generator, the first synchronous pulse driver, and the second synchronous pulse driver; A current limiting resistor is connected to the output end of each of the light emitting diodes LED.

9. The capacitor type battery pack equalization circuit according to claim 1, characterized in that: The pulse generator also includes a power supply and a half-bridge output circuit, the half-bridge output circuit includes transistors Q1b and Q2b, and the power supply further includes a BUCK type DCDC circuit, a first output end of which is electrically connected to the pulse generator and the power supply end of the first synchronous pulse driver, and a second output end of which is electrically connected to the power supply end of the second synchronous pulse driver.

10. A battery pack, comprising at least two battery packs, characterized in that: A capacitive battery pack balancing circuit as claimed in any one of claims 1 to 9 is arranged between the two battery packs or between any two of the three or more battery packs.

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