Image sensor

Abstract

The utility model provides an image sensor which comprises a semiconductor structure layer, a circuit connection layer and an optical structure layer. The semiconductor structure layer comprises a plurality of pixel units, a first isolation structure is arranged between every two adjacent pixel units, and the first isolation structures penetrate through the semiconductor structure layer in the thickness direction; the pixel unit comprises a photosensitive module and an overflow module; the photosensitive module is used for converting the optical signal into a charge signal, and the charge signal comprises a first charge signal and a second charge signal; the overflow module is used for at least storing the second charge signal and realizing the isolation of the overflow module between adjacent pixel units based on the first isolation structure; the circuit connection layer is located on the first surface of the semiconductor structure layer; the optical structure layer is located on the second face of the semiconductor structure layer and comprises a plurality of color filtering units corresponding to the pixel units. According to the utility model, the problem in the prior art that the image color and the image effect are influenced by the charge crosstalk between the PDs is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of image sensors, in particular to an image sensor. Background Art

[0002] With the continuous development of image sensors, the requirements for high-quality imaging in the fields of transportation, digital photography, etc. are increasing, among which high dynamic range is one of the important factors to measure the imaging quality of image sensors. In daily shooting environments, especially when there are large areas of bright light sources in the environment, such as the sun, car headlights, and reflections from smooth surfaces such as glass, mirrors, and metals, it is easy for some or even large areas of overexposure to appear in the captured pictures. It is necessary to adjust the image sensor to reduce the exposure time to reduce the area of ​​the overexposed area, but this will easily make other areas of the picture too dark and lose some details.

[0003] Therefore, the current way to solve this type of problem is to design a large-capacity lateral overflow integration capacitor (LOFIC) in the pixel structure of the image sensor and place it near the floating diffusion node (FD). The charge of the photodiode (PD) in the overexposed area of ​​the image can overflow through the transfer transistor and be stored in the FD and LOFIC to save the signal of the overexposed area. In the subsequent quantization process, the signal in the non-overexposed area PD and the signal in the overexposed area LOIFC+FD+PD are synthesized to ensure that the bright area signal is not overexposed and the dark area signal-to-noise ratio is also high, thereby achieving high dynamic range imaging.

[0004] This pixel design that achieves high dynamic range is mainly achieved by storing the overflow charge in the PD in the high-brightness area. In such a high-brightness environment, the amount of PD overflow charge is huge, and it is often impossible for all of the overflow charge to flow into the FD and LOFIC through the transfer transistor ideally. A part of the overflow charge will cross the potential barrier between PD and PD and flow from the overexposed PD into the adjacent unsaturated PD, forming crosstalk between PDs; this type of crosstalk will not only affect the color of the image, but also cause the clarity of the picture to decrease, affecting the image effect.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the utility model and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the utility model. Utility Model Content

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide an image sensor for solving the problem in the prior art that the charge crosstalk between PDs affects the image color and image effect.

[0007] In order to achieve the above-mentioned object and other related objects, the utility model provides an image sensor, the image sensor comprising:

[0008] Semiconductor structure layer, circuit connection layer and optical structure layer;

[0009] The semiconductor structure layer includes a plurality of pixel units, and a first isolation structure is provided between adjacent pixel units, wherein the first isolation structure penetrates the semiconductor structure layer in the thickness direction of the semiconductor structure layer;

[0010] The pixel unit includes a photosensitive module and an overflow module; the photosensitive module is used to convert a light signal into a charge signal, wherein the charge signal includes a first charge signal and a second charge signal; the overflow module is used to store at least the second charge signal, wherein at least the overflow module between adjacent pixel units is isolated based on the first isolation structure;

[0011] The circuit connection layer is located on the first surface of the semiconductor structure layer;

[0012] The optical structure layer is located on the second surface of the semiconductor structure layer, and includes a plurality of color filter units, each of which corresponds to each of the pixel units.

[0013] Optionally, the pixel unit includes a plurality of pixel sub-units, and a second isolation structure is provided between adjacent pixel sub-units, wherein in the thickness direction of the semiconductor structure layer, the second isolation structure is a discontinuous structure and is divided into at least two parts by an overflow channel.

[0014] Optionally, the image sensor further includes an isolation enhancement structure for enhancing the isolation effect of the first isolation structure.

[0015] Optionally, the first isolation structure includes an insulating layer.

[0016] Optionally, the first isolation structure further includes a conductive layer, and the insulating layer is located outside the conductive layer.

[0017] Optionally, the first isolation structure includes at least one of a combined structure consisting of a first STI structure and a first BDTI structure, a FDTI structure, and a FBDTI structure.

[0018] Optionally, the second isolation structure includes a combined structure of a second STI structure and a second BDTI structure.

[0019] Optionally, the isolation enhancement structure includes a first transmission portion, which is located in the circuit connection layer; wherein the first transmission portion is electrically connected to the first isolation structure to transmit a voltage signal, and the first isolation structure includes an insulating layer and a conductive layer and the insulating layer is located on the outside of the conductive layer; or, the first transmission portion is electrically connected to the semiconductor substrate of a first area in the semiconductor structure layer to transmit a voltage signal, and the first area includes an area between a corresponding photosensitive element in a corresponding pixel unit and the first isolation structure.

[0020] Optionally, the isolation enhancement structure includes a first doped portion and a second transmission portion, the first doped portion is located in the semiconductor substrate of the first area of ​​the semiconductor structure layer, and the second transmission portion is located in the circuit connection layer and is electrically connected to the first doped portion to transmit a voltage signal; or, the isolation enhancement structure includes a first gate portion and a third transmission portion, the first gate portion is located on the first surface of the semiconductor structure layer and its projection on the surface of the semiconductor substrate is adjacent to the projection of the corresponding photosensitive element on the surface of the semiconductor substrate in the first area, or the first gate portion is located on the first surface of the semiconductor structure layer and bridges the corresponding photosensitive element in the corresponding pixel unit and the semiconductor substrate in the first area, and the third transmission portion is located in the circuit connection layer and is electrically connected to the first gate portion to transmit a voltage signal; wherein, the first area includes the area between the corresponding photosensitive element in the corresponding pixel unit and the first isolation structure.

[0021] Optionally, the isolation enhancement structure includes a second doped portion, a second gate portion and a fourth transmission portion, the second doped portion is located in the semiconductor substrate of the first region of the semiconductor structure layer, the second gate portion is located on the first surface of the semiconductor structure layer and is electrically connected to the second doped portion and the corresponding photosensitive element of the corresponding pixel unit, and the fourth transmission portion is located in the circuit connection layer and is electrically connected to the second doped portion and the floating diffusion node of the corresponding pixel unit; wherein the fourth transmission portion is also used as a light blocking layer.

[0022] Optionally, the photosensitive module includes a photosensitive element and a transmission transistor, the overflow module includes an overflow transistor and an overflow capacitor, and the pixel unit further includes a reset transistor, a source follower transistor and a row selection transistor, wherein:

[0023] The control end of the transmission transistor is connected to the transmission control signal, the first end is connected to the floating diffusion node, and the second end is connected to the first potential via the photosensitive element; the control end of the overflow transistor is connected to the overflow control signal, the first end is connected to the floating diffusion node, and the second end is connected to the second potential via the overflow capacitor; the control end of the reset transistor is connected to the reset control signal, the first end is connected to the third potential, and the second end is connected to the floating diffusion node; the control end of the source follower transistor is connected to the floating diffusion node, the first end is connected to the fourth potential, and the second end is connected to the first end of the row selection transistor; the control end of the row selection transistor is connected to the row selection signal, and the second end is connected to the column line;

[0024] Alternatively, the pixel unit further includes at least one gain transistor; when the number of the gain transistors is one, the control end of the gain transistor is connected to a gain control signal, the first end is connected to the first end of the overflow transistor and the second end of the reset transistor or is only connected to the second end of the reset transistor, and the second end is connected to a floating diffusion node; when the number of the gain transistors is greater than one, the gain transistors are connected in series and the first end of the series structure is connected to the first end of the overflow transistor and the second end of the reset transistor or is only connected to the second end of the reset transistor, and the second end is connected to a floating diffusion node, wherein the control end of each gain transistor is connected to a corresponding gain control signal.

[0025] Optionally, the photosensitive module includes a photosensitive element and a transfer transistor, the overflow module includes an overflow transistor and an overflow capacitor, and the pixel unit also includes a reset transistor, a source follower transistor and a row selection transistor; the control end of the transfer transistor is connected to a transmission control signal, the first end is connected to a floating diffusion node, and the second end is connected to a first potential via the photosensitive element; the control end of the overflow transistor is connected to an overflow control signal, the first end is connected to a floating diffusion node, the second end is connected to the second end of the reset transistor and connected to a second potential via the overflow capacitor; the control end of the reset transistor is connected to a reset control signal, and the first end is connected to a third potential; the control end of the source follower transistor is connected to a floating diffusion node, the first end is connected to a fourth potential, and the second end is connected to the first end of the row selection transistor; the control end of the row selection transistor is connected to a row selection signal, and the second end is connected to a column line.

[0026] As described above, the image sensor of the present invention isolates the charge crosstalk between photosensitive elements in adjacent pixel units through a first isolation structure, and improves the isolation effect of the first isolation structure through an isolation enhancement structure, thereby avoiding the influence of charge crosstalk on image color and picture clarity, improving image color and image effect, and enhancing the imaging quality of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 to Figure 5It is a schematic diagram of the structure of each step involved in a method for manufacturing an image sensor in the first embodiment, wherein: Figure 1 A schematic diagram of making the first STI structure. Figure 2 Schematic diagram for making pixel units and circuit connection layers. Figure 3 Schematic diagram of thinning a semiconductor substrate. Figure 4 Schematic diagram of making the first BDTI structure. Figure 5 Schematic diagram of making optical structure layer.

[0028] Figure 6 to Figure 8 It is a schematic diagram of the structure of each step involved in another method for manufacturing an image sensor in the first embodiment, wherein: Figure 6 Schematic diagram of making FDTI structure, pixel unit and circuit connection layer. Figure 7 Schematic diagram of thinning a semiconductor substrate. Figure 8 Schematic diagram of making optical structure layer.

[0029] Figures 9 to 12 It is a schematic diagram of the structure of each step involved in another method for manufacturing an image sensor in the first embodiment, wherein: Fig. 9 Schematic diagram for making pixel units and circuit connection layers. Fig.10 Schematic diagram of thinning a semiconductor substrate. Fig.11 To make a schematic diagram of the FBDTI structure, Fig.12 Schematic diagram of making optical structure layer.

[0030] Fig.13 The diagram shows a schematic diagram of application of the first isolation structure in an image sensor.

[0031] Fig.14a A circuit diagram showing a pixel unit, Fig.14b Display as Fig.14a The process of pixel unit obtaining image information is shown. Fig.15 Another circuit diagram showing a pixel unit.

[0032] Fig.16a Displayed as Fig.14a The circuit diagram of adding a gain transistor in the pixel unit shown in FIG. Fig.16b and Fig.16c Shown as Fig.16a The process and timing diagram of the pixel unit obtaining image information.

[0033] Fig.17a Displayed as Fig.15 The circuit diagram of adding a gain transistor in the pixel unit shown in FIG. Fig.17b Display as Fig.17a The process of pixel unit obtaining image information is shown.

[0034] Fig.18a Displayed as Fig.14a The circuit diagram of adding two gain transistors in the pixel unit shown in FIG. Fig.18b Display as Fig.18a The process of pixel unit obtaining image information is shown.

[0035] Fig.19a Another circuit diagram showing a pixel unit, Fig.19b Display as Fig.19a The process of pixel unit obtaining image information is shown.

[0036] Fig. 20 It is a schematic diagram showing the isolation enhancement structure in the second embodiment including the first transmission portion.

[0037] Fig.21 Another schematic diagram is shown when the isolation enhancement structure in the second embodiment includes the first transmission portion.

[0038] Fig. 22 It is a schematic diagram showing the isolation enhancement structure in the second embodiment including a first doped portion and a second transmission portion.

[0039] Fig.23 It is a schematic diagram showing the isolation enhancement structure in the second embodiment including a first gate portion and a third transmission portion.

[0040] Fig.24 It is a schematic diagram showing the isolation enhancement structure in the second embodiment including a second doped portion, a second gate portion and a fourth transmission portion.

[0041] Fig.25 It is a schematic diagram showing the image sensor in the third embodiment including a second isolation structure.

[0042] Fig.26 Shown is a schematic diagram of an application of an isolation enhancement structure in an image sensor.

[0043] Fig. 27 Shown is another schematic diagram of an isolation enhancement structure in an image sensor.

[0044] Component number description

[0045] 10 Image Sensor

[0046] 100 Semiconductor structure layer

[0047] 100' Semiconductor Substrate

[0048] 110 pixel unit

[0049] 110' pixel subunit

[0050] 120 First isolation structure

[0051] 120a1 First STI structure

[0052] 120a2 First BDTI structure

[0053] 120b FDTI structure

[0054] 120c FBDTI structure

[0055] 121 Insulation layer

[0056] 122 Conductive layer

[0057] 130 Second isolation structure

[0058] 131 Overflow channel

[0059] 132 Second STI structure

[0060] 133 Second BDTI Structure

[0061] 200 Circuit connection layer

[0062] 300 Optical structure layer

[0063] 310 Color filter unit

[0064] 311 Color Filter Layer

[0065] 312 Microlens

[0066] 400 Isolation Enhanced Structure

[0067] 410 First Transmission Department

[0068] 420 first doping part

[0069] 430 Second Transmission Department

[0070] 440 first gate portion

[0071] 450 The Third Transmission Department

[0072] 460 Second doping section

[0073] 470 Second gate portion

[0074] 480 Fourth Transmission Department DETAILED DESCRIPTION

[0075] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0076] See also Figures 1 to 27 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the utility model in a schematic manner, and the illustrations only show the components related to the utility model rather than the number, shape and size of the components in actual implementation. The form, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated.

[0077] Embodiment 1

[0078] like Figure 5 , Figure 8 and Fig.12 As shown, this embodiment provides an image sensor 10 , including a semiconductor structure layer 100 , a circuit connection layer 200 and an optical structure layer 300 .

[0079] The semiconductor structure layer 100 includes a plurality of pixel units 110, and a first isolation structure 120 is disposed between adjacent pixel units 110; wherein, in the thickness direction of the semiconductor structure layer 100, the first isolation structure 120 penetrates the semiconductor structure layer 100. Further, the first isolation structure 120 is a continuous structure, which may be a continuous structure formed as a whole, or a continuous structure penetrating the semiconductor structure layer 100 formed by contact connection of a plurality of first isolation structure sections. In a specific application, the first isolation structure 120 may be as follows: Fig.13 As shown, it is arranged between each pixel unit 110 of the image sensor 10, wherein the pixel unit 110 can be a pixel unit composed of a single photosensitive element, or a shared pixel unit composed of a plurality of photosensitive elements.

[0080] The pixel unit 110 obtains image information based on photoelectric conversion; in this embodiment, the pixel unit 110 includes a photosensitive module and an overflow module. The photosensitive module is used to convert the light signal into a charge signal, and the charge signal includes a first charge signal and a second charge signal; the photosensitive module is also used to store at least the first charge signal. The overflow module is electrically connected to the floating diffusion node FD, and is used to store at least the second charge signal for use in high-brightness scenes. The overflow module includes an overflow capacitor. Among them, the isolation of the overflow module between adjacent 110 pixel units is achieved based on the first isolation structure 120.

[0081] In combination with actual application scenarios, the first charge signal refers to the charge signal corresponding to the potential well portion, and the second charge signal refers to the charge signal corresponding to the overflow portion after exceeding the potential well portion; in some applications, the first charge signal is defined as the potential well charge signal, and the second charge signal is defined as the overflow charge signal. When the charge amount sensed by the photosensitive module does not reach the overflow state, the converted charge signal only includes the first charge signal, and the second charge signal can be considered to be zero at this time; when the charge amount sensed by the photosensitive module reaches the overflow state, the converted charge signal includes the first charge signal and the second charge signal.

[0082] As an example, Fig.14a and Fig.15 As shown, the pixel unit 110 includes a photosensitive element PD, an overflow capacitor C, a transfer transistor M1, an overflow transistor M2, a reset transistor M3, a source follower transistor M4 and a row selection transistor M5. The photosensitive module includes the photosensitive element PD and the transfer transistor M1, and the overflow module includes the overflow capacitor C and the overflow transistor M2.

[0083] The control end of the transfer transistor M1 is connected to the transfer control signal TX, the first end is connected to the floating diffusion node FD, and the second end is connected to the first potential via the photosensitive element PD; the control end of the overflow transistor M2 is connected to the overflow control signal OF, the first end is connected to the floating diffusion node FD, and the second end is connected to the second potential via the overflow capacitor C; the control end of the reset transistor M3 is connected to the reset control signal RST, the first end is connected to the third potential, and the second end is connected to the floating diffusion node FD; the control end of the source follower transistor M4 is connected to the floating diffusion node FD, the first end is connected to the fourth potential, and the second end is connected to the first end of the row selection transistor M5; the control end of the row selection transistor M5 is connected to the row selection signal RS, and the second end is connected to the column line.

[0084] Furthermore, the pixel unit 110 further includes at least one gain transistor M6, and different conversion gains are switched by controlling the opening and closing of each gain transistor M6.

[0085] When the number of gain transistors M6 is one: Fig.14a In the circuit structure shown in FIG. 1 , the control end of the gain transistor M6 is connected to the gain control signal DCG, the first end is connected to the first end of the overflow transistor M2 and the second end of the reset transistor M3, and the second end is connected to the floating diffusion node FD. Fig.16a shown; for Fig.15 In the circuit structure shown in FIG. 1 , the control end of the gain transistor M6 is connected to the gain control signal DCG, the first end is connected to the second end of the reset transistor M3, and the second end is connected to the floating diffusion node FD. Fig.17a shown.

[0086] When the number of gain transistors is greater than one: Fig.14a In the circuit structure shown, each gain transistor is connected in series, and the first end of the series structure is connected to the first end of the overflow transistor M2 and the second end of the reset transistor M3, while the second end of the series structure is connected to the floating diffusion node FD, wherein the control end of each gain transistor is connected to the corresponding gain control signal, Fig.18a The case where the number of gain transistors is two is shown; Fig.17a In the circuit structure shown, each gain transistor is connected in series and the first end of the series structure is connected to the second end of the reset transistor M3 while the second end of the series structure is connected to the floating diffusion node FD, wherein the control end of each gain transistor is connected to a corresponding gain control signal.

[0087] In other examples, the difference between Fig.14a In the circuit structure shown, the overflow transistor M2 has different connection relationships; Fig.19a As shown, the overflow transistor M2 is connected between the reset transistor M3 and the floating diffusion node FD. Specifically, the control end of the transfer transistor M1 is connected to the transmission control signal TX, the first end is connected to the floating diffusion node FD, and the second end is connected to the first potential via the photosensitive element PD; the control end of the overflow transistor M2 is connected to the overflow control signal OF, the first end is connected to the floating diffusion node FD, the second end is connected to the second end of the reset transistor M3 and connected to the second potential via the overflow capacitor C; the control end of the reset transistor M3 is connected to the reset control signal RST, and the first end is connected to the third potential; the control end of the source follower transistor M4 is connected to the floating diffusion node FD, the first end is connected to the fourth potential, and the second end is connected to the first end of the row selection transistor M5; the control end of the row selection transistor M5 is connected to the row selection signal RS, and the second end is connected to the column line. Of course, the pixel unit 110 of the circuit structure can also include at least one gain transistor M6 connected between the overflow transistor M2 and the floating diffusion node FD.

[0088] In one implementation, the photosensitive element PD is a photodiode, and all transistors are NMOS tubes. In this case, the control terminal in the above text refers to the gate, the first terminal refers to the drain, and the second terminal refers to the source. Of course, in other implementations, the photosensitive element PD includes a grating or a photoconductor, and all transistors are PMOS tubes. In addition, in an optional solution, the first potential is the ground potential or a negative potential, and the second potential is the ground potential (such as Fig.14a as shown) or variable potential (as Fig.15 As shown), the third potential is the power supply potential, and the fourth potential is the power supply potential.

[0089] The first isolation structure 120 is used to physically isolate adjacent pixel units 110, especially to isolate the charge exchange between the photosensitive elements PD in adjacent pixel units 110 to avoid charge crosstalk. For example, in the present embodiment, when there is an overflow module, the overflow charge overflows into the overflow charge storage element via the overflow path during the exposure process, such as the second charge signal overflows into the overflow capacitor via the overflow path. In the above process, the first isolation structure 120 is beneficial to maintaining the overflow charge signal at each node to prevent leakage to the adjacent pixel units 110 and generate crosstalk.

[0090] As an example, the first isolation structure 120 includes an insulating layer 121 and a conductive layer 122, wherein the insulating layer 121 is located on the side of the conductive layer 122, such as on the sidewall and bottom of the conductive layer 122; wherein the insulating layer 121 may be a single-layer structure or a multi-layer structure, and may be at least one of an oxide layer, a nitride layer, and a metal oxide layer; in an optional embodiment, the insulating layer 121 is a multi-layer structure, such as including an oxide layer and a nitride layer, and the nitride layer is located on the outside of the oxide layer; the conductive layer 122 may be a metal layer or a polysilicon layer, which has no substantial effect on the present embodiment. In other examples, the first isolation structure 120 may also be a structure including only an insulating layer, for example, the first isolation structure 120 is composed of a silicon oxide material, and of course, it may also be composed of a high dielectric constant dielectric layer such as aluminum oxide. In one implementation, the first isolation structure 120 is manufactured based on the FDTI process, the BDTI process or the STI process combined with the BDTI process, and includes at least one of a combination structure consisting of an FDTI structure, an FBDTI structure, a first STI structure and a first BDTI structure; it should be noted that the FDTI process may refer to a deep trench isolation structure prepared on the front side, the STI process may refer to a shallow trench isolation structure prepared on the front side, and the BDTI process may refer to a deep trench isolation structure prepared on the back side. For the specific process, please refer to the description in the method below.

[0091] The circuit connection layer 200 is located on the first surface of the semiconductor structure layer 100, such as the front surface of the semiconductor structure layer 100, and realizes signal transmission by electrically connecting with corresponding components in the pixel unit 110. The circuit connection layer 200 can be prepared using corresponding structural materials and processes in existing image sensors to realize electrical connection and signal extraction of each transistor.

[0092] The optical structure layer 300 is located on the second surface of the semiconductor structure layer 100, such as the back surface of the semiconductor structure layer 100, and includes a plurality of color filter units 310, wherein each color filter unit 310 corresponds to each pixel unit 110, and is used to obtain specific light information, such as visible light of a specific color. When manufacturing, the corresponding structural materials and processes in the existing image sensor can be used.

[0093] As an example, the color filter unit 310 includes a color filter layer 311 and a microlens 312, and the microlens 312 is located on the side of the color filter layer 311 away from the semiconductor structure layer 100; wherein the color filter layer 311 only allows visible light of one color to pass through, such as only allowing red light, green light or blue light to pass through so as to form a Bayer color array; of course, the color filter layer 311 can also allow light of other colors or even other non-visible light to pass through according to actual needs. Of course, the color filter layer 311 can also be set to pass visible light (white light). In an optional example, one pixel unit 110 corresponds to passing light of one color, and adjacent pixel units pass light of different colors. Furthermore, the image sensor can also realize the function of phase focusing (PDAF) based on the pixel unit 110. In addition, the color filter unit 310 can also include other structures, such as a transition layer, which has no substantial effect on this embodiment.

[0094] like Figures 1 to 5 As shown, this embodiment also provides a method for manufacturing an image sensor 10, including the following steps; wherein the image sensor 10 has the same structure as described above.

[0095] Step S1, providing a semiconductor substrate 100', manufacturing a first STI structure (front shallow trench isolation structure) 120a1 and a pixel unit 110 on a first surface of the semiconductor substrate 100', and manufacturing a circuit connection layer 200 on the first surface of the semiconductor substrate 100', such as Figure 1 and Figure 2 In this embodiment, the first STI structure 120a1 is manufactured first, and then the pixel unit 110 is manufactured.

[0096] The details are as follows: First, a first STI structure 120a1 is fabricated on a first surface of a semiconductor substrate 100' by using an STI process. For example, a shallow trench is formed on the first surface of the semiconductor substrate 100' and then filled to form the first STI structure 120a1. Figure 1 Subsequently, based on the first STI structure 120a1, a pixel region is defined on the first surface of the semiconductor substrate 100', and each component in the pixel unit 110 is manufactured in the pixel region by using doping, deposition and other processes, such as Figure 2 Finally, a circuit connection layer 200 is fabricated on the first surface of the semiconductor substrate 100' by using a deposition process, such as Figure 2 shown.

[0097] Step S2, after thinning the second surface of the semiconductor substrate 100', a first BDTI structure (back side deep trench isolation structure) 120a2 is formed on the second surface of the semiconductor substrate 100', and an optical structure layer 300 is formed on the second surface of the semiconductor substrate 100', wherein the first BDTI structure 120a2 and the first STI structure 120a1 are in contact with each other to form a first isolation structure 120, such as Figures 3 to 5 shown.

[0098] The details are as follows: First, the structure obtained in step S1 is turned over and the second surface of the semiconductor substrate 100' is polished and thinned to a preset thickness, such as Figure 3 As shown; then, a first BDTI structure 120a2 is fabricated on the second surface of the semiconductor substrate 100' by using a BDTI process, for example, a deep trench is formed on the second surface of the semiconductor substrate 100' and then filled to form the first BDTI structure 120a2. At this time, the top of the first BDTI structure 120a2 is in contact with the bottom of the first STI structure 120a1, as shown in FIG. Figure 4 Finally, the optical structure layer 300 is manufactured on the second surface of the semiconductor substrate 100' by using relevant processes, such as Figure 5 It should be noted that the filling materials of the shallow trench and the deep trench are usually the same, and the relevant contents can be found in the above text and will not be repeated here.

[0099] Of course, the manufacturing method of the image sensor 10 is not limited to the above method, and other feasible methods should also be applicable to this embodiment. Two other manufacturing methods different from the above method are shown below.

[0100] The second production method:

[0101] Step S1, providing a semiconductor substrate 100', manufacturing a FDTI structure (front through isolation structure) 120b and a pixel unit 110 on a first surface of the semiconductor substrate 100', and manufacturing a circuit connection layer 200 on the first surface of the semiconductor substrate 100', such as Figure 6 In this embodiment, the FDTI structure 120 b is manufactured first, and then the pixel unit 110 is manufactured.

[0102] The details are as follows: First, the FDTI structure 120b is fabricated on the first surface of the semiconductor substrate 100' by using the FDTI process. For example, the first surface of the semiconductor substrate 100' is etched to form a deep trench and then filled to form the FDTI structure 120b. Figure 6 Subsequently, based on the FDTI structure 120b, a pixel region is defined on the first surface of the semiconductor substrate 100', and each component in the pixel unit 110 is manufactured in the pixel region by using doping, deposition and other processes, such as Figure 6Finally, a circuit connection layer 200 is fabricated on the first surface of the semiconductor substrate 100' by using a deposition process, such as Figure 6 shown.

[0103] Step S2, thinning the second surface of the semiconductor substrate 100' until the FDTI structure 120b is exposed, and manufacturing an optical structure layer 300 on the second surface of the semiconductor substrate 100', wherein the FDTI structure 120b forms the first isolation structure 120, such as Figure 7 and Figure 8 shown.

[0104] The details are as follows: First, the structure obtained in step S1 is turned over and the second surface of the semiconductor substrate 100' is polished and thinned until the FDTI structure 120b is exposed. Figure 7 Subsequently, the optical structure layer 300 is fabricated on the second surface of the semiconductor substrate 100' by using a related process, as shown in FIG. Figure 8 shown.

[0105] The third production method:

[0106] Step S1, providing a semiconductor substrate 100', manufacturing a pixel unit 110 on a first surface of the semiconductor substrate 100', and manufacturing a circuit connection layer 200 on the first surface of the semiconductor substrate 100', such as Fig. 9 shown.

[0107] The details are as follows: First, a pixel region is defined on the first surface of the semiconductor substrate 100', and various components in the pixel unit 110 are manufactured in the pixel region by using processes such as doping and deposition. Fig. 9 Subsequently, a deposition process is used to form a circuit connection layer 200 on the first surface of the semiconductor substrate 100 ', such as Fig. 9 shown.

[0108] Step S2, after thinning the second surface of the semiconductor substrate 100', a FBDTI structure (back through isolation structure) 120c is formed on the second surface of the semiconductor substrate, and an optical structure layer 300 is formed on the second surface of the semiconductor substrate 100', wherein the depth of the FBDTI structure 120c is the same as the thickness of the semiconductor substrate 100' to form a first isolation structure 120, such as Figures 10 to 12 shown.

[0109] The details are as follows: First, the structure obtained in step S1 is turned over and the second surface of the semiconductor substrate 100' is polished and thinned to a preset thickness, such as Fig.10 Subsequently, a BDTI process is used to fabricate a FBDTI structure 120c on the second surface of the semiconductor substrate 100', such as etching the second surface of the semiconductor substrate 100' to form a deep trench and then filling the trench to form a FBDTI structure 120c, such as Fig.11 Finally, the optical structure layer 300 is manufactured on the second surface of the semiconductor substrate 100' by using relevant processes, such as Fig.12 shown.

[0110] Combination Figure 5 , Figure 8 and Fig.12 This embodiment also provides an imaging method of the above-mentioned image sensor 10, including each pixel unit 110 obtaining image information based on photoelectric conversion; wherein, during the photoelectric conversion process, each pixel unit 110 isolates the charge crosstalk between adjacent pixel units 110 through a first isolation structure 120.

[0111] The circuit structure of the pixel unit 110 involved in the imaging method of this embodiment is as described above. Figures 14a to 19a As shown; wherein, the pixel unit 110 includes a photosensitive module and an overflow module, the photosensitive module includes a photosensitive element, and the overflow module includes an overflow capacitor.

[0112] When the pixel unit 110 has only one conversion gain, that is, the pixel unit 110 does not include a gain transistor, the method for obtaining image information includes: first performing correlated double sampling on the charge signal corresponding to the photosensitive element PD in the pixel unit 110 (that is, the potential well charge signal, corresponding to the first charge signal), and then performing non-true correlated double sampling on the charge signal corresponding to the overflow capacitor C in the pixel unit 110 (that is, the overflow charge signal, corresponding to the second charge signal).

[0113] by Fig.14a Take the circuit structure shown as an example, Fig.14b As shown, the process of the pixel unit 110 obtaining image information includes a reset phase, an exposure phase and a readout phase.

[0114] In the reset stage, the photosensitive element PD, the overflow capacitor C and the floating diffusion node FD are reset. For example, the photosensitive element PD, the overflow capacitor C and the floating diffusion node FD are reset through the reset transistor M3.

[0115] The details are as follows: turn on the transfer transistor M1, the overflow transistor M2 and the reset transistor M3 to reset the photosensitive element PD, the overflow capacitor C and the floating diffusion node FD; then, turn off the transfer transistor M1 and the reset transistor M3.

[0116] During the exposure stage, the overflow transistor M2 is turned on, the potential well charge signal is stored based on the photosensitive element PD, and the overflow charge signal is stored based on the floating diffusion node FD and the overflow capacitor C. It should be noted that the off state of the transfer transistor M1 can be controlled (such as closed to a subthreshold state) so that the overflow charge during the exposure process overflows to the overflow capacitor C through the transfer transistor M1.

[0117] Since the overflow transistor M2 is not turned off after the reset operation is completed, that is, the overflow transistor M2 is turned on before the exposure phase begins after the reset phase ends, there is no need to perform additional opening control on the overflow transistor M2 during the exposure phase.

[0118] In the readout phase, the overflow transistor M2 is turned off to perform correlated double sampling on the potential well charge signal. After that, the overflow transistor M2 is turned on to perform non-true correlated double sampling on the overflow charge signal.

[0119] The details are as follows: turn off the overflow transistor M2, turn on the row selection transistor M5, and read out the reset signal (LCG Rst1) corresponding to the potential well charge signal in a quantitative manner. Then, turn on the transfer transistor M1 for a period of time and then turn it off, transfer the potential well charge signal in the photosensitive element PD to the floating diffusion node FD for quantitative reading (LCG Sig1), and complete the correlated double sampling of the potential well charge signal.

[0120] The overflow transistor M2 is turned on, and the transfer transistor M1 is turned on for a period of time and then turned off, and the overflow charge signal (Lofic Sig2) in the floating diffusion node FD and the overflow capacitor C is quantized and read out. After that, the reset transistor M3 is turned on to reset the floating diffusion node FD and the overflow capacitor C, and then the reset transistor M3 is turned off, and the reset signal (Lofic Rst2) corresponding to the overflow charge signal is quantized and read out, completing the non-true correlated double sampling of the overflow charge signal.

[0121] It should be noted that Fig.19a The image information acquisition process corresponding to the circuit structure shown is the same as above, such as Fig.19b As shown, no further description is given here.

[0122] When the pixel unit 110 has different conversion gains, that is, when the pixel unit 110 includes at least one gain transistor, the method for obtaining image information includes: first performing correlated double sampling on the charge signal corresponding to the photosensitive element PD in the pixel unit 110 (that is, the potential well charge signal, corresponding to the first charge signal) at different conversion gains, and then performing non-true correlated double sampling on the charge signal corresponding to the overflow capacitor C in the pixel unit 110 (that is, the overflow charge signal, corresponding to the second charge signal).

[0123] by Fig.16a Take the circuit structure shown as an example, Fig.16b and Fig.16c As shown, the process of the pixel unit 110 obtaining image information includes a reset phase, an exposure phase and a readout phase; wherein, the existence of the gain transistor M6 enables the pixel unit 110 to have a gain node LCG, and different conversion gains are switched by turning on and off the gain transistor M6, such as switching between high and low conversion gains.

[0124] In the reset stage, the photosensitive element PD, the overflow capacitor C, the floating diffusion node FD and the gain node LCG are reset. For example, the photosensitive element PD, the overflow capacitor C, the floating diffusion node FD and the gain node LCG are reset through the reset transistor M3.

[0125] The details are as follows: turn on the transfer transistor M1, the overflow transistor M2, the reset transistor M3 and the gain transistor M6 to reset the photosensitive element PD, the overflow capacitor C, the floating diffusion node FD and the gain node LCG; then, turn off the transfer transistor M1 and the reset transistor M3.

[0126] During the exposure phase, the overflow transistor M2 and the gain transistor M6 are turned on, the potential well charge signal is stored based on the photosensitive element PD, and the overflow charge signal is stored based on the floating diffusion node FD, the gain node LCG and the overflow capacitor C.

[0127] Since the overflow transistor M2 and the gain transistor M6 are not turned off after the reset operation is completed, that is, the overflow transistor M2 and the gain transistor M6 are turned on before the exposure stage starts after the reset stage, there is no need to perform additional opening control on the overflow transistor M2 and the gain transistor M6 during the exposure stage.

[0128] In the readout phase, the overflow transistor M2 is turned off, and the potential well charge signal is correlated double sampled at different conversion gains by controlling the opening and closing of the gain transistor M6. After that, the overflow transistor M2 is turned on to perform non-true correlated double sampling on the overflow charge signal.

[0129] Specifically, the overflow transistor M2 is turned off, and the row selection transistor M5 is turned on. Since the gain transistor M6 is turned on, the pixel unit 110 is in a low conversion gain, and the reset signal corresponding to the potential well charge signal is quantized and read out at the low conversion gain (LCG Rst1); then, the gain transistor M6 is turned off, and the pixel unit 110 switches from the low conversion gain to the high conversion gain, and the reset signal corresponding to the potential well charge signal is quantized and read out at the high conversion gain (HCG Rst2);

[0130] Subsequently, the transfer transistor M1 is turned on for a period of time and then turned off, and the potential well charge signal in the photosensitive element PD is transferred to the floating diffusion node FD for quantized readout under high conversion gain (HCG Sig2); finally, the gain transistor M6 is turned on, and the pixel unit 110 is switched to a low conversion gain again, and the transfer transistor M1 is turned on for a period of time and then turned off, and the potential well charge signal is transferred to the floating diffusion node FD and the gain node LCG for quantized readout under low conversion gain (LCG Sig1), thus completing the correlated double sampling of the potential well charge signal under different conversion gains;

[0131] The overflow transistor M2 is turned on, and the transfer transistor M1 is turned on for a period of time and then turned off, and the overflow charge signal in the floating diffusion node FD, the gain node LCG and the overflow capacitor C is quantized and read out (Lofic Sig3). After that, the reset transistor M3 is turned on to reset the floating diffusion node FD, the gain node LCG and the overflow capacitor C, and then the reset transistor M3 is turned off, and the reset signal corresponding to the overflow charge signal is quantized and read out (Lofic Rst3), completing the non-true correlated double sampling of the overflow charge signal.

[0132] It should be noted that Fig.17a The image information acquisition process corresponding to the circuit structure shown is the same as above, such as Fig.17b As shown, no further description is given here; in addition, Fig.18a The image information acquisition process corresponding to the circuit structure shown is similar to the above, such as Fig.18b As shown, no further description is given here.

[0133] Embodiment 2

[0134] like Figure 20 to Figure 24 As shown, this embodiment provides an image sensor 10 , which is different from the first embodiment in that the isolation enhancement structure 400 is used to enhance the isolation effect of the first isolation structure 120 .

[0135] As an example, Fig. 20 As shown, the isolation enhancement structure 400 includes a first transmission part 410, which is located in the circuit connection layer 200; wherein the first transmission part 410 is electrically connected to the first isolation structure 120 to transmit a voltage signal, such as the first transmission part 410 is electrically connected based on the conductive layer 122 in the first isolation structure 120. In this example, a negative voltage is applied to the first isolation structure 120 through the first transmission part 410, so that positive electricity is induced on both sides of the first isolation structure 120, and the induced positive electricity is used to absorb the overflowing charge of the photosensitive element PD, thereby enhancing the isolation effect.

[0136] Different from Fig. 20 , the first transmission unit 410 has different connection relationships; such as Fig.21 As shown, the first transmission part 410 is electrically connected to the semiconductor substrate 100' of the first region in the semiconductor structure layer 100 to transmit a voltage signal, wherein the first region includes the region between the corresponding photosensitive element PD in the corresponding pixel unit 110 and the first isolation structure 120. In this example, the semiconductor substrate 100' is a P-type substrate, and a positive voltage is applied to the semiconductor substrate 100' by the first transmission part 410 to attract the overflowing charge of the photosensitive element PD and directly lead it out, thereby enhancing the isolation effect.

[0137] In other examples, the isolation enhancement structure 400 may be implemented in different ways, and other ways that can enhance the isolation effect of the first isolation structure 120 should also be applicable to this embodiment.

[0138] In another example, if Fig. 22 As shown, the isolation enhancement structure 400 includes a first doping portion 420 and a second transmission portion 430, wherein the first doping portion 420 is located in the semiconductor substrate 100' of the first region of the semiconductor structure layer 100, and the second transmission portion 430 is located in the circuit connection layer 200 and is electrically connected to the first doping portion 420 to transmit a voltage signal. In this example, the semiconductor substrate 100' is a P-type substrate, and the first doping portion 420 is an N-type doping. A positive voltage is applied to the first doping portion 420 by the second transmission portion 430 to attract the overflowing charge of the photosensitive element PD and directly lead it out, thereby enhancing the isolation effect.

[0139] In another example, Fig.23 As shown, the isolation enhancement structure 400 includes a first gate portion 440 and a third transmission portion 450; in an optional example, the first gate portion 440 is located on the first surface of the semiconductor structure layer 100 and its projection on the surface of the semiconductor substrate is adjacent to the projection of the corresponding photosensitive element PD on the surface of the semiconductor substrate in the first area; in other optional examples, the first gate portion 440 is located on the first surface of the semiconductor structure layer 100 and bridges the corresponding photosensitive element PD in the corresponding pixel unit 110 and the semiconductor substrate 100' in the first area; the third transmission portion 450 is located in the circuit connection layer 200 and is electrically connected to the first gate portion 440 to transmit a voltage signal; wherein the first area includes the area between the corresponding photosensitive element PD in the corresponding pixel unit 110 and the first isolation structure 120. In one implementation, the first gate portion 440 can be the same as the gate structure of other transistors in the pixel unit and prepared based on the same process; at this time, the first gate portion 440 includes, in addition to the gate layer of polysilicon material, a gate oxide layer located on the surface of polysilicon and the semiconductor substrate, and the gate oxide layer includes but is not limited to a silicon oxide layer. In this example, the first gate portion 440 and the P-type semiconductor substrate 100' form a MOS capacitor. A negative voltage is applied to the MOS capacitor through the third transmission portion 450, and positive electricity is induced at the corresponding electrode plate of the MOS capacitor. The induced positive electricity is used to absorb the overflow charge of the photosensitive element PD, thereby enhancing the isolation effect.

[0140] In yet another example, Fig.24As shown, the isolation enhancement structure 400 includes a second doping portion 460, a second gate portion 470 and a fourth transmission portion 480, the second doping portion 460 is located in the semiconductor substrate 100' of the first region of the semiconductor structure layer 100, the second gate portion 470 is located on the first surface of the semiconductor structure layer 100 and electrically connects the second doping portion 460 and the corresponding photosensitive element of the corresponding pixel unit, and the fourth transmission portion 480 is located in the circuit connection layer 200 and electrically connects the second doping portion 460 and the floating diffusion node FD of the corresponding pixel unit 110; wherein the fourth transmission portion 480 is also used as a light blocking layer. In one implementation, the second gate portion 470 can be the same as the gate structure of other transistors of the pixel unit and prepared based on the same process. In this example, the second gate portion 470, the N-type doped second doped portion 460 and the photosensitive element PD form a MOS transistor-like structure, which is equivalent to electrically connecting the MOS transistor-like structure to the floating diffusion node FD through the fourth transmission portion 480 to expand the capacity of the floating diffusion node FD, thereby absorbing more overflow charges of the photosensitive element PD and enhancing the isolation effect; in addition, the fourth transmission portion 480 can also serve as a light-blocking layer to prevent light signals from exceeding the photosensitive area and causing waste and crosstalk.

[0141] It should be noted that, for the voltage applied by the isolation enhancement structure 400 in this embodiment, a suitable voltage value can be provided according to the device design in the actual pixel unit so as not to affect the normal process of the pixel unit, and the isolation effect can be enhanced based on the enhanced isolation structure 400 to prevent the over-exposed overflow charge from leaking to the adjacent pixel unit and causing crosstalk.

[0142] Correspondingly, the manufacturing method of the image sensor 10 of this embodiment also includes the step of manufacturing the isolation enhancement structure 400; wherein, when the isolation enhancement structure 400 includes a corresponding doping portion, the corresponding doping portion is manufactured synchronously with the pixel unit 110; when the isolation enhancement structure 400 includes a corresponding gate portion, the corresponding gate portion is manufactured synchronously with the transistor gate of the pixel unit 110; when the isolation enhancement structure 400 includes a corresponding transmission portion, the corresponding transmission portion is manufactured synchronously with the circuit connection layer 200.

[0143] Correspondingly, the imaging method of the image sensor 10 in this embodiment further includes enhancing the isolation effect of the first isolation structure 120 by using the isolation enhancement structure 400 .

[0144] Embodiment 3

[0145] like Fig.25As shown, this embodiment provides an image sensor 10, which differs from the first embodiment in that the second isolation structure 130 is used to connect pixels. Based on the design of the overflow channel 131, the pixel sub-units of the same pixel unit can interact with each other. For example, when the photosensitive element signal of a pixel sub-unit is full, the photogenerated electrons can flow to other connected pixel sub-units through the overflow channel, so that when multiple pixel sub-units with the overflow channel perform signal merging, the linearity of the merged signal can be improved. Of course, the electron movement interaction can also be achieved at the potential position where the interaction is required by controlling the overflow channel and the surrounding potential. The position of the overflow channel and the number of connected pixel sub-units can be designed according to actual needs. The process of preparing the first isolation structure on both sides of the utility model can be beneficial to the preparation of the overflow channel inside the pixel unit, simplify the process, and improve the imaging quality.

[0146] In the image sensor 10 of the present embodiment, the pixel unit 110 includes a plurality of pixel sub-units 110', and a second isolation structure 130 is provided between adjacent pixel sub-units 110' in each pixel sub-unit 110', wherein in the thickness direction of the semiconductor structure layer 100, the second isolation structure 130 is a non-continuous structure and is divided into at least two parts by an overflow channel 131; through the design of the overflow channel 131, each pixel sub-unit 110' in the same pixel unit 110 can achieve pixel connectivity.

[0147] In actual applications, the second isolation structure 130 has the same structure as the first isolation structure 120 . The relevant content can be found in Example 1 and will not be repeated here. In one implementation, the second isolation structure 130 is manufactured based on the STI process combined with the BDTI process, including a second STI structure 132 and a second BDTI structure 133 , which are separated by an overflow channel 131 .

[0148] Furthermore, the image sensor 10 of this embodiment further includes an isolation enhancement structure 400 for enhancing the isolation effect of the first isolation structure 120. The relevant contents of the isolation enhancement structure 400 can be found in the second embodiment, and will not be described in detail here.

[0149] It should be noted that, for the structures of the image sensors described in the first to third embodiments, when the isolation enhancement structure 400 is present, the isolation enhancement structure 400 may be disposed at a corner of the pixel unit 110. Fig.26 and Fig. 27 As shown, it is a schematic diagram of a pixel array composed of a pixel unit having four pixel sub-units, and the isolation enhancement structure 400 is arranged at the corner of the pixel unit 100, such as Fig.26 As shown, it can correspond to Fig. 20The arrangement of the enhanced isolation structure in the first transmission part 410 is directly realized in the area where the electrical connection is set Fig.26 The line-heightened areas shown are Fig. 27 As shown, it can correspond to Fig.21 and Fig. 22 The arrangement of the enhanced isolation structure in the embodiment of the present invention directly realizes the electrical connection of the corresponding transmission part in the area set at Fig. 27 Fill area shown.

[0150] Accordingly, the manufacturing method of the image sensor 10 of this embodiment also includes the step of manufacturing a second isolation structure 130; wherein, the method of manufacturing the second isolation structure 130 includes: manufacturing a second STI structure 132 on the first surface of the semiconductor substrate 100', and manufacturing a second BDTI structure 133 on the second surface of the semiconductor substrate 100', wherein the second BDTI structure 133 is separated from the second STI structure 132 by an overflow channel 131.

[0151] In actual applications, if the manufacturing method includes the step of manufacturing the second isolation structure 130, in order to simplify the process steps, the first isolation structure 120 is usually also manufactured based on the STI process combined with the BDTI process. At this time, the second isolation structure 130 is manufactured synchronously with the first isolation structure 120. The width of the corresponding groove in the second isolation structure 130 can be controlled to be greater than the width of the corresponding groove in the first isolation structure 120, so that the second isolation structure 130 is a discontinuous structure and the first isolation structure 120 is a continuous structure in the thickness direction.

[0152] Furthermore, the manufacturing method of this embodiment may also include the step of manufacturing an isolation enhancement structure 400; wherein, when the isolation enhancement structure 400 includes a corresponding doping portion, the corresponding doping portion is manufactured synchronously with the doping region of the transistor element in the pixel unit 110; when the isolation enhancement structure 400 includes a corresponding gate portion, the corresponding gate portion is manufactured synchronously with the transistor gate in the pixel unit 110; when the isolation enhancement structure 400 includes a corresponding transmission portion, the corresponding transmission portion is manufactured synchronously with the circuit connection layer 200.

[0153] Accordingly, in the imaging method of the image sensor 10 of this embodiment, during the photoelectric conversion process, each pixel sub-unit 110 ′ in the same pixel unit 110 is connected to each other through the overflow channel 131 on the second isolation structure 130 .

[0154] Furthermore, the imaging method of this embodiment may further include enhancing the isolation effect of the first isolation structure 120 by using the isolation enhancement structure 400 .

[0155] In summary, the image sensor of the utility model isolates the charge crosstalk between the photosensitive elements in the adjacent pixel units through the first isolation structure, and improves the isolation effect of the first isolation structure through the isolation enhancement structure, thereby avoiding the influence of the charge crosstalk on the image color and picture clarity, improving the image color and image effect, and enhancing the imaging quality of the image sensor. Therefore, the utility model effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0156] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. An image sensor, characterized in that: The image sensor comprises: Semiconductor structure layer, circuit connection layer and optical structure layer; The semiconductor structure layer includes a plurality of pixel units, and a first isolation structure is provided between adjacent pixel units, wherein the first isolation structure penetrates the semiconductor structure layer in the thickness direction of the semiconductor structure layer; The pixel unit includes a photosensitive module and an overflow module; the photosensitive module is used to convert a light signal into a charge signal, wherein the charge signal includes a first charge signal and a second charge signal; the overflow module is used to store at least the second charge signal, wherein at least the overflow module between adjacent pixel units is isolated based on the first isolation structure; The circuit connection layer is located on the first surface of the semiconductor structure layer; The optical structure layer is located on the second surface of the semiconductor structure layer, and includes a plurality of color filter units, each of which corresponds to each of the pixel units.

2. The image sensor according to claim 1, characterized in that The pixel unit includes a plurality of pixel sub-units, and a second isolation structure is provided between adjacent pixel sub-units, wherein in the thickness direction of the semiconductor structure layer, the second isolation structure is a discontinuous structure and is divided into at least two parts by an overflow channel.

3. The image sensor according to claim 1 or 2, characterized in that: The image sensor also includes an isolation enhancement structure for enhancing the isolation effect of the first isolation structure; and / or the first isolation structure includes an insulating layer, or the first isolation structure also includes a conductive layer and the insulating layer is located on the outside of the conductive layer; and / or the first isolation structure includes at least one of a combined structure consisting of a first STI structure and a first BDTI structure, an FDTI structure, and an FBDTI structure.

4. The image sensor according to claim 2, characterized in that: The second isolation structure includes a combined structure of a second STI structure and a second BDTI structure.

5. The image sensor according to claim 3, characterized in that: The isolation enhancement structure includes a first transmission part, which is located in the circuit connection layer; wherein the first transmission part is electrically connected to the first isolation structure to transmit a voltage signal, the first isolation structure includes an insulating layer and a conductive layer and the insulating layer is located on the outside of the conductive layer; or, the first transmission part is electrically connected to the semiconductor substrate of a first area in the semiconductor structure layer to transmit a voltage signal, and the first area includes an area between a corresponding photosensitive element in a corresponding pixel unit and the first isolation structure.

6. The image sensor according to claim 3, characterized in that: The isolation enhancement structure includes a first doped portion and a second transmission portion, the first doped portion is located in the semiconductor substrate of the first area of ​​the semiconductor structure layer, and the second transmission portion is located in the circuit connection layer and is electrically connected to the first doped portion to transmit a voltage signal; or, the isolation enhancement structure includes a first gate portion and a third transmission portion, the first gate portion is located on the first surface of the semiconductor structure layer and its projection on the surface of the semiconductor substrate is adjacent to the projection of the corresponding photosensitive element on the surface of the semiconductor substrate in the first area, or the first gate portion is located on the first surface of the semiconductor structure layer and bridges the corresponding photosensitive element in the corresponding pixel unit and the semiconductor substrate in the first area, and the third transmission portion is located in the circuit connection layer and is electrically connected to the first gate portion to transmit a voltage signal; wherein, the first area includes the area between the corresponding photosensitive element in the corresponding pixel unit and the first isolation structure.

7. The image sensor according to claim 3, characterized in that: The isolation enhancement structure includes a second doped portion, a second gate portion and a fourth transmission portion, the second doped portion is located in the semiconductor substrate of the first area of ​​the semiconductor structure layer, the second gate portion is located on the first surface of the semiconductor structure layer and is electrically connected to the second doped portion and the corresponding photosensitive element of the corresponding pixel unit, the fourth transmission portion is located in the circuit connection layer and is electrically connected to the second doped portion and the floating diffusion node of the corresponding pixel unit; wherein the fourth transmission portion is also used as a light blocking layer.

8. The image sensor according to claim 1, characterized in that: The photosensitive module includes a photosensitive element and a transmission transistor, the overflow module includes an overflow transistor and an overflow capacitor, and the pixel unit also includes a reset transistor, a source follower transistor and a row selection transistor, wherein: The control end of the transmission transistor is connected to the transmission control signal, the first end is connected to the floating diffusion node, and the second end is connected to the first potential via the photosensitive element; the control end of the overflow transistor is connected to the overflow control signal, the first end is connected to the floating diffusion node, and the second end is connected to the second potential via the overflow capacitor; the control end of the reset transistor is connected to the reset control signal, the first end is connected to the third potential, and the second end is connected to the floating diffusion node; the control end of the source follower transistor is connected to the floating diffusion node, the first end is connected to the fourth potential, and the second end is connected to the first end of the row selection transistor; the control end of the row selection transistor is connected to the row selection signal, and the second end is connected to the column line; Alternatively, the pixel unit further includes at least one gain transistor; when the number of the gain transistors is one, the control end of the gain transistor is connected to a gain control signal, the first end is connected to the first end of the overflow transistor and the second end of the reset transistor or is only connected to the second end of the reset transistor, and the second end is connected to a floating diffusion node; when the number of the gain transistors is greater than one, the gain transistors are connected in series and the first end of the series structure is connected to the first end of the overflow transistor and the second end of the reset transistor or is only connected to the second end of the reset transistor, and the second end is connected to a floating diffusion node, wherein the control end of each gain transistor is connected to a corresponding gain control signal.

9. The image sensor according to claim 1, characterized in that: The photosensitive module includes a photosensitive element and a transfer transistor, the overflow module includes an overflow transistor and an overflow capacitor, and the pixel unit also includes a reset transistor, a source follower transistor and a row selection transistor; the control end of the transfer transistor is connected to a transmission control signal, the first end is connected to a floating diffusion node, and the second end is connected to a first potential via the photosensitive element; the control end of the overflow transistor is connected to an overflow control signal, the first end is connected to a floating diffusion node, the second end is connected to the second end of the reset transistor and connected to a second potential via the overflow capacitor; the control end of the reset transistor is connected to a reset control signal, and the first end is connected to a third potential; the control end of the source follower transistor is connected to a floating diffusion node, the first end is connected to a fourth potential, and the second end is connected to the first end of the row selection transistor; the control end of the row selection transistor is connected to a row selection signal, and the second end is connected to a column line.

Images