Impulse current suppression circuit

Abstract

The utility model provides an impact current suppression circuit, which comprises a switch tube Q1, a switch control circuit, a voltage sampling circuit and a micro-control unit, and is characterized in that an input end power supply VIN is connected with a node A; a first connecting end of the switching tube Q1 is connected with a node A, a second connecting end of the switching tube Q1 is connected with an output end power supply VOUT, and a control end of the switching tube Q1 is connected with a node D; the voltage sampling circuit is used for collecting the voltage of the node A and outputting a sampling voltage based on the voltage of the node A; the micro-control unit outputs a control signal Control based on the sampling voltage, and the switch control circuit controls the switch-on or switch-off of the switch tube Q1 based on the control signal Control. The impact current suppression circuit is better in overall thermal performance, higher in efficiency and lower in cost.

Description

[Technical field]

[0001] The utility model relates to the technical field of circuit design, in particular to a circuit for suppressing impact current generated when a power source is powered on. [Background technology]

[0002] Due to the existence of capacitors in the circuit, at the moment of power-on, the capacitors are equivalent to a short circuit, so the capacitors will be charged first. At this time, the transient current (i.e., impact current) will be very large. On the one hand, it will affect the fuse at the input power supply end, and the large current may cause the fuse to blow; on the other hand, the large impact current will also have a great impact on the components in the power supply circuit, and there is a possibility of burning out the components.

[0003] The current plans are as follows Figure 1 , which is a circuit diagram of a power-on instantaneous surge current suppression circuit in the prior art. It delays the rise of the Vgs voltage of the field effect tube through a capacitor, thereby suppressing the rise of the load voltage. At the same time, the amplification time of the field effect tube is extended, and the impedance of the amplification area is large, which will limit the current, thereby achieving the effect of suppressing the surge current. Please refer to Figure 2 As shown, it is a circuit diagram of another power-on instantaneous surge current suppression circuit in the prior art. Figure 2 for Figure 1 The purpose of updating the scheme shown is to prevent the power consumption of the field effect tube from being too large, thereby causing serious heating.

[0004] Figure 1 and Figure 2 Problems and disadvantages of the prior art solutions shown:

[0005] 1. The existing technical solution is to suppress the impact current by controlling the rising rate of the Vgs voltage of the field effect tube, which will cause the field effect tube to consume a large amount of power and generate severe heat, and may even burn out the field effect tube.

[0006] 2. The circuit of the prior art solution uses multiple transistors and field effect transistors, which will lead to a decrease in the efficiency of the entire circuit, thereby increasing the standby power consumption and the circuit cost.

[0007] Therefore, it is necessary to propose a new technical solution to solve the above problems. [Contents of the utility model]

[0008] One of the purposes of the utility model is to provide a circuit for suppressing the inrush current generated by power-on, which will not cause large power consumption of power components, thus preventing serious heating or even burning of components, thereby improving the overall thermal performance. In addition, the utility model does not require multiple external control components, which will improve the overall efficiency of the circuit and make the cost more favorable.

[0009] According to one aspect of the utility model, the utility model provides an impact current suppression circuit, which includes a switch tube Q1, a switch control circuit, a voltage sampling circuit and a micro control unit, wherein the input power supply VIN is connected to the node A; the first connection end of the switch tube Q1 is connected to the node A, the second connection end is connected to the output power supply VOUT, and the control end is connected to the node D; the voltage sampling circuit is used to collect the voltage of the node A and output a sampled voltage based on the voltage of the node A; the micro control unit outputs a control signal Control based on the sampled voltage, and the switch control circuit controls the conduction or shutdown of the switch tube Q1 based on the control signal Control.

[0010] Compared with the prior art, the utility model does not have power components that generate large power consumption, so there will be no serious heating or even burning of components, so the overall thermal performance will be better. In addition, the utility model does not require multiple external control components, the overall efficiency of the circuit will be improved, and the cost will be better.

Brief Description of the Drawings

[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following briefly introduces the drawings required for the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor. Among them:

[0012] Figure 1 A schematic diagram of a circuit for suppressing instantaneous surge current during power-on in the prior art;

[0013] Figure 2 It is a circuit diagram of another power-on instantaneous surge current suppression circuit in the prior art;

[0014] Figure 3 The present invention is a schematic circuit diagram of a circuit for suppressing an inrush current generated when a power source is powered on in one embodiment of the present invention. [Specific implementation method]

[0015] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0016] The "one embodiment" or "embodiment" referred to herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the utility model. The "in one embodiment" that appears in different places in this specification does not all refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments. Unless otherwise specified, the words "coupled", "connected", "connected" and "connected" in this document that indicate electrical connection all mean direct or indirect connection. For example, A is connected to B, which includes both direct electrical connection between A and B and connection between A and B through electrical components or circuits.

[0017] In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "back", "front", "back", "left", "right", "vertical", "perpendicular", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0018] Please refer to Figure 3 As shown, it is a circuit diagram of a circuit for suppressing an inrush current generated when a power supply is powered on in one embodiment of the utility model. Figure 3 The circuit for suppressing the surge current generated when the power source is powered on as shown includes a switch tube Q1 , a switch control circuit 330 , a voltage sampling circuit 310 and a micro control unit 320 .

[0019] The input power supply VIN is connected to the node A; the first connection end of the switch tube Q1 is connected to the node A, the second connection end thereof is connected to the output power supply VOUT, and the control end thereof is connected to the node D. The voltage sampling circuit 310 is used to collect the voltage of the node A, and output a sampled voltage based on the voltage of the node A. The micro control unit 320 outputs a control signal Control based on the sampled voltage, and the switch control circuit 330 controls the on or off of the switch tube Q1 based on the control signal Control.

[0020] The switch control circuit 330 includes a switch tube Q2, a resistor R2, a resistor R6, a resistor R4, and a resistor R5. One end of the resistor R2 is connected to the node A, and the other end thereof is connected to the node D. The first connection end of the switch tube Q2 is connected to the node D, and the second connection end thereof is grounded via the resistor R6, and the control end thereof is connected to the node C; one end of the resistor R5 is connected to the node C, and the other end thereof is grounded; the input end of the voltage sampling circuit 310 is connected to the node A, and the output end thereof is connected to the input end of the micro control unit 320, and the output end of the micro control unit 320 is connected to the node C via the resistor R4. The input end of the voltage sampling circuit 310 is connected to the node A, and the output end thereof is connected to the input end of the micro control unit, and the output end of the micro control unit is connected to the node C via the resistor R4; the micro control unit 320 outputs a control signal Control based on the sampled voltage to control the conduction or shutoff of the switch tube Q2, thereby controlling the conduction or shutoff of the switch tube Q1. Among them, the output power supply VOUT supplies power to the subsequent circuit.

[0021] exist Figure 3 In the specific embodiment shown, the microcontroller unit 320 is an MCU (Microcontroller Unit) in U1, and its input end is an ADC (analog-to-digital converter) pin.

[0022] exist Figure 3 In the specific embodiment shown, the switch tube Q1 is a PMOS transistor, and the first connection terminal, the second connection terminal and the control terminal of the switch tube Q1 are respectively the source (S pole), the drain (D pole) and the gate (G pole) of the PMOS transistor. Therefore, the switch tube Q1 can also be called a MOS tube. The switch tube Q2 is an NPN type triode, and the first connection terminal, the second connection terminal and the control terminal of the switch tube Q2 are respectively the collector, the emitter and the base of the NPN type triode.

[0023] exist Figure 3 In the specific embodiment shown, the voltage sampling circuit 310 includes a resistor R1 and a resistor R3, one end of the resistor R1 is connected to the node A, and the other end thereof is connected to the node B; one end of the resistor R3 is connected to the node B, and the other end thereof is grounded; the node B is the output end of the voltage sampling circuit 310, and the voltage on the node B is the sampling voltage. In addition, the voltage sampling circuit 310 also includes a capacitor C4, one end of the capacitor C4 is connected to the node B, and the other end thereof is grounded.

[0024] Figure 3 The surge current suppression circuit generated by power-on of the power supply shown in the figure also includes a reverse protection diode D1, the positive electrode of the reverse protection diode D1 is connected to the input power supply VIN, and the negative electrode thereof is connected to the node A. When the input power supply VIN and the output power supply VOUT are reversely connected, the reverse protection function is played.

[0025] Figure 3 The surge current suppression circuit generated when the power supply is powered on as shown also includes a voltage stabilizing diode D2, the cathode of the voltage stabilizing diode D2 is connected to the node A, and the anode of the voltage stabilizing diode D2 is connected to the node D. The voltage stabilizing diode D2 plays a role in protecting the MOS tube (or field effect tube) Q1, preventing the voltage between the gate and the source of the MOS tube Q1 from exceeding the rated voltage value (or exceeding the gate and source withstand voltage value of the MOS tube). Specifically, the MOS tube (or field effect tube) Q1 will not be burned out because the voltage between the node A and the node D is too high when the power supply generates a pulse, exceeding the withstand voltage value between the source and the gate of the MOS tube (or field effect tube) Q1. It can also be said that the operating voltage value of the voltage stabilizing diode D2 is greater than the turn-on voltage value of the switch tube Q1 and less than the maximum rated voltage value between the gate and the source of the switch tube Q1, wherein the turn-on voltage value of the switch tube Q1 is less than the maximum rated voltage value between the gate and the source of the switch tube Q1.

[0026] It should be noted that the surge current generated by the power supply is related to the voltage value set when the power is turned on. At the moment of power-on, the capacitors in the circuit (for example, Figure 3 The capacitors C1, C2 and C3 shown in the figure are equivalent to a short-circuit state, so the higher the voltage value set when power is turned on, the greater the impact current.

[0027] exist Figure 3 In the shown inrush current suppression circuit generated by power-on, when the power is powered on, if the microcontroller unit 320 detects that the voltage of the input power supply VIN is greater than the start-up voltage of the rush current suppression circuit based on the sampling voltage output by the voltage sampling circuit 310, the control signal Control output by the microcontroller unit 320 controls the switch tube Q2 to be intermittently turned on (i.e., periodically alternately turned on and off), and then controls the switch tube Q1 to be intermittently turned on (i.e., periodically alternately turned on and off). If the switch tube Q1 is not controlled to be intermittently turned on, the input power supply VIN will continue to supply the back-end capacitor (for example, Figure 3 The capacitors C1, C2 and C3 shown in the figure are charged, which will cause a large impact current when power is turned on. Therefore, it is necessary to control the switch tube Q2 to be continuously turned on, thereby controlling the switch tube Q1 to be continuously turned on. Figure 3 The surge current suppression circuit shown in the figure can make the input power VIN pass through the anti-reverse diode D1 and the switch tube Q1 to the back-end capacitor (for example, Figure 3 The capacitors C1, C2 and C3 shown in the figure are charged, thereby suppressing the sudden increase of the inrush current. Among them, the start-up voltage of the inrush current suppression circuit can be set according to the demand, and the start-up voltage value needs to be less than the power supply voltage value set at power-on. In the specific implementation scheme of the utility model, it is described as 5V.

[0028] When the micro control unit 320 detects that the voltage of the input power supply VIN is stable based on the sampling voltage output by the voltage sampling circuit 310, the control signal Control output by the micro control unit 320 controls the switch tube Q2 to be continuously turned on, thereby making the switch tube Q1 continuously turned on, and then making the input power supply VIN continuously supply power to the output power supply VOUT through the anti-reverse diode D1 and the switch tube Q1.

[0029] exist Figure 3 In the surge current suppression circuit generated by power-on shown in the figure, when the control signal Control is at a high level, the switch tubes Q1 and Q2 are turned on; when the control signal Control is at a low level, the switch tubes Q1 and Q2 are turned off. Correspondingly, the resistance values ​​of the resistors R4 and R5 are selected to satisfy: when the control signal Control is at a high level, the voltage value of the node C is greater than the turn-on voltage value of the switch tube Q2, so that the switch tube Q2 is in the on state. The resistance values ​​of the resistors R2 and R6 are selected to satisfy: when the control signal Control is at a high level (that is, when the switch tube Q2 is in the on state), the voltage difference between the node A and the node D is greater than the turn-on voltage value of the switch tube Q1, so that the switch tube Q1 is in the on state.

[0030] The following is a detailed introduction Figure 3 The working principle of the surge current suppression circuit generated when the power supply is powered on is shown in FIG.

[0031] Among them, when the power supply is powered on, if the micro control unit 320 detects that the voltage of the input power supply VIN is greater than the start-up voltage of the surge current suppression circuit based on the sampling voltage output by the voltage sampling circuit 310, the control signal Control output by the micro control unit 320 is a PWM (Pulse-Width Modulation) signal; when the micro control unit 320 detects that the voltage of the input power supply VIN is stable based on the sampling voltage output by the voltage sampling circuit 310, the control signal Control output by the micro control unit 320 is a high level.

[0032] More specifically, when the power supply is powered on, if the microcontroller unit 320 detects that the voltage of the input power supply VIN is greater than 5V (which is the start-up voltage of the surge current suppression circuit) based on the sampling voltage output by the voltage sampling circuit 310, the microcontroller unit 320 outputs a PWM signal with a period of 10us (the period of the PWM signal can be set according to actual design requirements, and this solution is described as 10us), that is, the control signal Control is a high and low level with a period of 10us. When the PWM signal (i.e., the control signal Control) is at a high level, the voltage value of the node C is greater than the turn-on voltage value of the switch tube Q2, and the switch tube Q2 is in the on state. At this time, the voltage difference between the node A and the node D is greater than the turn-on voltage value of the switch tube Q1, and the switch tube Q1 is in the on state. At this time, the input power supply VIN charges the back-end capacitors C1, C2, and C3 through the anti-reverse diode D1 and the switch tube Q1; when the PWM signal is at a low level (i.e., the control signal Control is at a low level), the voltage value of the node C is at a low level, and the voltage value of the node C is less than the turn-on voltage value of the switch tube Q2, and the switch tube Q2 is in the off state, so that the voltage difference between the node A and the node D is less than the turn-on voltage value of the switch tube Q1, and the switch tube Q1 is in the off state. At this time, the input power supply VIN cannot charge the back-end capacitors C1, C2, and C3 through the anti-reverse diode D1 and the switch tube Q1, and the impact current is suppressed. Since the PWM signal (i.e., the control signal Control) is a high and low level signal with a period of 10us, the on and off periods of the switch tube Q1 (i.e., the field effect tube Q1) will be controlled by the PWM signal, so that the input power supply VIN will intermittently charge the rear-end capacitors C1, C2, and C3 through the switch tube Q1, thereby suppressing the sudden increase of the impact current.

[0033] When the microcontroller unit 320 detects that the voltage of the input power supply VIN is stable based on the sampling voltage output by the voltage sampling circuit 310, the control signal Control output by the microcontroller unit 320 is at a high level, and the voltage value of the node C is greater than the turn-on voltage value of the switch tube Q2, and the switch tube Q2 is in the on state. At this time, the voltage difference between the node A and the node D is greater than the turn-on voltage value of the switch tube Q1, so as to control the switch tube Q2 to be continuously turned on, thereby making the switch tube Q1 continuously turned on, and then making the input power supply VIN continuously supply power to the output power supply VOUT through the diode D1 and the switch tube Q1 (that is, the circuit can work normally).

[0034] In summary, the circuit for suppressing the inrush current generated by power-on provided by the utility model has the following beneficial effects:

[0035] 1. Compared with the existing solutions, the surge current suppression circuit generated by the power supply provided by the utility model will not cause the power components to generate large power consumption, so there will be no serious heating or even burning of components, so the overall thermal performance will be better.

[0036] 2. Compared with the existing solutions, the surge current suppression circuit generated by power-on provided by the utility model does not require multiple external control components, the overall efficiency of the circuit will be improved, and the cost will be better.

[0037] It should be noted that any changes made by those skilled in the art to the specific implementation of the present invention do not deviate from the scope of the claims of the present invention. Accordingly, the scope of the claims of the present invention is not limited to the aforementioned specific implementation.

Claims

1. A surge current suppression circuit, characterized in that: It includes a switch tube Q1, a switch control circuit, a voltage sampling circuit and a micro control unit. The input power supply VIN is connected to the node A; the first connection end of the switch tube Q1 is connected to the node A, the second connection end is connected to the output power supply VOUT, and the control end is connected to the node D; The voltage sampling circuit is used to collect the voltage of the node A and output a sampled voltage based on the voltage of the node A; The micro control unit outputs a control signal Control based on the sampled voltage, and the switch control circuit controls the on or off of the switch tube Q1 based on the control signal Control.

2. The inrush current suppression circuit according to claim 1, characterized in that: The switch control circuit includes a switch tube Q2, a resistor R2, a resistor R6, a resistor R4, and a resistor R5. One end of the resistor R2 is connected to the node A, and the other end thereof is connected to the node D; the first connection end of the switch tube Q2 is connected to the node D, the second connection end thereof is grounded via the resistor R6, and the control end thereof is connected to the node C; one end of the resistor R5 is connected to the node C, and the other end thereof is grounded; The input end of the voltage sampling circuit is connected to the node A, the output end thereof is connected to the input end of the micro control unit, and the output end of the micro control unit is connected to the node C via the resistor R4; The micro control unit outputs a control signal Control based on the sampled voltage to control the on or off of the switch tube Q2, thereby controlling the on or off of the switch tube Q1.

3. The inrush current suppression circuit according to claim 1, characterized in that: The voltage sampling circuit includes a resistor R1 and a resistor R3. One end of the resistor R1 is connected to the node A, and the other end thereof is connected to the node B; one end of the resistor R3 is connected to the node B, and the other end thereof is grounded; the node B is the output end of the voltage sampling circuit, and the voltage on the node B is the sampling voltage.

4. The inrush current suppression circuit according to claim 3, characterized in that: The voltage sampling circuit also includes a capacitor C4, One end of the capacitor C4 is connected to the node B, and the other end thereof is grounded.

5. The inrush current suppression circuit according to claim 2, characterized in that: When the power supply is powered on, if the micro control unit detects based on the sampled voltage that the voltage of the input power supply VIN is greater than the start-up voltage of the inrush current suppression circuit, the control signal Control output by the micro control unit controls the switch tube Q1 to be alternately turned on and off; When the micro control unit detects that the voltage of the input power source VIN is stable based on the sampled voltage, the control signal Control output by the micro control unit controls the switch tube Q1 to be continuously turned on. Wherein, the start-up voltage of the inrush current suppression circuit is less than the power supply voltage value set at power-on.

6. The inrush current suppression circuit according to claim 5, characterized in that: The switch tube Q1 is a PMOS transistor, and the first connection terminal, the second connection terminal and the control terminal of the switch tube Q1 are the source, the drain and the gate of the PMOS transistor respectively; The switch tube Q2 is an NPN type triode, and the first connection end, the second connection end and the control end of the switch tube Q2 are respectively the collector, the emitter and the base of the NPN type triode.

7. The inrush current suppression circuit according to claim 6, characterized in that: When the control signal Control is at a high level, the switch tube Q1 and the switch tube Q2 are turned on; when the control signal Control is at a low level, the switch tube Q1 and the switch tube Q2 are turned off. The resistance values ​​of the resistor R4 and the resistor R5 are selected to satisfy: when the control signal Control is at a high level, the voltage value of the node C is greater than the turn-on voltage value of the switch tube Q2, so that the switch tube Q2 is in a conducting state; The resistance values ​​of the resistor R2 and the resistor R6 are selected to satisfy the following requirement: when the control signal Control is at a high level, the voltage difference between the node A and the node D is greater than the turn-on voltage value of the switch tube Q1, so that the switch tube Q1 is in the on state.

8. The inrush current suppression circuit according to claim 7, characterized in that: When the power supply is powered on, if the micro control unit detects based on the sampled voltage that the voltage of the input power supply VIN is greater than the start-up voltage of the inrush current suppression circuit, the control signal Control output by the micro control unit is a PWM signal; When the micro control unit detects that the voltage of the input power source VIN is stable based on the sampled voltage, the control signal Control output by the micro control unit is at a high level.

9. The inrush current suppression circuit according to claim 1, characterized in that: It also includes an anti-reverse diode D1, The positive electrode of the anti-reverse diode D1 is connected to the input power supply VIN, and the negative electrode thereof is connected to the node A.

10. The inrush current suppression circuit according to any one of claims 1 to 9, characterized in that: It also includes a Zener diode D2, The cathode of the voltage stabilizing diode D2 is connected to the node A, and the anode of the voltage stabilizing diode D2 is connected to the node D; The operating voltage value of the voltage stabilizing diode D2 is greater than the turn-on voltage value of the switch tube Q1 and less than the maximum rated voltage value between the gate and the source of the switch tube Q1; The turn-on voltage value of the switch tube Q1 is less than the maximum rated voltage value between the gate and the source of the switch tube Q1.

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