Semiconductor device

Abstract

The utility model discloses a semiconductor device, comprising: an epitaxial structure comprising a first semiconductor structure having a first portion and a second portion, an active structure and a second semiconductor structure on the second portion; the first electrode comprises a first surface and a second surface, the first surface is positioned on the first part, the second surface is positioned on the second semiconductor structure, the first surface and the second surface have a height difference, the first electrode has a first area A1, and a part of the first electrode is positioned on the second semiconductor structure; the second electrode is positioned on the second semiconductor structure; the insulating structure is positioned between the first electrode and the first part; and an adhesive layer in contact with the insulating structure, wherein the area, covered by the first electrode, of the second semiconductor structure is defined as a second area A2, and A2 / A1 is 48%-60%.

Description

[0001] This application is a divisional application of the Chinese utility model application (application number: 202122992675.7, application date: December 1, 2021, utility model name: semiconductor device). Technical Field

[0002] The utility model relates to a semiconductor device, in particular to a photoelectric semiconductor device. Background Art

[0003] Optoelectronic semiconductor components are components that can convert optical signals and electrical signals. They can use the interaction between photons and electrons to absorb energy and stimulate radiation. Among them, light emitting diodes (LEDs), which belong to optoelectronic semiconductor components, are often used in various lighting fixtures, traffic warning signs, etc. in daily life because of their advantages such as small size, low power consumption, high brightness, high color saturation, and the ability to adjust to a variety of different colors.

[0004] However, in order to achieve the requirements of energy saving and power saving, how to make the light emitting diodes in the optoelectronic semiconductor components have better light extraction efficiency is an urgent problem to be solved in the industry. Utility Model Content

[0005] The purpose of the utility model is to provide a semiconductor device to solve the problems existing in the prior art.

[0006] In order to achieve the above-mentioned purpose, the utility model provides a semiconductor device, which includes an epitaxial structure, including a first semiconductor structure having a first part and a second part, an active structure and a second semiconductor structure located on the second part; a first electrode, including a first surface located on the first part and a second surface located on the second semiconductor structure, and the first surface and the second surface have a height difference of 4μm to 8μm; a second electrode located on the second semiconductor structure; and an insulating structure located between the first electrode and the first part.

[0007] The semiconductor device further includes a first contact structure located between the first electrode and the first portion.

[0008] The insulating structure has a first opening, the first electrode fills the first opening, and the semiconductor device further comprises a first connecting structure, the first connecting structure comprises a first cavity aligned with the first opening and a first conductive part covering the first cavity.

[0009] The first connection structure further includes a first insulating portion located between the first cavity and the first conductive portion.

[0010] The insulating structure has a second opening, the second electrode fills the second opening, and the semiconductor device has a second connection structure, the second connection structure includes a second cavity and a second conductive part covering the second cavity.

[0011] The semiconductor device further includes a second insulating portion located between the first connecting structure and the second connecting structure.

[0012] The active structure is used to emit light, and the light has a wavelength of 600nm to 1300nm.

[0013] The epitaxial structure includes Al, Ga, As, P or In, and does not include N.

[0014] The semiconductor device further comprises a bonding layer and a substrate, wherein the bonding layer is located between the epitaxial structure and the substrate.

[0015] The substrate has an upper surface facing the epitaxial structure, the epitaxial structure has a lower surface facing the substrate, the upper surface has a first surface roughness, and the lower surface has a second surface roughness greater than the first surface roughness.

[0016] The first semiconductor structure has a first length, and the bonding layer has a second length greater than the first length.

[0017] The insulating structure is in direct contact with the adhesive layer.

[0018] The insulating structure is not in direct contact with the substrate.

[0019] The semiconductor device further includes a second contact structure located between the second electrode and the second semiconductor structure and directly in contact with the second semiconductor structure.

[0020] The second contact structure is metal or metal alloy.

[0021] The insulating structure includes a distributed Bragg reflection structure.

[0022] The insulating structure includes a first insulating layer and a second insulating layer located between the first insulating layer and the first electrode, wherein the first insulating layer has a first thickness, and the second insulating layer has a second thickness greater than the first thickness.

[0023] The insulating structure also includes a third insulating stack. The second insulating layer is located between the first insulating layer and the third insulating stack. The third insulating stack includes a plurality of first sub-layers and second sub-layers overlapping each other. The refractive index of the first sub-layer is lower than that of the second sub-layer.

[0024] The thickness of each first sub-layer is greater than the thickness of the adjacent second sub-layer. The third insulating stack further has a thickness inversion region. The thickness of the first sub-layer in the thickness inversion region is less than the thickness of the adjacent second sub-layer.

[0025] One of the first sub-layers is connected to the second insulating layer and has the same material as the second insulating layer.

[0026] One of the first sub-layers and the second insulating layer has different properties and composition ratios.

[0027] The semiconductor device includes: an epitaxial structure, including a first semiconductor structure having a first part and a second part, an active structure and a second semiconductor structure located on the second part; a first electrode, including a first surface located on the first part and a second surface located on the second semiconductor structure; a second electrode located on the second semiconductor structure; and an insulating structure located between the first electrode and the first part and including an insulating stack, the insulating stack including a plurality of mutually overlapping first sub-layers and second sub-layers, the refractive index of the first sub-layer being lower than the refractive index of the second sub-layer, and the thickness of each of the first sub-layers being greater than the thickness of the adjacent second sub-layer, the insulating stack having a thickness inversion region, the thickness of the first sub-layer in the thickness inversion region being less than the thickness of the adjacent second sub-layer.

[0028] The insulating structure further includes a first insulating layer and a second insulating layer located between the first insulating layer and the insulating stack, wherein the first insulating layer has a first thickness, and the second insulating layer has a second thickness greater than the first thickness.

[0029] One of the first sub-layers is connected to the second insulating layer and has the same material as the second insulating layer.

[0030] One of the first sub-layers and the second insulating layer has different properties and composition ratios.

[0031] The utility model also provides a semiconductor device, the semiconductor device comprising: an epitaxial structure, comprising a first semiconductor structure having a first portion and a second portion, an active structure and a second semiconductor structure located on the second portion; a first electrode, comprising a first surface located on the first portion and a second surface located on the second semiconductor structure, and the first surface and the second surface have a height difference, the first electrode has a first area A1 and has a portion located on the second semiconductor structure; a second electrode located on the second semiconductor structure; an insulating structure located between the first electrode and the first portion; and a bonding layer in contact with the insulating structure;

[0032] The area of ​​the second semiconductor structure covered by the first electrode is defined as a second area A2, and A2 / A1 is 48% to 60%.

[0033] The first electrode has another portion located on the first semiconductor structure.

[0034] The second semiconductor structure includes a first portion, a second portion and a third portion. The width of the second semiconductor structure increases or decreases from the first portion toward the third portion.

[0035] The second electrode is located at the third position.

[0036] The semiconductor device also includes a first contact structure located on the first semiconductor structure.

[0037] The semiconductor device also includes a second contact structure located on the second semiconductor structure.

[0038] The second contact structure includes a contact portion and an extension portion, and when viewed from above, the width of the contact portion is greater than the width of the extension portion.

[0039] Viewed from above, the first semiconductor structure has a first length, and the bonding layer has a second length greater than the first length.

[0040] The semiconductor device further comprises a substrate, the bonding layer is located between the substrate and the epitaxial structure, and the insulating structure is not in direct contact with the substrate.

[0041] The extension portion extends from the contact portion toward the first electrode, and the extension portion has an end portion away from the contact portion.

[0042] The width of the extension portion increases gradually from the contact portion toward the end portion.

[0043] The width of the extension portion decreases gradually from the contact portion toward the end portion.

[0044] The insulating structure is located between the first electrode and the epitaxial structure and has a first opening, and the first electrode fills the first opening; the semiconductor device further includes a first connecting structure, and the first connecting structure includes a first cavity and a first conductive part covering the first cavity.

[0045] The first cavity is located opposite to the first opening.

[0046] The first connection structure includes a first insulating portion located between the first conductive portion and the first cavity.

[0047] The first insulating portion is located in correspondence with the first opening.

[0048] The semiconductor device further comprises a second connection structure located between the second electrode and the epitaxial structure, wherein the second connection structure comprises a second cavity, a second insulating portion, and a second conductive portion covering the second cavity.

[0049] The insulating structure comprises a second opening, the second electrode fills the second opening, and the second cavity is aligned with the second opening.

[0050] The semiconductor device further includes a third insulating portion between the first connecting structure and the second connecting structure.

[0051] The semiconductor device further includes a third conductive portion and / or a third cavity located in the third insulating portion.

[0052] The third cavity and / or the third conductive portion are covered by the third insulating portion.

[0053] The advantage of the utility model is that the semiconductor device provided by the utility model can have the technical effects of wide application, energy saving and power saving, and better light extraction efficiency through the improvement of its structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 FIG. 4 is a cross-sectional schematic diagram of a semiconductor device according to an embodiment of the present invention.

[0055] Figure 2 It is a top view schematically showing a semiconductor device according to an embodiment of the present invention.

[0056] Figure 3 FIG. 4 is a cross-sectional schematic diagram of a semiconductor device according to an embodiment of the present invention.

[0057] Figure 4 FIG. 4 is a cross-sectional schematic diagram of a semiconductor device according to an embodiment of the present invention.

[0058] Figure 5 It is a partial cross-sectional enlarged schematic diagram of a semiconductor device according to an embodiment of the present invention.

[0059] Figure 6 It is a top view of a light emitting module according to an embodiment of the present invention.

[0060] Figure 7 It is a partial cross-sectional structural diagram of a sensing module according to an embodiment of the present invention.

[0061] Explanation of symbols

[0062] 100,100',100" semiconductor components

[0063] 1000,2000,3000 semiconductor devices

[0064] 1Semiconductor unit

[0065] 10 Epitaxial structure

[0066] 10a Lower surface

[0067] 11 First Semiconductor Structure

[0068] 111 Part 1

[0069] 111a Third surface

[0070] 112 Part 2

[0071] 12 Active structures

[0072] 12a Fourth surface

[0073] 13. Second semiconductor structure

[0074] 131 First Part

[0075] 132 Second Part

[0076] 133 The third part

[0077] 20 first electrode

[0078] 201 First Surface

[0079] 202 Second Surface

[0080] 30 Second electrode

[0081] 40 Insulation structure

[0082] 401 first insulation layer

[0083] 402 second insulation layer

[0084] 403 third insulation laminate

[0085] 403' thickness reversal zone

[0086] 403a1~403anFirst sublayer

[0087] 403b1~403b(n-1) Second sub-layer

[0088] 40a First opening

[0089] 40b Second opening

[0090] 50 base

[0091] 51 Upper surface

[0092] 60 Adhesive layer

[0093] 70 first contact structure

[0094] 71 first contact portion

[0095] 72 first extension

[0096] 721 first end

[0097] 80 second contact structure

[0098] 81 second contact portion

[0099] 82 Second extension

[0100] 821 Second end

[0101] 91,91',91"First connection structure

[0102] 911,911',911"The first hole

[0103] 912,912',912" first conductive part

[0104] 913,913',913"First insulation part

[0105] 92,92',92" Second connection structure

[0106] 921,921" The second hole

[0107] 922,922',922" second conductive portion

[0108] 923,923',923" Second insulation part

[0109] 93 Third insulation part

[0110] 931 The Third Hole

[0111] 932 third conductive part

[0112] 94,94' Fourth insulation part

[0113] 941 The Fourth Hole

[0114] 942 fourth conductive part

[0115] 95 Fifth Insulation Section

[0116] 951 The Fifth Hole

[0117] 952 fifth conductive part

[0118] 4000 light modules

[0119] 26Reflection Wall

[0120] 110,210,324 carrier board

[0121] 1101,2101 first electrode pad

[0122] 1102,2102 second electrode pad

[0123] 5000 sensor modules

[0124] 320 Carrier

[0125] 311 First semiconductor element

[0126] 331 Second semiconductor element

[0127] 321 First retaining wall

[0128] 322 Second retaining wall

[0129] 323 Third retaining wall

[0130] 325 First space

[0131] 326 Second space

[0132] d Minimum vertical distance

[0133] L1 First length

[0134] L2 Second length

[0135] D1 First part width

[0136] D2 Second part width

[0137] D3 Third part width

[0138] D Notch area

[0139] G Height difference

[0140] T Thickness

[0141] E Edge

[0142] a1, a2, a3 Width Detailed implementation mode

[0143] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0144] Unless otherwise specified, the general formula InGaP represents In x0 Ga 1-x0 P, where 0 < x0 < 1; the general formula AlInP represents Al x1 In 1-x1 P, where 0 < x1 < 1; the general formula AlGaInP represents Al x2 Ga x3 In 1-x2-x3P, where 0 < x2 < 1 and 0 < x3 < 1; the general formula InGaAsP represents In x4 Ga 1-x4 As x5 P 1-x5 , where 0 < x4 < 1, 0 < x5 < 1; the general formula AlGaInAs represents Al x6 Ga x7 In 1-x6-x7 As, where 0 < x6 < 1, 0 < x7 < 1; the general formula InGaNAs represents In x8 Ga 1-x8 N x9 As 1-x9 , where 0 < x8 < 1, 0 < x9 < 1; the general formula InGaAs represents In x10 Ga 1-x10 As, where 0 < x10 < 1; the general formula AlGaAs represents Al x11 Ga 1-x11 As, where 0 < x11 < 1. The content of each element can be adjusted according to different purposes, such as but not limited to adjusting the bandgap size, or when the semiconductor device is a light-emitting device, the main wavelength or peak wavelength of the light-emitting element can be adjusted accordingly.

[0145] The semiconductor device of the present invention is, for example, a light-emitting device (such as a light-emitting diode, a laser diode), a light-absorbing device (such as a photo-detector), or a non-light-emitting device. The composition and dopant of each layer included in the semiconductor device of the present invention can be analyzed by any suitable method, such as a secondary ion mass spectrometer (SIMS), and the thickness of each layer can be analyzed by any suitable method, such as a transmission electron microscopy (TEM) or a scanning electron microscope (SEM), etc.

[0146] A person with ordinary knowledge in the art should understand that other components can be added on the basis of the embodiments described below. For example, if not specifically stated, a similar description of "a first layer (or structure) is located on a second layer (or structure)" may include an embodiment in which the first layer (or structure) is in direct contact with the second layer (or structure), and may also include an embodiment in which there is another structure between the first layer (or structure) and the second layer (or structure) and they are not in direct contact with each other. In addition, it should be understood that the upper and lower positional relationship of each layer (or structure) may change due to observation from different directions.

[0147] Furthermore, in the present invention, the statement that a layer or a structure “substantially consists of M” means that the main component of the layer or the structure is M, but does not exclude that the layer or the structure contains dopants or unavoidable impurities.

[0148] Figure 1 FIG. 1 is a cross-sectional view of a semiconductor device 1000 according to an embodiment of the present invention. The semiconductor device 1000 includes a semiconductor element 100 , a carrier 110 and a connecting member 9 located between the semiconductor element 100 and the carrier 110 .

[0149] The semiconductor device 100 includes an epitaxial structure 10, a first electrode 20, a second electrode 30 and an insulating structure 40. The first electrode 20 and the second electrode 30 are located on the epitaxial structure 10, and the insulating structure 40 is located between the first electrode 20 and the epitaxial structure 10 and between the second electrode 30 and the epitaxial structure 10. The semiconductor device 100 may optionally include a substrate 50 and an adhesive layer 60 located between the substrate 50 and the epitaxial structure 10.

[0150] The epitaxial structure 10 includes a first semiconductor structure 11 having a first portion 111 and a second portion 112, an active structure 12 located on the second portion 112, and a second semiconductor structure 13 located on the active structure 12. In other words, the second portion 112 is sequentially covered by the active structure 12 and the second semiconductor structure 13, and the first portion 111 does not have any active structure 12 and second semiconductor structure 13. In this embodiment, a first contact structure 70 may be selectively provided on the first portion 111, and a second contact structure 80 may be selectively provided on the second semiconductor structure 13, and the first contact structure 70 is separated from the second contact structure 80. The provision of the first contact structure 70 and the second contact structure 80 helps to reduce the forward voltage (Vf) of the semiconductor device 100, thereby improving the electrical performance of the semiconductor device 100.

[0151] The insulating structure 40 covers the first portion 111 and the second portion 112, and includes a first opening 40a located on the first portion 111, and a second opening 40b located on the second portion 112. The insulating structure 40 further covers the first contact layer 70 and the second contact layer 80, and the first opening 40a exposes a portion of the first contact layer 70, and the second opening 40b exposes a portion of the second contact layer 80. The second electrode 30 is located on the second semiconductor structure 13, and is filled in the second opening 40b and is in contact with the second contact layer 80. A portion of the first electrode 20 is located on the first portion 111, and is filled in the first opening 40a and is connected to the first contact layer 70, and another portion of the first electrode 20 crosses over the second semiconductor structure 13 and is located on the second portion 112. The insulating structure 40 is located between the first electrode 20 and the second portion 112.

[0152] In the present embodiment, the thickness of the second semiconductor structure 13 is 1 μm to 2.5 μm, and the vertical distance between the second semiconductor structure 13 and the first portion 111 is 2 μm to 3.5 μm. In detail, the first portion 111 has a third surface 111a, the second semiconductor structure 13 has a fourth surface 13a, and the third surface 111a and the fourth surface 13a have a minimum vertical distance d of 2 μm to 3.5 μm. In the present embodiment, the first electrode 20 has a first surface 201 located on the first portion 111 and opposite to the first opening 40a, and a second surface 202 located on the second portion 112. There is a height difference G between the first surface 201 and the second surface 202 ranging from 4 μm to 8 μm, so that the semiconductor device 100 has good efficiency and reliability. In other words, the height difference G is the sum of the thickness of a portion of the second semiconductor structure 13 and the insulating structure 40. When the height difference G is less than 4 μm, the thickness T of the insulating structure 40 may be less than 1.5 μm, and thus may not be sufficient to provide complete protection, insulation and / or reflection effects; when the height difference G is greater than 8 μm, the semiconductor element 100 may have a risk of electrical failure after being subsequently bonded to a carrier 110. In this embodiment, the thickness T of the insulating structure 40 is 2 μm to 5 μm.

[0153] The semiconductor device 100 is connected to the carrier 110 through the connecting member 9. The connecting member 9 includes a first connecting structure 91 and a second connecting structure 92. The first connecting structure 91 is connected to the first electrode 20 and forms an electrical connection. In the present embodiment, the first connecting structure 91 includes a first cavity 911, a first conductive portion 912 and a first insulating portion 913. The first conductive portion 912 covers the first cavity 911 or the first cavity 911 is buried in the first conductive portion 912. The first insulating portion 913 is located between the first conductive portion 912 and the first cavity 911. In other words, the first conductive portion 912 covers the first insulating portion 913 or the first insulating portion 913 is buried in the first conductive portion 912. The first insulating portion 913 covers the first cavity 911 or the first cavity 911 is buried in the first insulating portion 913. In one embodiment, the first cavity 911 and the first insulating portion 913 are located opposite to the first opening 40a. The first cavity 911 may be vacuum or filled with gas (eg, nitrogen or air).

[0154] The second connection structure 92 is connected to the second electrode 30 and forms an electrical connection. In the present embodiment, the second connection structure 92 includes a second cavity 921, a second conductive portion 922 and a second insulating portion 923. The second conductive portion 922 covers the second cavity 921 or the second cavity 921 is buried in the second conductive portion 922. The second insulating portion 923 is located between the second conductive portion 922 and the second cavity 921. In other words, the second conductive portion 922 covers the second insulating portion 923 or the second insulating portion 923 is buried in the second conductive portion 922. The second insulating portion 923 covers the second cavity 921 or the second cavity 921 is buried in the second insulating portion 923. By means of the first connection structure 91 and / or the second connection structure 92 having the above-mentioned features, the semiconductor device 100 can have higher reliability and yield after being connected to the carrier 110. In another embodiment, the first connection structure 91 further includes a first mixed layer (not shown) located between the first cavity 911 and the first insulating layer 913, and the composition of the first mixed layer is different from that of the first insulating layer 913; the second connection structure 92 further includes a second mixed layer (not shown) located between the second cavity 921 and the second insulating layer 923, and the composition of the second mixed layer is different from that of the second insulating layer 923. For example, the first mixed layer and / or the second mixed layer may include a mixture or compound of metal or non-metal, wherein the metal includes elements such as gold, platinum, tin, titanium, nickel, gallium, and aluminum, and the non-metal includes elements such as carbon, oxygen, phosphorus, and silicon.

[0155] In order to enhance the bonding strength between the epitaxial structure 10 and the carrier 110, the connecting member 9 selectively has a third insulating portion 93 between the first connecting structure 91 and the second connecting structure 92. Specifically, the carrier 110 has a first electrode pad 1101 and a second electrode pad 1102 facing the epitaxial structure 10, and the third insulating portion 93 is located between the first electrode pad 1101, the second electrode pad 1102, the first electrode 20, the second electrode 30, the first connecting structure 91, the second connecting structure 92 and the insulating structure 40. The semiconductor device 100 selectively includes a fourth insulating portion 94 and a fifth insulating portion 95. The fourth insulating portion 94 is located outside the first connecting structure 91, so that the first connecting structure 91 is located between the third insulating portion 93 and the fourth insulating portion 94; the fifth insulating portion 95 is located outside the second connecting structure 92, so that the second connecting structure 92 is located between the fourth insulating portion 94 and the fifth insulating portion 95. The fourth insulating portion 94 and the fifth insulating portion 95 help protect the first connecting structure 91 and the second connecting structure 92 from being contaminated by external conductive materials and causing unexpected electrical failure. Furthermore, the fourth insulating portion 94 and the fifth insulating portion 95 can increase the bonding force between the semiconductor device 100 and the carrier 110.

[0156] The substrate 50 has an upper surface 51, which is a flat surface without any intentionally formed roughened structure or patterned structure on the upper surface 51, and in particular, the upper surface 51 does not include an intentionally formed regular patterned structure. In the present embodiment, the upper surface 51 has a first surface roughness. The epitaxial structure 10 has a lower surface 10a away from the first electrode 20 and the second electrode 30, and the bonding layer 60 is used to combine the epitaxial structure 10 and the substrate 50, and the bonding layer 60 is located between the upper surface 51 of the substrate 50 and the lower surface 10a of the epitaxial structure 10. The lower surface 10a of the epitaxial structure 10 has a roughened structure or a patterned structure, and the lower surface 10a has a second surface roughness greater than the first surface roughness. In this embodiment, since the epitaxial structure 10 is grown on another growth substrate, and then the epitaxial structure is fixed on the substrate 50 through the bonding layer 60 by the wafer bonding technology, the lower surface 10a of the epitaxial structure 10, if having a larger roughness, is helpful to increase the mechanical strength after being combined with the substrate 50 and can increase the light extraction efficiency. Since the substrate 50 is not the growth substrate of the epitaxial structure 10, it is not necessary to form a patterned structure on the upper surface 51 through an additional manufacturing process, and the specification requirements for the substrate 50 are relatively low, thereby achieving the effect of saving the manufacturing process cost.

[0157] If the semiconductor element 100 is a light-emitting element, the bonding layer 60 and the substrate 50 are transparent to the light emitted by the active structure 12 (for example, the light transmittance of the bonding layer 60 and the substrate 50 to the active structure 112 is greater than 85%), so the light can be emitted from the semiconductor element 100 in the direction of the substrate 50.

[0158] Figure 2 FIG. 1 is a top view of a semiconductor device 100 according to an embodiment of the present invention. For the sake of clarity, only a portion of the film layer is drawn in this figure. Figure 1 , Figure 2 As shown, the first semiconductor structure 11 has a first length L1, the adhesive layer 60 has a second length L2 greater than the first length L1, and the adhesive layer 60 extends out of the edge E of the first semiconductor structure 11. The insulating structure 40 and the adhesive layer 60 are in contact with each other, and because the adhesive layer 60 is located on the substrate 50, a portion of the adhesive layer 60 is located between the insulating structure 40 and the substrate 50, and the insulating structure 40 is not in direct contact with the substrate 50. From the top view, the second semiconductor structure 13 has a first portion 131 with a first portion width D1, a second portion 132 with a second portion width D2, and a third portion 133 with a third portion width D3, and the second portion 132 is located between the first portion 131 and the third portion 133. The width of the second semiconductor structure 13 decreases or increases from the first portion 131 to the third portion 133, and the width can be reduced or increased in a continuous or segmented manner. In this embodiment, the first portion width D1 is smaller than the second portion width D2, and the third portion width D3 is larger than the second portion width D2. The first electrode 20 covers the first portion 131, the second electrode 30 covers the third portion 133, and a portion of the second portion 132 is not covered by the first electrode 20 and the second electrode 30. In this embodiment, the area of ​​the second semiconductor structure 13 covered by the first electrode 20 accounts for 48% to 60% of the area of ​​the first electrode 20. In detail, from the top view, the area of ​​the first electrode 20 is A1, and the area of ​​the second semiconductor structure 13 covered by the first electrode 20 is A2, then like The stability of the combination between the first electrode 20 and the first electrode pad 1101 may not be high, thereby reducing the production yield of the semiconductor device 1000; This will affect the distance between the first electrode 20 and the second electrode 30 , thereby increasing the probability of short circuits in subsequent manufacturing processes.

[0159] Viewed from above, the first semiconductor structure 11 is roughly rectangular and has four corners C. The first contact structure 70 includes a first contact portion 71 and a first extension portion 72 connected to the first contact portion 71. The width a1 of the first contact portion 71 is greater than the width a2 of the first extension portion 72. The first extension portion 72 extends from the first contact portion 71 toward the second electrode 30 and has a first end portion 721 away from the first contact portion 71. The first end portion 721 and the second electrode 30 do not overlap with each other.

[0160] The second contact structure 80 includes a second contact portion 81 and a second extension portion 82 connected to the second contact portion 82, and the width a3 of the second contact portion 81 is greater than the width a4 of the second extension portion 82. The second extension portion 82 extends from the second contact portion 81 toward the first electrode 20 and has a second end portion 821 away from the second contact portion 81 and extending to the first contact portion 71 (i.e., the second end portion 821 and the first contact portion 71 are connected in a manner such as Figure 2 Overlap in the Y direction as shown). Figure 1 and Figure 2 A portion of the second extension portion 82 is located below the first electrode 20 , and in order to maintain normal electrical connection, the insulating structure 40 is located between the second extension portion 82 below the first electrode 20 and the first electrode 20 .

[0161] From a top view, the first contact portion 71 is adjacent to the first portion 131, and the second contact portion 81 is located at the third portion 133. The first electrode 20 covers the first portion 131, and the second electrode 30 covers the third portion 133. The first opening 40a of the insulating structure 40 is located at the first contact portion 71, and the second opening 40b is located at the second contact portion 82. The current is injected into the first contact structure 70 and the second contact structure 81 through the first contact portion 71 and the second contact portion 81, respectively. The first contact portion 71 and the second contact portion 81 with larger widths can withstand higher current density without burning, thereby improving the durability of the semiconductor device 100.

[0162] In the present embodiment, the first extension portion 72 and the second extension portion 82 each have uniform widths a2 and a4, and the width a2 of the first extension portion 72 is greater than the width a4 of the second extension portion 82. In other embodiments, the width a2 of the first extension portion 72 increases or decreases from the first contact portion 71 to the first end portion 721, and / or the width a4 of the second extension portion 82 increases or decreases from the second contact portion 81 to the second end portion 821. The directions of the widths a1, a2, a3, a4, the first portion width D1, the second portion width D2, and the third portion width D3 are parallel to one side of the semiconductor device 100, for example, parallel to the semiconductor device 100. Figure 2 The X direction is shown.

[0163] Figure 3 FIG. 2 is a cross-sectional view of a semiconductor device 2000 according to an embodiment of the present invention. The semiconductor device 2000 includes a semiconductor element 100, a carrier 110 and a first connecting member 9'. The semiconductor device 2000 of this embodiment is substantially similar to Figure 1The semiconductor device 1000 has similar components and component connection relationships, and the difference lies in the connecting member 9' in this embodiment. In detail, the connecting member 9' includes a first connecting structure 91' located between the first electrode pad 1101 and the first electrode 20 and electrically connected to the first electrode pad 1101 and the first electrode 20, the first connecting structure 91' includes a first cavity 911' and a first conductive portion 912', the first conductive portion 912' covers the first cavity 911' or the first cavity 911' is buried in the first conductive portion 912', and in this embodiment, the first connecting structure 91' does not have an insulating portion. The connecting member 9' includes a second connecting structure 92' located between the second electrode pad 1102 and the second electrode 30 and electrically connected to the second electrode pad 1102 and the second electrode 30, the second connecting structure 92' includes a second conductive part 922' and a second insulating part 923', the second conductive part 922' covers the second insulating part 923' or the second insulating part 923' is buried in the second conductive part 922', and in this embodiment, the second connecting structure 92' does not have a cavity. In short, the semiconductor device 2000 of this embodiment shows a different connecting member 9', that is, the first connecting structure 91' only includes the first conductive part 912' and the first cavity 911', and the second connecting structure 92' only includes the second conductive part 922' and the second insulating part 923'. In other embodiments, the first connecting structure in the connecting member only includes the first conductive part and the first insulating part covered by the first conductive part and has no void, and the second connecting structure only includes the second conductive part and the second void covered by the second conductive part and has no insulating part.

[0164] Figure 4 FIG. 1 is a cross-sectional view of a semiconductor device 3000 according to an embodiment of the present invention. The semiconductor device 3000 includes a semiconductor element 100, a carrier 110 and a connecting member 9. The semiconductor device 3000 of this embodiment is substantially similar to Figure 3 The semiconductor device 2000 has similar components and component connection relationships, and the difference lies in the connecting component 9". The connecting component 9" includes a first connecting structure 91" and a second connecting structure 92".

[0165] The first connecting structure 91" includes a first cavity 911", a first conductive portion 912" and a first insulating portion 913", wherein the first conductive portion 912" covers the first cavity 911" and the first insulating portion 913", or the first cavity 911" and the first insulating portion 913" are buried in the first conductive portion 912". In the present embodiment, the number of the first insulating parts 913" is several, and the first cavity 911" is not covered by the first insulating part 913", and the plurality of first insulating parts 913" are scattered in the first conductive part 912" and are not connected to each other. The second connecting structure 92" includes a second cavity 921", a second conductive part 922" and a second insulating part 923", the second conductive part 922" covers the second cavity 921" and the second insulating part 923", or the second cavity 921" and the second insulating part 923" are buried in the second conductive part 922". In the present embodiment, the number of the second insulating parts 923" is several, one of the second insulating parts 923" covers the second cavity 921" and is located between the second cavity 921" and the second conductive part 922", and the remaining second insulating parts 923" are scattered in the second conductive part 922" and are not connected to each other.

[0166] The connecting member 9” further includes a third insulating portion 93”, a fourth insulating portion 94” and a fifth insulating portion 95”. The third insulating portion 93” has a third conductive portion 932 and / or a third cavity 931. The third cavity 931 and / or the third conductive portion 932 are covered by the third insulating portion 93”. Therefore, the third conductive portion 932 is not interconnected with the first electrode pad 1101, the second electrode pad 1102, the first electrode 20, the second electrode 30, the first conductive portion 912” or the second conductive portion 922” to avoid leakage path or electrical failure in the semiconductor device 3000. Similarly, the fourth insulating portion 94" has a fourth cavity 941 and / or a fourth conductive portion 942, and the fourth cavity 941 and / or the fourth conductive portion 942 are covered by the fourth insulating portion 94", so the fourth conductive portion 942 is not interconnected with the first electrode pad 1101, the first electrode 20, and the first conductive portion 912 to avoid the semiconductor device 3000 from generating a leakage path or electrical failure; the fifth insulating portion 95" has a fifth cavity 951 and / or a fifth conductive portion 952, and the fifth cavity 951 and / or the fifth conductive portion 952 are covered by the fifth insulating portion 95", so the fifth conductive portion 952 is not interconnected with the second electrode pad 1102, the second electrode 30, and the second conductive portion 921 to avoid the semiconductor device 3000 from generating a leakage path or electrical failure.

[0167] The first semiconductor structure 11 and the second semiconductor structure 13 may have different conductivity types. For example, the first semiconductor structure 11 is n-type and the second semiconductor structure 13 is p-type; or, the first semiconductor structure 11 is p-type and the second semiconductor structure 13 is n-type. Thus, the first semiconductor structure 11 and the second semiconductor structure 13 may provide electrons and holes or holes and electrons, respectively. The first semiconductor structure 11 has a first dopant and the second semiconductor structure 13 has a second dopant, so that the first semiconductor structure 11 and the second semiconductor structure 13 have different conductivities. The first dopant and the second dopant may be carbon (C), zinc (Zn), silicon (Si), germanium (Ge), tin (Sn), selenium (Se), magnesium (Mg) or tellurium (Te), respectively. In the present embodiment, the first semiconductor structure 11 is p-type and the first dopant is magnesium (Mg) or carbon (C), the second semiconductor structure 13 is n-type and the first dopant is tellurium (Te) or silicon (Si), and the doping concentrations of the first semiconductor structure 11 and the second semiconductor structure 13 are approximately 5×10 17 / cm 3 Up to 1×10 20 / cm 3 .

[0168] The first semiconductor structure 11, the second semiconductor structure 13 and the active structure 12 may respectively include III-V semiconductor materials. The III-V semiconductor materials may include Al, Ga, As, P or In. In one embodiment, the first semiconductor structure 11, the second semiconductor structure 13 and the active structure 12 do not include N. Specifically, the III-V semiconductor materials may be binary compound semiconductors (such as GaAs or GaP), ternary compound semiconductors (such as InGaAs, AlGaAs, InGaP or AlInP) or quaternary compound semiconductors (such as AlGaInAs, AlGaInP, InGaAsP, InGaAsN or AlGaAsP). In one embodiment, the first active region 13 is substantially composed of a ternary compound semiconductor (such as InGaAs, AlGaAs, InGaP or AlInP) or a quaternary compound semiconductor (such as AlGaInAs, AlGaInP, InGaAsP or AlGaAsP).

[0169] The semiconductor device 100 may include a double heterostructure (DH), a double-side double heterostructure (DDH) or a multiple quantum well (MQW) structure. According to one embodiment, when the semiconductor device 100 is a light emitting device, the active structure 12 may emit a light from the second semiconductor structure 13 toward the first semiconductor structure 11. The light may include visible light or invisible light. The wavelength of the light emitted by the semiconductor device 100 is determined by the material of the active structure 12. The material of the active structure 12 may include Ga, As or / and P, such as InGaAs, AlGaAsP, GaAsP, InGaAsP, AlGaAs, AlGaInAs, InGaP or AlGaInP. For example, the active structure 12 may emit infrared light with a peak wavelength of 700 to 1700 nm, red light with a peak wavelength of 610 to 700 nm, or yellow light with a peak wavelength of 530 to 600 nm. In this embodiment, the active structure 12 emits light with a peak wavelength of 600 nm to 1300 nm.

[0170] In this embodiment, the crystal system of each layer of the epitaxial structure is cubic and has a zincblende structure. In one embodiment, there is no polarization in each layer of the epitaxial structure, that is, the polarization vector of each layer is substantially zero.

[0171] The substrate 50 includes a conductive or insulating material. Conductive materials include gallium arsenide (GaAs), indium phosphide (InP), silicon carbide (SiC), gallium phosphide (GaP), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN), germanium (Ge) or silicon (Si). Insulating materials include sapphire. In this embodiment, the substrate 50 is a bonding substrate rather than a growth substrate, and is bonded to the epitaxial structure 10 through an adhesive layer 60, such as Figure 1 , Figure 3 , Figure 4 shown.

[0172] The first electrode 2 and the second electrode 3 are used to be electrically connected to an external power source. The materials of the first electrode 2 and the second electrode 3 may be the same or different, for example, respectively including metal oxides, metals or alloys. Examples of metal oxides include indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), zinc oxide (ZnO), gallium phosphide (GaP), indium cerium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO) or a combination of the above materials. Examples of metals include germanium (Ge), beryllium (Be), zinc (Zn), gold (Au), platinum (Pt), titanium (Ti), aluminum (Al), nickel (Ni), tin (Sn) or copper (Cu). The alloy may include at least two selected from the group consisting of the above metals, such as germanium-gold-nickel (GeAuNi), beryllium-gold (BeAu), germanium-gold (GeAu), or zinc-gold (ZnAu).

[0173] The bonding layer 60 connects the substrate 50 and the epitaxial structure 10. In one embodiment, the bonding layer 60 may be a single layer or multiple layers (not shown). The material of the bonding layer 60 may include a transparent insulating material, and the transparent insulating material includes but is not limited to titanium oxide (TiO2), niobium oxide (Nb2O5), silicon oxide (SiO2), aluminum oxide (Al2O3), silicon nitride (SiN), BCB, etc.

[0174] In this embodiment, the insulating structure 40 may be a single-layer, double-layer or multi-layer structure, for example, the insulating structure 40 includes a distributed Bragg reflection structure. In addition, the material of the insulating structure 40 may include a dielectric material, for example, silicon oxide, silicon nitride, niobium oxide, titanium oxide or a combination thereof. In one embodiment, the insulating structure 40 includes a distributed Bragg reflection structure formed by overlapping multiple silicon oxide layers and multiple titanium oxide layers.

[0175] Figure 5It is a partially enlarged cross-sectional schematic diagram of a semiconductor device 100 according to an embodiment of the utility model, wherein the insulating structure 40 comprises a first insulating layer 401, a second insulating layer 402 located on the first insulating layer 401, and a third insulating stack 403 located on the second insulating layer 401, wherein the first insulating layer 401 has a first thickness T1, the second insulating layer 402 has a second thickness T2 greater than the first thickness T1, and the adhesion between the first insulating layer 401 and the second semiconductor structure 13 is greater than the adhesion between the second insulating layer 402 and the second semiconductor structure 13, thereby making the insulating structure 40 have good mechanical strength after being combined with the epitaxial structure 10. For example, the material of the first insulating layer 401 is silicon nitride, and the material of the second insulating layer 402 is silicon oxide. The third insulating stack 403 includes a plurality of first sub-layers 403a and second sub-layers 403b that overlap each other. The first sub-layers 403a and the second sub-layers 403b are made of materials with different refractive indices, and the refractive index of the first sub-layer 403a is lower than the refractive index of the second sub-layer 403b. For example, the material of the first sub-layer 403a is silicon oxide (refractive index is 1.5), and the material of the second sub-layer 403b is titanium oxide (refractive index is 2.2). The thickness of each first sub-layer 403a and each second sub-layer 403b is less than the first thickness T1 and the second thickness T2. In the present embodiment, the thickness of the first sub-layer 403a is greater than the thickness of the adjacent second sub-layer 403b. However, in order to improve the reflectivity of the third insulating stack 403 to the light emitted by the epitaxial structure 10, the third insulating stack 403 has a thickness inversion region 403', that is, the thickness of one of the first sub-layers 403a (n-3) in the third insulating stack 403 is less than the thickness of the adjacent second sub-layer 403b (n-3), and the thickness inversion region 403' is closer to the first electrode 20. In detail, there is a first distance D1 between the thickness inversion region 403' and the second semiconductor structure 13, and there is a second distance D2 between the thickness inversion region 403' and the first electrode 20 that is less than the first distance D1.

[0176] In this embodiment, the material of the first sub-layer 403a1 connected to the second insulating layer 402 can be the same as the material of the second insulating layer 402, such as but not limited to silicon oxide. However, the second insulating layer 402 and the first sub-layer 403a1 are formed in different ways, such as plasma chemical vapor deposition (PECVD), chemical plating, sputtering or evaporation. Therefore, the second insulating layer 402 and the first sub-layer 403a1 can have different properties and composition ratios, such as different densities, different composition ratios (such as silicon oxygen composition ratio, Si / O), different refractive indices, etc. In this embodiment, the first sub-layer 403a1 has a third thickness, such as 800A to 3000A, and the second insulating layer 402 has a second thickness T2, such as 5000A to 12000A. In one embodiment, the compactness of the second insulating layer 402 is greater than that of the first sub-layer 403a1 or / and the silicon-oxygen composition ratio of the second insulating layer 402 is less than that of the first sub-layer 403a1, for example: the silicon atom content of the second insulating layer 402 is 55at%, the oxygen atom content is 45at%, and the silicon-oxygen composition ratio is 1.2; the silicon atom content of the first sub-layer 403a1 is 45at%, the oxygen atom content is 55at%, and the silicon-oxygen composition ratio is 0.8. Through the characteristics of the second insulating layer 402 and the first sub-layer 403a1, the effects of releasing the stress of the insulating structure 40, increasing the light extraction efficiency, and improving the reliability of the semiconductor device can be achieved.

[0177] The first contact structure 70 is located between the first electrode 20 and the first portion 111, and the second contact structure 80 is located between the second electrode 30 and the second semiconductor structure 13. The first electrode 20 is in direct contact with the first contact structure 70 through the first opening 40a, and the second electrode 30 is in direct contact with the second contact structure 80 through the second opening 40b. The first contact structure 70 and the second contact structure 80 include metal or alloy, and since the semiconductor device 100 of this embodiment emits light from the direction of the substrate 50, it is not necessary to consider whether the first contact structure 70 and the second contact structure 80 will have a light shielding problem. Therefore, if the first contact structure 70 and the second contact structure 80 are metal or alloy with a lower resistance value, the photoelectric characteristics of the semiconductor device 100 will be more excellent.

[0178] Please refer to Figure 6 , is a top view of a light emitting module 4000 according to an embodiment of the present invention. The light emitting module 4000 includes a plurality of Figure 1The semiconductor element 100 shown. In detail, the light-emitting module includes a plurality of semiconductor units 1, each semiconductor unit 1 includes three semiconductor elements 100, 100', 100" which respectively emit a first light, a second light and a third light, and the first light, the second light and the third light are mixed to form white light, wherein the first light is, for example, red light, the second light is, for example, green light and the third light is, for example, blue light. In one embodiment of the utility model, the plurality of semiconductor devices 1 have a common carrier 210 and are arranged in a two-dimensional matrix. The light-emitting module 4000 may include a reflective wall 26 disposed between a plurality of adjacent semiconductor units 1, and the shape of the recess enclosed by the reflective wall 26 of each semiconductor unit 1 may be circular as in the present embodiment, or may be adjusted to other shapes such as square or strip according to display requirements, and a single recess enclosed by the reflective wall 26 has a recess area D, and the recess area is preferably between 1 and 20 mm 2 . The light emitting module 4000 can be further applied to display devices, such as television screens, mobile phone screens, computer screens, laptop screens, billboards or sports billboards. The light emitting module 4000 includes a plurality of semiconductor units 1 as an array of pixels. The number, color and arrangement of semiconductor elements in the semiconductor unit 1, and the spacing between the semiconductor units 1 will affect the visual characteristics of the user when viewing. For example: a display device using a smaller semiconductor unit 1 can accommodate a larger number of semiconductor units 1 under the same unit area compared to a larger semiconductor unit 1, so that the light emitting module has a greater resolution.

[0179] Figure 7 The sensing module 5000 is a schematic diagram of a partial cross-sectional structure of an embodiment of the present invention. The sensing module 5000 includes a carrier 320, a first semiconductor element 311 and a second semiconductor element 331. The first semiconductor element 311 and / or the second semiconductor element 331 can be the above Figure 1 The semiconductor device 100 is shown in FIG. The carrier 320 includes a first retaining wall 321, a second retaining wall 322, a third retaining wall 323, a carrier 324, a first space 325 and a second space 326. The first semiconductor device 311 is located in the first space 325 between the first retaining wall 321 and the second retaining wall 322, and the second semiconductor device 331 is located in the second space 326 between the second retaining wall 322 and the third retaining wall 323. The first semiconductor device 311 and / or the second semiconductor device 331 may be as follows: Figure 1The first semiconductor element 311 and the second semiconductor element 331 are located on the carrier 324 and are electrically connected to the circuit connection structure (not shown) on the carrier 324. In the present embodiment, the first semiconductor element 311 is a light-emitting element, the second semiconductor element 331 is a light-receiving element, and the sensing module 300 can be placed in a wearable device (e.g., a watch, earphones). The light emitted by the first semiconductor element 311 passes through the skin and irradiates the body cells and blood, and then the light scattered / reflected back from the body cells and blood is absorbed by the second semiconductor element 331. According to the changes in the reflected and scattered light, physiological signals of the human body, such as heart rate, blood sugar, blood pressure, blood oxygen concentration, etc., are detected.

[0180] Specifically, the epitaxial structure, semiconductor element, light-emitting module, and sensing module of the utility model can be applied to products in the fields of lighting, medical treatment, display, communication, sensing, power supply system, etc., such as lamps, monitors, mobile phones, tablet computers, car dashboards, televisions, computers, wearable devices (such as watches, bracelets, necklaces, etc.), traffic signs, outdoor displays, medical equipment, etc.

[0181] Although the present invention has been disclosed in conjunction with the above embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the relevant technical field should understand that slight modifications or changes can be made without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the definition of the attached claims. In addition, the contents of the above embodiments can be combined or replaced with each other under appropriate circumstances, and are not limited to the specific embodiments described. For example, the relevant parameters of a specific component disclosed in one embodiment or the connection relationship between a specific component and other components can also be applied to other embodiments, and all fall within the scope of protection of the present invention.

Claims

1. A semiconductor device, characterized in that: The semiconductor device comprises: An epitaxial structure comprising a first semiconductor structure having a first portion and a second portion, an active structure and a second semiconductor structure located on the second portion; A first electrode, comprising a first surface located on the first portion and a second surface located on the second semiconductor structure, wherein the first surface and the second surface have a height difference, the first electrode has a first area A1 and has a portion located on the second semiconductor structure; A second electrode is located on the second semiconductor structure; an insulating structure, located between the first electrode and the first portion; as well as An adhesive layer in contact with the insulating structure; The area of ​​the second semiconductor structure covered by the first electrode is defined as a second area A2, and A2 / A1 is 48% to 60%.

2. The semiconductor device according to claim 1, wherein The first electrode has another portion located on the first semiconductor structure.

3. The semiconductor device according to claim 1, wherein: Viewed from above, the second semiconductor structure includes a first portion, a second portion, and a third portion, and the width of the second semiconductor structure increases or decreases from the first portion toward the third portion.

4. The semiconductor device according to claim 3, wherein: The second electrode is located at the third position.

5. The semiconductor device according to claim 1, 2 or 3, wherein: The semiconductor device also includes a first contact structure located on the first semiconductor structure.

6. The semiconductor device according to claim 5, wherein: The semiconductor device also includes a second contact structure located on the second semiconductor structure.

7. The semiconductor device according to claim 6, wherein: The second contact structure includes a contact portion and an extension portion, and when viewed from above, the width of the contact portion is greater than the width of the extension portion.

8. The semiconductor device according to claim 1, wherein Viewed from above, the first semiconductor structure has a first length, and the bonding layer has a second length greater than the first length.

9. The semiconductor device according to claim 1, wherein: The semiconductor device further comprises a substrate, the bonding layer is located between the substrate and the epitaxial structure, and the insulating structure is not in direct contact with the substrate.

10. The semiconductor device according to claim 7, wherein: The extension portion extends from the contact portion toward the first electrode, and the extension portion has an end portion away from the contact portion.

11. The semiconductor device according to claim 10, wherein: The width of the extension portion increases gradually from the contact portion toward the end portion.

12. The semiconductor device according to claim 10, wherein: The width of the extension portion decreases gradually from the contact portion toward the end portion.

13. The semiconductor device according to claim 1, wherein: The insulating structure is located between the first electrode and the epitaxial structure and has a first opening, and the first electrode fills the first opening; The semiconductor device further comprises a first connection structure, wherein the first connection structure comprises a first cavity and a first conductive portion covering the first cavity.

14. The semiconductor device according to claim 13, wherein: The first cavity is located opposite to the first opening.

15. The semiconductor device according to claim 13, wherein: The first connection structure includes a first insulating portion located between the first conductive portion and the first cavity.

16. The semiconductor device according to claim 15, wherein: The first insulating portion is located in correspondence with the first opening.

17. The semiconductor device according to claim 13, wherein: The semiconductor device further comprises a second connection structure connected to the second electrode, wherein the second connection structure comprises a second cavity, a second insulating portion, and a second conductive portion covering the second cavity.

18. The semiconductor device according to claim 17, wherein: The insulating structure comprises a second opening, the second electrode fills the second opening, and the second cavity is aligned with the second opening.

19. The semiconductor device according to claim 17, wherein: The semiconductor device further includes a third insulating portion between the first connecting structure and the second connecting structure.

20. The semiconductor device according to claim 19, wherein The semiconductor device further includes a third conductive portion and / or a third cavity located in the third insulating portion.

21. The semiconductor device according to claim 20, wherein: The third cavity and / or the third conductive portion are covered by the third insulating portion.

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