Circuit for relieving polarization of capacitive load
By designing a circuit for capacitive load, alternately loading DC bias signals to the electrodes of the sound-generating screen, the problem of polarization of capacitive load during aging is solved, and the durability and controllability of the product are improved.
Patent Information
- Application Number
- CN202421774603.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-25
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2034-07-25
AI Technical Summary
Traditional capacitive load-directional sound screens are prone to polarization during aging, resulting in L, C, and R parameters offset and SPL drop, and the product is uncontrollable.
A circuit is designed, including a DC bias generation circuit and a switching circuit, and alternately loading DC bias signals to the positive and negative electrodes of the capacitive load, thereby mitigating or removing polarization problems.
Effectively slows down or removes polarization problems caused by capacitive loads, enhances product durability, and helps study polarization of capacitive load materials.
Smart Images
Figure CN222839818U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of capacitive loads for directional sound generation, and in particular to a circuit for alleviating polarization of capacitive loads. Background Art
[0002] Ultra-thin, narrow-frame, and even full-screen designs of display devices leave less and less space for sound-generating devices. Traditional sound-generating devices are large in size and have limited installation locations. It is difficult to find a suitable location and space in the new generation of display devices. Therefore, it is necessary to redesign the sound-generating device that can adapt to the needs of current display devices.
[0003] Some display device manufacturers have designed a way to use the screen to generate sound. As a surface audio technology, screen sound technology provides a new solution for the sound of multimedia audio-visual equipment. Currently, transparent screen directional speakers that combine display devices with ultrasonic transducers are being developed.
[0004] During the production test of traditional capacitive load-directional sound screen, as the aging time increases, the directional sound screen is prone to polarization. Its polarization manifestations are mainly: L (inductance), C (capacitance), and R (resistance) parameters have a large offset, and the SPL (sound pressure level) drops rapidly. The signal at the capacitive load driving end will change according to the degree of load polarization, and these changes make the product uncontrollable.
[0005] Therefore, it is necessary to study a solution to effectively alleviate or eliminate the polarization problem caused by the above-mentioned capacitive load-directional sound screen. Utility Model Content
[0006] The utility model aims to provide a circuit design to alleviate or eliminate the polarization problem caused by capacitive load.
[0007] To achieve the above object, the utility model proposes a circuit for alleviating polarization of a capacitive load, comprising:
[0008] A DC bias generating circuit for generating a DC bias signal;
[0009] The switch circuit includes a first on-off control circuit and a second on-off control circuit, wherein the first on-off control circuit is connected between the DC bias generating circuit and the positive electrode of the capacitive load, and the second on-off control circuit is connected between the DC bias generating circuit and the negative electrode of the capacitive load, and the DC bias generating circuit alternately loads the DC bias signal to the positive electrode and the negative electrode of the capacitive load through the first on-off control circuit and the second on-off control circuit.
[0010] In a preferred embodiment, the first on-off control circuit and the second on-off control circuit both include a field effect transistor, a first voltage-dividing resistor, and a second voltage-dividing resistor. The field effect transistor is connected between the DC bias generating circuit and the capacitive load, the first voltage-dividing resistor is connected in parallel between the DC bias generating circuit and the gate of the field effect transistor, and one end of the second voltage-dividing resistor is connected in parallel with the gate of the field effect transistor, and the other end is grounded.
[0011] In a preferred embodiment, the circuit further includes a grounding loop, and the first on-off control circuit and the second on-off control circuit are connected to the grounding loop and are grounded through the grounding loop.
[0012] In a preferred embodiment, the circuit further comprises an audio AC signal generating circuit connected to the capacitive load.
[0013] In a preferred embodiment, the audio AC signal generating circuit includes an AC signal generating circuit for generating an audio AC signal, a transformer, a first DC isolation circuit and a second DC isolation circuit, the input end of the transformer is connected to the AC signal generating circuit, the output end is connected to the output end of the first on-off control circuit and the positive pole of the capacitive load through the first DC isolation circuit, and is connected to the output end of the second on-off control circuit and the negative pole of the capacitive load through the second DC isolation circuit.
[0014] In a preferred embodiment, the transformer includes a primary winding and at least two secondary windings, the primary winding is connected to the AC signal generating circuit, and the center tap of the secondary winding is connected to the ground loop.
[0015] In a preferred embodiment, the grounding loop includes a first grounding resistor and a second grounding resistor, one end of the first grounding resistor is connected to the first on-off control circuit, and the other end is connected to one end of the second grounding resistor, the other end of the second grounding resistor is connected to the second on-off control circuit, and the first grounding resistor and the second grounding resistor are connected to the center tap of the secondary winding and grounded.
[0016] In a preferred embodiment, the first DC blocking circuit and the second DC blocking circuit each include a DC blocking capacitor.
[0017] In a preferred embodiment, the first on-off control circuit and the second on-off control circuit are controlled on and off by an external pulse signal.
[0018] In a preferred embodiment, the capacitive load is an electrostatic directional sound screen.
[0019] Compared with the prior art, the utility model has the following beneficial effects:
[0020] 1. The utility model adopts electronic circuit design, and realizes alternating changes of load electrodes by alternately applying DC bias voltage at both ends of the capacitive load, which can effectively slow down or eliminate the polarization problem caused by the capacitive load, enhance the durability of the product, and also provide help for laboratory research on the polarization of specific materials used in capacitive loads.
[0021] 2. The utility model solves the DC bias loop problem by ingeniously designing the winding method of the transformer in the audio AC signal generating circuit and grounding the secondary center tap of the transformer. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 This is a schematic diagram of a principle block diagram of an embodiment of the utility model;
[0023] Figure 2 The figure is a specific circuit diagram of an embodiment of the utility model. DETAILED DESCRIPTION
[0024] The specific implementation modes of the present invention are described in detail below, but it should be understood that the protection scope of the present invention is not limited by the specific implementation modes.
[0025] Unless explicitly stated otherwise, throughout the specification and claims, the term “comprise” or variations such as “include” or “comprising”, etc., will be understood to include the stated elements or components but not to exclude other elements or components.
[0026] Combination Figure 1 and Figure 2 As shown, the utility model discloses a circuit for alleviating the polarization of a capacitive load, which specifically includes a DC bias generating circuit, a switching circuit, an audio AC signal generating circuit and a capacitive load, wherein the DC bias generating circuit controls the switching circuit to alternately load a DC bias signal to both ends of the capacitive load, thereby realizing an alternating change in the electrodes of the capacitive load, and can effectively alleviate or eliminate the polarization problem generated by the capacitive load. The AC signal generating circuit is used to load an audio AC (AC) signal to the capacitive load, and the audio AC signal and the DC bias signal are coupled to act together on the rear end capacitive load.
[0027] Specifically, the DC bias generating circuit is used to generate a DC bias signal V1. During implementation, the DC bias generating circuit can be implemented using a DC-DC converter, and the voltage value of the DC bias signal V1 generated by it can be set according to actual needs. In this embodiment, the DC bias voltage value is set to 300V.
[0028] The switch circuit specifically includes a first on-off control circuit and a second on-off control circuit, wherein the first on-off control circuit is connected between the DC bias generating circuit and the positive electrode of the capacitive load, and the second on-off control circuit is connected between the DC bias generating circuit and the negative electrode of the capacitive load, and the DC bias generating circuit alternately loads the DC bias signal to the positive electrode and the negative electrode of the capacitive load through the first on-off control circuit and the second on-off control circuit. In the present embodiment, the first on-off control circuit and the second on-off control circuit specifically include a field effect transistor, a first voltage divider resistor and a second voltage divider resistor, wherein the source of the field effect transistor is connected to the DC bias generating circuit, and the drain is connected to the capacitive load; the first voltage divider resistor is connected in parallel between the DC bias generating circuit and the gate of the field effect transistor, one end of the second voltage divider resistor is connected in parallel with the gate of the field effect transistor, and the other end is grounded. Figure 2 In the embodiment, Q3 is a field effect transistor of the first on-off control circuit, R4 is a first voltage-dividing resistor of the first on-off control circuit, and R10 is a second voltage-dividing resistor of the first on-off control circuit; similarly, Q1 is a field effect transistor of the second on-off control circuit, R5 is a first voltage-dividing resistor of the second on-off control circuit, and R9 is a second voltage-dividing resistor of the second on-off control circuit. During implementation, it is necessary to select electronic components that can withstand the high-voltage DC bias generated by the DC bias generating circuit here. In this embodiment, the field effect transistor specifically used is a field effect transistor of model DMP65H20D0HSS-13, and the resistance values of the first voltage-dividing resistor and the second voltage-dividing resistor are set according to actual needs.
[0029] In this embodiment, the first on-off control circuit and the second on-off control circuit are controlled by an external pulse signal (PWM). Specifically, a switch is provided in each of the first on-off control circuit and the second on-off control circuit. Figure 2 In the embodiment, a switch S1 is arranged in the first on-off control circuit and a switch S2 is arranged in the second on-off control circuit, wherein the switch S1 is connected between the gate of the field effect transistor Q3 and the resistor R10, and the switch S2 is connected between the gate of the field effect transistor Q3 and the resistor R9. The switch S1 and the switch S2 can be designed to be controlled by the GPIO (General Purpose Input Output) of the main control chip (IC). Under the control of the first on-off control circuit and the second on-off control circuit, the DC bias signal V1 is alternately loaded to the positive and negative ends of the capacitive load at different time points to achieve electrode reversal at both ends of the load.
[0030] The audio AC signal generating circuit is used to generate a modulated audio AC signal (such as an audio signal modulated with a high-frequency carrier signal higher than 20KHz), which specifically includes an AC signal generating circuit, a transformer, a first DC isolation circuit and a second DC isolation circuit, wherein the AC signal generating circuit is used to generate an audio AC signal source. In this embodiment, the voltage Vpp value of the audio AC signal source is 180V, and the carrier frequency is 50kHz. The voltage value can be set according to actual needs. Figure 2 The transformer T2 in the embodiment, the AC signal generating circuit is connected to the input end of the transformer T2, specifically connected to the primary winding of the transformer T2. Preferably, the utility model changes the design of the secondary winding of the transformer, specifically winding multiple secondary windings. In this embodiment, two secondary windings are specifically wound, and for ease of description, they are defined as the first secondary winding and the second secondary winding, respectively, wherein the first secondary winding is connected to the first DC isolation circuit, and the second secondary winding is connected to the second DC isolation circuit. The ratio of the transformer can be set according to actual needs.
[0031] The first DC blocking circuit and the second DC blocking circuit are used to isolate the DC bias and the audio AC signal so that the DC bias signal does not affect the front-end transformer. In this embodiment, the first DC blocking circuit and the second DC blocking circuit are both implemented by a DC blocking capacitor, such as Figure 2 In the embodiment, the first DC blocking circuit uses a DC blocking capacitor C1, and the second DC blocking circuit uses a DC blocking capacitor C2. The DC blocking capacitors C1 and C2 may be DC blocking capacitors with a capacitance of 1 μF.
[0032] The first on-off control circuit and the second on-off control circuit are grounded through a ground loop. In this embodiment, the ground loop specifically includes a first grounding resistor and a second grounding resistor, wherein one end of the first grounding resistor is connected to the first on-off control circuit, and the other end is connected to one end of the second grounding resistor, and the other end of the second grounding resistor is connected to the second on-off control circuit, and the first grounding resistor and the second grounding resistor are connected to the center tap of the secondary winding (i.e., between the first secondary winding and the second secondary winding) and grounded. Figure 2 In the embodiment, the resistor R8 is the first grounding resistor, and the resistor R7 is the second grounding resistor. The utility model ingeniously improves the design of the transformer winding, grounds the center tap of the transformer secondary winding, and solves the loop problem of DC bias.
[0033] Furthermore, the circuit of the utility model also includes an AC / DC coupling circuit, which is composed of a resistor, a diode and the above-mentioned DC blocking capacitor. In this embodiment, an AC / DC coupling circuit is set at the positive and negative electrodes of the capacitive load, such as Figure 2In the figure, one end of the resistor R3 is connected to the drain of the transistor Q3, and the other end is connected to the diode D1, and the other end of the diode D1 is connected in parallel with the DC blocking capacitor C1, that is, the resistor R3, the diode D1 and the DC blocking capacitor C1 constitute an AC-DC coupling circuit at the positive end of the capacitive load; similarly, one end of the resistor R6 is connected to the drain of the transistor Q1, and the other end is connected to the diode D2, and the other end of the diode D2 is connected in parallel with the DC blocking capacitor C3, that is, the resistor R6, the diode D2 and the DC blocking capacitor C3 constitute an AC-DC coupling circuit at the negative end of the capacitive load.
[0034] In implementation, the capacitive load may be a directional sound-emitting screen, which vibrates and emits sound in a directional manner under the combined action of the above-mentioned audio AC signal and DC bias signal. In this embodiment, the equivalent circuit of the capacitive load uses an equivalent capacitor and two resistors connected in series to the positive and negative electrodes of the equivalent capacitor, respectively, such as Figure 2 The equivalent capacitor C2, resistor R1 and resistor R2.
[0035] The advantages of the utility model are: 1. By adopting electronic circuit design, the load electrode is alternately changed by alternately applying a DC bias voltage to both ends of the capacitive load, which can effectively slow down or eliminate the polarization problem caused by the capacitive load, enhance the durability of the product, and also provide help for laboratory research on the polarization of specific materials used in capacitive loads. 2. By cleverly designing the winding method of the transformer in the audio AC signal generation circuit, the secondary center tap of the transformer is grounded, solving the DC bias loop problem.
[0036] The foregoing description of specific exemplary embodiments of the utility model is for the purpose of illustration and illustration. These descriptions are not intended to limit the utility model to the precise form disclosed, and it is clear that many changes and variations can be made based on the above teachings. The purpose of selecting and describing the exemplary embodiments is to explain the specific principles of the utility model and its practical application, so that those skilled in the art can realize and utilize various different exemplary embodiments of the utility model and various different options and changes. The scope of the utility model is intended to be defined by the claims and their equivalents.
Claims
1. A circuit for alleviating polarization of a capacitive load, characterized in that: The circuit comprises: A DC bias generating circuit for generating a DC bias signal; The switch circuit includes a first on-off control circuit and a second on-off control circuit, wherein the first on-off control circuit is connected between the DC bias generating circuit and the positive electrode of the capacitive load, and the second on-off control circuit is connected between the DC bias generating circuit and the negative electrode of the capacitive load, and the DC bias generating circuit alternately loads the DC bias signal to the positive electrode and the negative electrode of the capacitive load through the first on-off control circuit and the second on-off control circuit.
2. A circuit for alleviating polarization of a capacitive load as claimed in claim 1, characterized in that: The first on-off control circuit and the second on-off control circuit both include a field effect transistor, a first voltage-dividing resistor, and a second voltage-dividing resistor. The field effect transistor is connected between the DC bias generating circuit and the capacitive load, the first voltage-dividing resistor is connected in parallel between the DC bias generating circuit and the gate of the field effect transistor, and one end of the second voltage-dividing resistor is connected in parallel with the gate of the field effect transistor, and the other end is grounded.
3. A circuit for alleviating polarization of a capacitive load as claimed in claim 1, characterized in that: The circuit also includes a grounding loop, and the first on-off control circuit and the second on-off control circuit are connected to the grounding loop and are grounded through the grounding loop.
4. A circuit for alleviating polarization of a capacitive load as claimed in claim 3, characterized in that: The circuit also includes an audio AC signal generating circuit connected to the capacitive load.
5. A circuit for alleviating polarization of a capacitive load as claimed in claim 4, characterized in that: The audio AC signal generating circuit includes an AC signal generating circuit for generating an audio AC signal, a transformer, a first DC isolation circuit and a second DC isolation circuit, the input end of the transformer is connected to the AC signal generating circuit, the output end is connected to the output end of the first on-off control circuit and the positive pole of the capacitive load through the first DC isolation circuit, and is connected to the output end of the second on-off control circuit and the negative pole of the capacitive load through the second DC isolation circuit.
6. A circuit for alleviating polarization of a capacitive load as claimed in claim 5, characterized in that: The transformer includes a primary winding and at least two secondary windings, the primary winding is connected to the AC signal generating circuit, and the center tap of the secondary winding is connected to the ground loop.
7. A circuit for alleviating polarization of a capacitive load as claimed in claim 6, characterized in that: The grounding loop includes a first grounding resistor and a second grounding resistor, one end of the first grounding resistor is connected to the first on-off control circuit, and the other end is connected to one end of the second grounding resistor, the other end of the second grounding resistor is connected to the second on-off control circuit, and the first grounding resistor and the second grounding resistor are connected to the center tap of the secondary winding and grounded.
8. A circuit for alleviating polarization of a capacitive load as claimed in claim 5, characterized in that: The first DC blocking circuit and the second DC blocking circuit each include a DC blocking capacitor.
9. A circuit for alleviating polarization of a capacitive load as claimed in claim 1, characterized in that: The first on-off control circuit and the second on-off control circuit are controlled on and off by an external pulse signal.
10. A circuit for alleviating polarization of a capacitive load as claimed in claim 1, characterized in that: The capacitive load is an electrostatic directional sound-emitting screen.