Filter on-load test circuit and device

Abstract

The utility model discloses a filter on-load test circuit and device, and the circuit comprises a first buffer circuit and a second buffer circuit, and the first buffer circuit and the second buffer circuit are connected with a filter. The first buffer circuit comprises a first buffer unit and a second buffer unit, the first buffer unit comprises a first capacitor, a second capacitor and a first inductor, and the second buffer unit comprises a third capacitor, a fourth capacitor and a second inductor; according to the utility model, a stable loop is formed among the first buffer circuit, the second buffer circuit, the filter to be tested and the bias current source, two ends of the vector network analyzer are respectively connected with the first buffer circuit and the second buffer circuit, and a capacitor in the buffer circuit can isolate direct current to protect the vector network analyzer. The inductor in the buffer circuit can transmit direct current and isolate alternating current signals of the vector network analyzer so as to protect the bias current source.

Description

Technical Field

[0001] The utility model belongs to the technical field of filter testing, and in particular relates to a filter load testing circuit and a device. Background Art

[0002] With the continuous development of electronic and power systems, the number of electronic devices in the same power supply system has increased. In this way, there will be electromagnetic compatibility problems within the same system or between systems. Electromagnetic interference is also a kind of electromagnetic compatibility problem, and with the complexity of the system, the electromagnetic interference phenomenon is becoming more and more serious. Among them, the power line conduction interference is the most serious, and the interference energy is often the largest; one of the main ways to suppress the power line conduction interference is to use EMI power filter, and the insertion loss is usually used to characterize the filter's ability to suppress the power line conduction interference. Insertion loss refers to the loss of load power caused by the insertion of components or devices somewhere in the transmission system. It is expressed as the ratio of the power received on the load before the component or device is inserted to the power received on the same load after the insertion in decibels.

[0003] The existing testing method usually connects the filter to the circuit. When a certain current is applied to the filter, the filtering effects of the inductor and capacitor will change to a certain extent, especially the inductor which is more sensitive to current. However, excessive current will cause damage to the vector network analyzer, resulting in increased testing costs. Utility Model Content

[0004] The utility model aims to provide a filter load test circuit and device, which utilize a first buffer circuit and a second buffer circuit in the test circuit to protect a vector network analyzer to prevent excessive current from damaging the device during testing.

[0005] The utility model is realized by the following technical solutions:

[0006] A filter load test circuit comprises a first buffer circuit and a second buffer circuit, wherein the first buffer circuit and the second buffer circuit are both connected to the filter; the first buffer circuit comprises a first buffer unit and a second buffer unit, the first buffer unit comprises a first capacitor, a second capacitor and a first inductor, and the two ends of the first inductor are respectively connected to the first capacitor and the second capacitor; the second buffer unit comprises a third capacitor, a fourth capacitor and a second inductor, and the two ends of the second inductor are respectively connected to the third capacitor and the fourth capacitor; the second capacitor of the first buffer unit is connected to the third capacitor and the fourth capacitor of the second buffer circuit and is grounded.

[0007] Further, the second buffer circuit includes a third buffer unit and a fourth buffer unit, the third buffer unit includes a fifth capacitor, a sixth capacitor and a third inductor, and the two ends of the third inductor are respectively connected to the fifth capacitor and the sixth capacitor; the fourth buffer unit includes a seventh capacitor, an eighth capacitor and a fourth inductor, and the two ends of the fourth inductor are respectively connected to the seventh capacitor and the eighth capacitor; the sixth capacitor of the third buffer unit is connected to the seventh capacitor and the eighth capacitor of the fourth buffer circuit and is grounded, and an adjustable resistor is arranged between the third inductor and the fourth inductor.

[0008] Furthermore, the value range of the first capacitor and the fifth capacitor is between 0.7 mF and 2 mF.

[0009] Furthermore, the value range of the first inductor and the third inductor is between 2mH and 10mH.

[0010] Furthermore, the resistance range of the adjustable resistor is between 1Ω-50Ω.

[0011] A filter load test device, a load test circuit board, the load test circuit board includes the filter load test circuit described above; it also includes a vector network analyzer, a filter to be tested and a bias current source; a first buffer circuit in the load test circuit board is connected to the bias current source and the input signal end of the filter to be tested, the second buffer circuit is connected to the output signal end of the filter to be tested, and the two ends of the vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit.

[0012] Furthermore, the first inductor and the second inductor in the first buffer circuit in the load test circuit board are connected to the bias current source and the filter to be tested respectively, and one end of the first capacitor is connected to the vector analyzer.

[0013] Furthermore, two ends of the adjustable resistor in the second buffer circuit in the load test circuit board are respectively connected to the output end of the filter to be tested, and one end of the fifth capacitor is connected to the other end of the vector analyzer.

[0014] Compared with the prior art, the utility model has the following advantages and beneficial effects:

[0015] In the utility model, a first buffer circuit and a second buffer circuit are respectively arranged at the input end and the output end of the filter to be tested, a stable loop is formed between the first buffer circuit and the second buffer circuit and the filter to be tested and the bias current source, two ends of a vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit, the capacitor in the buffer circuit can isolate the direct current to protect the vector network analyzer, and the inductor in the buffer circuit can transmit the direct current and isolate the alternating current signal of the vector network analyzer to protect the bias current source. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 The schematic diagram of the first buffer circuit in the filter load test circuit of the utility model is shown in FIG.

[0018] Figure 2 The schematic diagram of the second buffer circuit in the filter load test circuit of the utility model is shown in FIG.

[0019] Figure 3 The utility model is a logic block diagram of the connection relationship of the filter load test circuit.

[0020] Figure 4 The diagram is a front circuit diagram of a load test circuit board in a filter load test device of the utility model.

[0021] Figure 5 The figure is a schematic diagram of the back circuit of the load test circuit board in the filter load test device of the utility model. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the utility model clearer, the technical solutions in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments.

[0023] Embodiment 1:

[0024] The main structure of this embodiment is a filter load test circuit, such as Figure 1 , Figure 2 and Figure 3As shown, it includes a first buffer circuit and a second buffer circuit, the first buffer circuit is connected to a bias current source and an input signal end of a filter to be tested, the second buffer circuit is connected to an output signal end of the filter to be tested, and two ends of the vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit; the first buffer circuit includes a first buffer unit and a second buffer unit, the first buffer unit includes a first capacitor C1, a second capacitor C2 and a first inductor L1, two ends of the first inductor L1 are respectively connected to the first capacitor C1 and the second capacitor C2, the second buffer unit includes a third capacitor C3, a fourth capacitor C4 and a second inductor L2, two ends of the second inductor L2 are respectively connected to the third capacitor C3 and the fourth capacitor C4; the second capacitor C2 of the first buffer unit is connected to the third capacitor C3 and the fourth capacitor C4 of the second buffer circuit and grounded, the first inductor L1 and the second inductor L2 are respectively connected to the bias current source and the filter to be tested, and one end of the first capacitor C1 is connected to the vector analyzer.

[0025] The input end of the filter to be tested includes an input positive end and an input negative end, and the output end also includes an output positive end and an output negative end. The input end of the filter to be tested is connected to a first buffer circuit, the output end of the filter to be tested is connected to a second buffer circuit, the bias current source is connected to the first buffer circuit, and the two ends of the vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit. After the current enters the first buffer circuit from the bias current source, it enters the second buffer circuit through the filter to be tested and finally returns to the bias current source. The vector network analyzer can test the electromagnetic wave energy change value of the filter to be tested during the power-on process. After being protected by the first buffer circuit and the second buffer circuit, the vector network analyzer can be prevented from being damaged by excessive current. The first buffer circuit includes a first buffer unit and a second buffer unit, and the first buffer unit and the second buffer unit are electrically connected. The first buffer unit includes a first capacitor C1, a second capacitor C2 and a first inductor L1, and the two ends of the first inductor L1 are respectively connected to the first capacitor C1 and the second capacitor C2; the first capacitor C1 and the second capacitor C2 are used to isolate the DC current to protect the vector network analyzer and transmit the signal, and the first inductor L1 is used to transmit the DC current and isolate the AC signal to protect the bias current source; the second buffer unit includes a third capacitor C3, a fourth capacitor C4 and a second inductor L2, and the two ends of the second inductor L2 are respectively connected to the third capacitor C3 and the fourth capacitor C4; the second capacitor C2 of the first buffer unit is connected to the third capacitor C3 and the fourth capacitor C4 of the second buffer circuit and grounded, the first inductor L1 and the second inductor L2 are respectively connected to the bias current source and the filter to be tested, and one end of the first capacitor C1 is connected to the vector analyzer.

[0026] Embodiment 2:

[0027] On the basis of the above embodiments, the present embodiment further defines the second buffer circuit, the second buffer circuit includes a third buffer unit and a fourth buffer unit, the third buffer unit includes a fifth capacitor C5, a sixth capacitor C6 and a third inductor L3, and the two ends of the third inductor L3 are respectively connected to the fifth capacitor C5 and the sixth capacitor C6; the fourth buffer unit includes a sixth capacitor C7, an eighth capacitor C8 and a fourth inductor L4, and the two ends of the fourth inductor L4 are respectively connected to the sixth capacitor C7 and the eighth capacitor C8; the working principles of the second buffer unit, the third buffer unit and the fourth buffer unit are the same as those of the first buffer unit; the sixth capacitor C6 of the third buffer unit is connected to the sixth capacitor C7 and the eighth capacitor C8 of the fourth buffer circuit and is grounded, an adjustable resistor R is arranged between the third inductor L3 and the fourth inductor L4, the resistance range of the adjustable resistor R is between 1Ω-50Ω, and the adjustable resistor R The two ends are respectively connected to the output end of the filter to be tested, and one end of the fifth capacitor C5 is connected to the other end of the vector analyzer; preferably, the value range of the first capacitor C1 and the fifth capacitor C5 is between 0.7mF-2mF. If the capacitance value of the first capacitor C1 and the fifth capacitor C5 is too high, they may continue to discharge after the bias current source is disconnected, affecting the personal safety of the tester; if the capacitance value is too low, it will hinder the test signal of the vector network analyzer from passing through, thereby affecting the test accuracy; the value range of the first inductor L1 and the third inductor L3 is between 2mH-10mH. If the value of the first inductor L1 and the third inductor L3 is too high, the inductor volume will be too large, affecting the convenience of the test, and the energy stored in the inductor may also cause safety problems; when the value is too low, the first inductor L1 and the third inductor L3 will have a poor blocking effect on the AC signal, thereby affecting the bias current source. The other parts of this embodiment are the same as the above embodiment and will not be repeated here.

[0028] Embodiment 3:

[0029] This embodiment further defines a filter load test device, such as Figure 4 and Figure 5 As shown, the filter load test device includes a load test circuit board, the load test circuit board includes a first buffer circuit and a second buffer circuit; also includes a vector network analyzer, a filter to be tested and a bias current source; the first buffer circuit in the load test circuit board is connected to the bias current source and the input signal end of the filter to be tested, the second buffer circuit is connected to the output signal end of the filter to be tested, and the two ends of the vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit; the front of the load test circuit board is provided with a first inductor L1, a second inductor L2, a third inductor L3 and a fourth inductor L4, and a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a sixth capacitor C6, a seventh capacitor C7 and an eighth capacitor C8; the back of the load test circuit board is provided with a first capacitor C1 and a fifth capacitor C5. The other parts of this embodiment are the same as the above embodiment, and will not be repeated here.

[0030] In the description of the present utility model, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. used to indicate the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, or are the orientation or position relationship in which the utility model product is usually placed when used. They are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model.

[0031] In addition, if the terms "horizontal" or "vertical" appear in the description of the present invention, it does not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0032] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent changes made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A filter load test circuit, characterized in that: It includes a first buffer circuit and a second buffer circuit, both of which are connected to the filter; the first buffer circuit includes a first buffer unit and a second buffer unit, the first buffer unit includes a first capacitor, a second capacitor and a first inductor, and the two ends of the first inductor are respectively connected to the first capacitor and the second capacitor; the second buffer unit includes a third capacitor, a fourth capacitor and a second inductor, and the two ends of the second inductor are respectively connected to the third capacitor and the fourth capacitor; the second capacitor of the first buffer unit is connected to the third capacitor and the fourth capacitor of the second buffer circuit and grounded.

2. The filter load test circuit according to claim 1, characterized in that: The second buffer circuit includes a third buffer unit and a fourth buffer unit, the third buffer unit includes a fifth capacitor, a sixth capacitor and a third inductor, and the two ends of the third inductor are respectively connected to the fifth capacitor and the sixth capacitor; the fourth buffer unit includes a seventh capacitor, an eighth capacitor and a fourth inductor, and the two ends of the fourth inductor are respectively connected to the seventh capacitor and the eighth capacitor; the sixth capacitor of the third buffer unit is connected to the seventh capacitor and the eighth capacitor of the fourth buffer circuit and is grounded, and an adjustable resistor is arranged between the third inductor and the fourth inductor.

3. The filter load test circuit according to claim 2, characterized in that: The value range of the first capacitor and the fifth capacitor is between 0.7 mF and 2 mF.

4. The filter load test circuit according to claim 2, characterized in that: The value range of the first inductor and the third inductor is between 2mH and 10mH.

5. The filter load test circuit according to claim 2, characterized in that: The resistance value of the adjustable resistor ranges from 1Ω to 50Ω.

6. A filter load test device, characterized in that: A load test circuit board, the load test circuit board comprises a filter load test circuit as described in any one of claims 1 to 5; and also comprises a vector network analyzer, a filter to be tested and a bias current source; a first buffer circuit in the load test circuit board is connected to the bias current source and the input signal end of the filter to be tested, the second buffer circuit is connected to the output signal end of the filter to be tested, and two ends of the vector network analyzer are respectively connected to the first buffer circuit and the second buffer circuit.

7. The filter load test device according to claim 6, characterized in that: The first inductor and the second inductor in the first buffer circuit in the load test circuit board are connected to the bias current source and the filter to be tested respectively, and one end of the first capacitor is connected to the vector analyzer.

8. The filter load test device according to claim 7, characterized in that: Two ends of the adjustable resistor in the second buffer circuit in the load test circuit board are respectively connected to the output end of the filter to be tested, and one end of the fifth capacitor is connected to the other end of the vector analyzer.

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