Communication module

Abstract

The utility model discloses a communication module. The communication module comprises a processing chip, a peripheral interface and an electrostatic protection circuit, an output pin of the processing chip is connected with a peripheral interface; the peripheral interface comprises a circuit interface for generating an electrostatic interference source, and the electrostatic protection circuit is a circuit arranged between the circuit interface and a connecting pin of the processing chip; the electrostatic protection circuit comprises a transient voltage suppression (TVS) diode, one end of the TVS diode is grounded, and the other end of the TVS diode is connected to a circuit between the circuit interface and the connecting pin of the processing chip. The problem that a processing chip is easily damaged due to the fact that static electricity exists in a communication module in the related technology is solved.

Description

Technical Field

[0001] This application relates to the technical field of communication devices, and more particularly, to a communication module. Background Art

[0002] As an essential part of the Internet of Things, data debugging and problem location are requirements that communication modules must face. Since the communication module itself does not generate static power sources, but after connecting external devices, static power sources may be generated for different devices, especially devices such as RF antennas, and static electricity is more likely to be generated on the RF signal transmission circuit connected through its RF signal transmission port. Generally, due to cost and packaging space considerations, general communication modules do not have professional electrostatic protection devices. This results in the easy generation of static electricity during the use of the communication module, especially during the use by non-professionals, which affects communication and thus the user experience.

[0003] It can be seen from this that the communication module in the related technology is prone to generate static electricity, resulting in the problem of damage to the processing chip. Summary of the Utility Model

[0004] The main purpose of this application is to provide a communication module to solve the problem that the communication module in the related technology has static electricity and is prone to damage the processing chip.

[0005] According to one aspect of this application, a communication module is provided, including a processing chip 100, a peripheral interface 102, and an electrostatic protection circuit 103; the output pin of the processing chip 100 is connected to the peripheral interface 102, and the peripheral interface 102 is used for connecting an external device to the processing chip 100, and the processing chip 100 controls the external device connected to the peripheral interface 102; the peripheral interface 102 includes a circuit interface that generates an electrostatic interference source, and the electrostatic protection circuit 103 is arranged in the circuit between the circuit interface and the connection pin of the processing chip 100; the electrostatic protection circuit 103 includes a transient voltage suppression TVS diode, one end of the TVS diode is grounded, and the other end of the TVS diode is connected to the circuit between the circuit interface and the connection pin of the processing chip 100.

[0006] As an optional embodiment, there are multiple peripheral interfaces 102, and all or part of the multiple peripheral interfaces 102 are provided with the electrostatic protection circuit 103.

[0007] As an alternative embodiment, the TVS diode includes a flyback TVS diode; after the flyback TVS diode reaches the breakdown voltage, the clamping voltage at both ends is pulled down to a value between the operating voltage and the breakdown voltage, and the difference between the pulled-down clamping voltage and the breakdown voltage is within a preset range; the operating voltage of the flyback TVS diode is not less than the operating voltage of the circuit it is in and is within a preset multiple range of the operating voltage of the circuit it is in.

[0008] As an alternative embodiment, the preset multiple range is 1.2 - 1.8.

[0009] As an alternative embodiment, the preset range is 0 - 1.2V; when the voltage signal at the circuit interface is a voltage signal with bias, or when the TVS diode is connected to the power supply 101, the preset range is 0.8 - 1.2V, and the structure of the TVS diode is a thyristor structure; when the preset range is 0 - 0.8V, the structure of the TVS diode is an NPNP structure or a grounded-gate N-type MOS structure.

[0010] As an alternative embodiment, the TVS diode is arranged at a position after the electrostatic interference source in the circuit it is in; when the peripheral interface 102 is a circuit interface that generates an electrostatic interference source, the TVS diode is arranged at the position where the circuit interface is connected to the circuit it is in.

[0011] As an alternative embodiment, the circuit interface is an interface of a radio frequency input / output circuit; the peripheral interface 102 is used to directly install a radio frequency antenna or install a radio frequency antenna through a line interface for installing a radio frequency antenna.

[0012] As an alternative embodiment, a filter circuit is further arranged between the connection pin of the circuit interface and the processing chip 100. The filter circuit is connected in parallel with the electrostatic protection circuit 103 and is arranged at one end of the electrostatic protection circuit 103 close to the peripheral interface 102 or at one end close to the processing chip 100.

[0013] As an alternative embodiment, the filter circuit is arranged at one end of the electrostatic protection circuit 103 close to the processing chip 100; the filter circuit includes two first capacitors and one first inductor. One end of the first inductor is connected to the electrostatic protection circuit 103, and the other end of the first inductor is connected to the peripheral interface 102; one ends of the two first capacitors are respectively connected to both ends of the first inductor, and the other ends of the two first capacitors are both grounded.

[0014] As an alternative embodiment, a series resonance circuit is further provided between the connection pins of the circuit interface and the processing chip 100, and the series resonance circuit is disposed at one end close to the circuit interface; the series resonance circuit includes a second capacitor and a second inductor connected in series, one end of the second inductor is connected to the peripheral interface 102, the other end of the second inductor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0015] As an alternative embodiment, a power supply 101 is further included, the power supply 101 is connected to the processing chip 100 for supplying power to the processing chip 100; the electrostatic protection circuit 103 is also provided on the circuit between the connection pins of the power supply 101 and the processing chip 100.

[0016] As an alternative embodiment, a filter circuit and decoupling capacitors are further provided between the power supply 101 and the processing chip 100; the filter circuit is connected in parallel with the electrostatic protection circuit 103 and is disposed at one end of the electrostatic protection circuit 103 close to the peripheral interface 102 or at one end close to the processing chip 100; the decoupling capacitors include a plurality of third capacitors with different capacitances, one end of the third capacitor is connected to the power supply 101, and the other end is grounded; the third capacitors are arranged in order of decreasing capacitance between the power supply 101 and the processing chip 100, and the third capacitor with the largest capacitance is closest to the power supply 101.

[0017] As an alternative embodiment, the processing chip 100 includes a low-noise power amplifier for processing the radio frequency signal of the radio frequency antenna; the pins of the processing chip 100 include low-noise power amplifier input pins, and an inductor is further provided on the circuit between the low-noise power amplifier input pins and the low-noise power amplifier for eliminating the electrostatic voltage entering the low-noise power amplifier input pins.

[0018] In the present application, different external device connections and communications are supported by the processing chip, and an electrostatic protection circuit is provided between the circuit interface generating the electrostatic interference source and the connection pins of the processing chip. The transient voltage suppression TVS diode is used to suppress static electricity and prevent damage to the processing chip. Thus, the problem in the related art that the communication module has static electricity and is likely to cause damage to the processing chip is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application, and do not constitute an improper limitation of the present application. In the drawings:

[0020] Figure 1Schematic diagram of a communication module architecture disclosed in this application;

[0021] Figure 2 Schematic diagram of another communication module architecture disclosed in this application;

[0022] Figure 3 Schematic diagram of yet another communication module architecture disclosed in this application;

[0023] Figure 4 Schematic circuit diagram of a communication module disclosed in this application;

[0024] Figure 5 Schematic circuit diagram of another communication module disclosed in this application.

[0025] Among them, the above-mentioned drawings include the following reference numerals:

[0026] 100, processing chip; 101, power supply; 102, peripheral interface; 103, electrostatic protection circuit. Detailed implementation manners

[0027] It should be noted that, without conflict, the embodiments in this application and the features in the embodiments may be combined with each other. The following will describe this application in detail with reference to the drawings and in combination with the embodiments.

[0028] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary implementation manners according to this application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "include" and / or "comprise" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or their combinations.

[0029] Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and values set forth in these embodiments do not limit the scope of this application. At the same time, it should be understood that for the convenience of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationships. Technologies, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods and devices should be regarded as part of the authorized specification. In all the examples shown and discussed here, any specific value should be construed as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that: like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0030] See Figures 1 to 5As shown, the present application provides a communication module with electrostatic protection function, including a processing chip 100, a peripheral interface 102, and an electrostatic protection circuit 103; the output pin of the processing chip 100 is connected to the peripheral interface 102, and the peripheral interface 102 is used to connect an external device to the processing chip 100, and the processing chip 100 controls the external device connected to the peripheral interface 102; the peripheral interface 102 includes a circuit interface that generates an electrostatic interference source, and the electrostatic protection circuit 103 is arranged in a circuit between the circuit interface and the connection pin of the processing chip 100; the electrostatic protection circuit 103 includes a transient voltage suppression TVS diode, one end of the TVS diode is grounded, and the other end of the TVS diode is connected to the circuit between the circuit interface and the connection pin of the processing chip 100.

[0031] This embodiment supports multiple numbers and types of external devices to connect and communicate through the processing chip 100. Specifically, the processing chip 100 includes two computing chips, which are connected and can work together, which can not only improve data processing efficiency and speed, but also provide more pins as interfaces for external devices, that is, peripheral interfaces, thereby realizing the expansion of peripheral interfaces, rather than relying solely on external interface expansion devices.

[0032] In this embodiment, an electrostatic protection circuit is provided between the circuit interface generating the electrostatic interference source and the connection pin of the processing chip, and the transient voltage suppression TVS diode is used to suppress static electricity and prevent damage to the processing chip. This solves the problem in the related art that static electricity exists in the communication module and easily causes damage to the processing chip.

[0033] The communication module also includes a power supply 101, which is connected to the processing chip 100 and is used to power the processing chip 100. The power supply 101 can be a built-in power supply or an external power supply. The built-in power supply is the power supply of the module itself, and the external power supply is the power supply that needs to be connected to an external power supply. The built-in power supply does not need to be powered when in use, which is convenient to use, but the use time is short and it is only suitable for use as a temporary device. The external power supply needs to be connected to a separate power supply when in use, but it can work for a long time.

[0034] If Figure 4 As shown, VDD33 can be understood as a 3.3V power supply. The ANT1 on the far left is the RF antenna or the circuit interface of the RF antenna. Its circuit is RF_ANT. The RF circuit RF_ANT is connected to the LNA_IN pin of the main computing chip U1 of the processing chip. LNA_IN is also the input pin of the low noise power amplifier. LNA is a low noise power amplifier. It should be noted that the low noise power amplifier is integrated inside U1. Its structure is shown in Figure 2 is not shown, but its structure and use are well known in the art.

[0035] The above communication module may further include a cache, which is connected to the processing chip 100 and used to cache the data of the processing chip 100. The cache is connected to the processing chip 100 and used to cache the data of the processing chip 100; the cache is also U2 in Figure 4 , which is connected to the main computing chip U1 through multiple pins and used to provide cache space for the main computing chip U1. Multiple peripheral interfaces 102 can be led out through the output pins of the main computing chip U1 and the secondary computing chip U3 and connected to various different peripheral interfaces ( Figure 4 not shown in the figure). For example, a power interface, an antenna interface, a reset button, a JTAG interface, a UART interface, etc. The above various peripheral interfaces are the existing peripheral interfaces in the related art, and their connection methods are also existing. The peripheral interfaces of the new utility model should also be covered within the scope of this embodiment.

[0036] The electrostatic protection circuit 103 mainly includes a TVS diode. In the above Figure 4 , the electrostatic protection circuit 103 on the radio frequency line RF_ANT mainly includes the TVS diode D2 ESD, which is a bidirectional diode. One end is connected to the radio frequency line RF_ANT, that is, the LNA_IN pin where the radio frequency line RF_ANT is connected to the main computing chip U1 of the processing chip. The other end is grounded. When the static electricity generated by the radio frequency antenna or circuit on the radio frequency line RF_ANT passes through the TVS diode D2 ESD, it automatically conducts and conducts the voltage into the ground wire, thus effectively forming electrostatic protection.

[0037] Peripheral interfaces 102 are connected to the output pins of the processing chip 100. Here, the output pins of the processing chip 100 include the output pins of the main computing chip U1 and the secondary computing chip U3.

[0038] The peripheral interface 102 is used for an external device to be connected to the processing chip 100, and the processing chip 100 controls the external device connected to the peripheral interface 102. It can be one or more. In Figure 1 , the structure of an electrostatic protection circuit 103 is provided for one peripheral interface 102.

[0039] As an optional embodiment, there are multiple peripheral interfaces 102, and all or part of the multiple peripheral interfaces 102 are provided with the electrostatic protection circuit 103. Figure 2 This is a schematic diagram of another communication module architecture disclosed in this application. As Figure 2 shown, the processing chip 100 is connected to multiple peripheral interfaces 102, and a part of the multiple peripheral interfaces 102 is provided with the electrostatic protection circuit 103. The number of this part is at least 1 and at most one less than the total number of the peripheral interfaces 102.

[0040] Figure 3 This is a schematic diagram of another communication module architecture disclosed in the present application. As Figure 3 shown, the processing chip 100 is connected to multiple peripheral interfaces 102, and all of the multiple peripheral interfaces 102 are provided with an electrostatic protection circuit 103.

[0041] It should be noted that the above power supply 101, processing chip 100, cache, multiple peripheral interfaces 102, and electrostatic protection circuit 103 are all encapsulated within the housing of the same communication module to form a complete communication module, which can be directly used without modification during use.

[0042] As an optional embodiment, the TVS diode includes a flyback TVS diode; after the flyback TVS diode reaches the breakdown voltage, the clamping voltage at both ends is pulled down to between the operating voltage and the breakdown voltage, and the difference between the pulled-down clamping voltage and the breakdown voltage is within a preset range; the operating voltage of the flyback TVS diode is not less than the operating voltage of the circuit where it is located and is within a preset multiple range of the operating voltage of the circuit where it is located.

[0043] The TVS diode includes a common TVS diode and a flyback TVS diode. The flyback TVS diode means that in the V-A curve of the TVS diode's volt-ampere operation, after the voltage of the TVS diode reaches the breakdown voltage, it will automatically and quickly pull down the clamping voltage at both ends of the TVS diode to between the operating voltage and the breakdown voltage. This pulling-down process is very fast, almost instantaneous, making the flyback TVS diode have a faster response.

[0044] The difference between the pulled-down clamping voltage and the breakdown voltage of the TVS diode is within a preset range. The voltage difference depends on the performance of the TVS itself. The clamping voltage differences of TVS diodes with different materials and structures are different. The selection principle of the TVS diode is that the operating voltage Vrwm of the diode ≥ the operating voltage of the protected circuit, that is, the operating voltage of the flyback TVS diode is not less than the operating voltage of the circuit where it is located.

[0045] As an optional embodiment, the preset multiple range is 1.2 - 1.8. That is, the operating voltage Vrwm of the TVS diode is within the voltage range of 1.2 times - 1.8 times the operating voltage of the circuit where it is located.

[0046] To illustrate the effect of the TVS in this embodiment, an ESD test was conducted. For the electro-static discharge (ESD), the contact discharge method was used. The contact point was the radio frequency input / output point of the communication module. The measured pocket was in a passive state. Every 1 second, 10 positive and negative voltage pulses were applied respectively. The RX test instrument used signaling testing. The final test results are shown in Table 1, which is the ESD test result table of multiple communication modules with the contact point being the radio frequency input / output point.

[0047] Table 1 ESD test result table of multiple communication modules with the contact point being the radio frequency input / output point

[0048]

[0049] From the above test results, it can be seen that for each communication module, when no TVS diode is added, the static electricity acceptance ability can barely reach ±2 KV. When it exceeds ±2 KV, it will affect the circuit operation and even damage the circuit. If the static electricity is higher, it will cause a short circuit. After adding the TVS diode, the ESD level will be significantly improved, and it can reach at least ±4 KV, with a significant static electricity protection effect.

[0050] It should be noted that considering the ESD consistency issue of the communication module, there will be differences among different communication module individuals, and it is not guaranteed that all communication modules can achieve static electricity protection of ±4 KV after adding the TVS diode.

[0051] To illustrate the effect of the TVS in this embodiment, the contact point was changed to the grounding end of the radio frequency antenna of the communication module. The final test results are shown in Table 2, which is the ESD test result table of multiple communication modules with the contact point being the grounding end of the radio frequency antenna.

[0052] Table 2 ESD test result table of multiple communication modules with the contact point being the grounding end of the radio frequency antenna

[0053]

[0054] From the above test results, it can be seen that for each communication module, when no TVS diode is added, the static electricity acceptance ability can barely reach ±2 KV. When it reaches ±2.5 KV, it will affect the circuit operation. If the static electricity is higher, it will cause a short circuit. After adding the TVS diode, the ESD level will be significantly improved, and it can reach at least ±8 KV, with a significant static electricity protection effect.

[0055] It should be noted that in Tables 1 and 2 above, "-" indicates that the data has little test significance and no test was conducted. Without test data, or after testing, the static electricity of this value has caused a short circuit in the corresponding communication module, resulting in no test data.

[0056] As an alternative embodiment, the preset range is 0 - 1.2V; when the voltage signal of the circuit interface is a voltage signal with bias, or when the TVS diode is connected to the power supply 101, the preset range is 0.8 - 1.2V, and the structure of the TVS diode is a thyristor structure; when the preset range is 0 - 0.8V, the structure of the TVS diode is an NPNP structure or a grounded gate N-type MOS structure.

[0057] A flyback TVS diode refers to a TVS diode whose volt-ampere characteristic curve exhibits a flyback, and the difference between the clamped voltage after being pulled down and the breakdown voltage is relatively large, such as 0.8 - 1.2V, which can be called a large flyback TVS diode; the difference between the clamped voltage after being pulled down and the breakdown voltage is relatively small, such as less than 0.8V, which can be called a small flyback TVS diode. The structure of the small flyback TVS diode is NPNP or a grounded gate N-type MOS (GGNMOS), and the structure of the large flyback TVS diode is an SCR thyristor structure.

[0058] As an alternative embodiment, the TVS diode is disposed at a position after the electrostatic interference source in the circuit where it is located; when the peripheral interface 102 is a circuit interface that generates an electrostatic interference source, the TVS diode is disposed at the position where the circuit interface is connected to the circuit where it is located.

[0059] In theory, the TVS diode can be disposed at any position on the circuit to be protected, but considering that the external devices connected to the circuit interface are often the main cause of generating electrostatic interference sources. In this embodiment, the TVS diode is disposed on the circuit closest to the external device, that is, at the position where the circuit interface is connected to the circuit where it is located.

[0060] Figure 5 This is a circuit schematic diagram of another communication module disclosed in the present application, as Figure 5 shown, in the RF circuit RF_ANT, the TVS diode D2 ESD can be disposed at the position where the circuit interface ANT1 accesses the RF circuit RF_ANT. When static electricity is generated at the circuit interface ANT1 and transmitted to the RF circuit RF_ANT, the static electricity is promptly eliminated by the TVS at this position, providing effective electrostatic protection for the entire RF circuit RF_ANT and the connected main computing chip U1.

[0061] It should be noted that for the power supply circuit, that is, the circuit where VDD33 is connected to the main computing chip U1, in theory, the corresponding TVS diode D1 ESD can also be at any position on the power supply circuit. However, considering that the power supply is the main cause of generating static electricity. Similar to the RF circuit RF_ANT, as Figure 5As shown, the TVS diode D1 for ESD can also be set at the position where the power supply accesses the power supply circuit, providing effective electrostatic protection for the entire power supply circuit and the connected main computing chip U1.

[0062] As an alternative embodiment, when the peripheral interface 102 is a signal transmission port, the junction capacitance of the TVS diode is inversely proportional to the signal transmission rate of the circuit it is in.

[0063] If the peripheral interface is a signal transmission port, when selecting a TVS diode, it is also necessary to consider the transmission rate and select the junction capacitance accordingly. Specifically, the higher the transmission rate, the lower the required junction capacitance. The reference values are as follows: for USB2.0 applications, the TVS junction capacitance < 4pf; for HDMI ports, the junction capacitance < 0.8pf; for Thunderbolt 4.0 products, the junction capacitance < 0.18pf.

[0064] As an alternative embodiment, the circuit interface is an interface for a radio frequency input / output circuit; the peripheral interface 102 is used to directly install a radio frequency antenna or install a radio frequency antenna through a line interface for installing a radio frequency antenna.

[0065] As Figure 4 shown, ANT1 on the far left is a radio frequency antenna or the circuit interface of a radio frequency antenna. If ANT1 is a radio frequency antenna, then the peripheral interface 102 is also the above-mentioned circuit interface for directly installing a radio frequency antenna. If ANT1 is the circuit interface of a radio frequency antenna, then the peripheral interface 102 is also the above-mentioned circuit interface for installing a radio frequency antenna through a line interface for installing a radio frequency antenna.

[0066] For the circuit of ANT1 outside the communication module, it is not shown in Figure 4 , but its structure and usage are well-known in the art.

[0067] As an alternative embodiment, a filter circuit is also provided between the connection pins of the circuit interface and the processing chip 100. The filter circuit is connected in parallel with the electrostatic protection circuit 103 and is provided at one end of the electrostatic protection circuit 103 close to the peripheral interface 102 or at one end close to the processing chip 100.

[0068] As Figure 4 shown, a first capacitor C1 and C2, as well as a first inductor L2, are also provided on the radio frequency line RF_ANT to form a filter circuit, which is connected in parallel with the TVS diode D2 for ESD of the electrostatic protection circuit 103. Theoretically, the functions of the filter circuit and the electrostatic protection circuit 103 do not interfere with each other, and there is no fixed requirement for the installation position. It can be provided at one end of the electrostatic protection circuit 103 close to the peripheral interface 102 or at one end close to the processing chip 100.

[0069] As an alternative embodiment, the filtering circuit is provided at one end of the electrostatic protection circuit 103 close to the processing chip 100; the filtering circuit includes two first capacitors and one first inductor. One end of the first inductor is connected to the electrostatic protection circuit 103, and the other end of the first inductor is connected to the peripheral interface 102; one ends of the two first capacitors are respectively connected to both ends of the first inductor, and the other ends of the two first capacitors are both grounded.

[0070] However, in this embodiment, the filtering circuit is provided at one end of the electrostatic protection circuit 103 close to the processing chip 100, in order to place the TVS diode D2 ESD of the electrostatic protection circuit 103 as close as possible to the processing chip 100, and avoid the circuit after the TVS diode D2 ESD of the electrostatic protection circuit 103 generating a static power source and causing electrostatic damage to the processing chip 100.

[0071] As Figure 4 shown, the filtering circuit includes two first capacitors C1 and C2, and one first inductor L2. One end of the first inductor L2 is connected to the TVS diode D2 ESD of the electrostatic protection circuit 103, and the other end of the first inductor L2 is connected to the peripheral interface 102 ANT1; one ends of the two first capacitors C1 and C2 are respectively connected to both ends of the first inductor L2, and the other ends of the two first inductors L2 are both grounded. It effectively filters the input radio frequency signal, facilitates the reception and processing of the subsequent processing chip 100, and also avoids damaging the processing chip 100.

[0072] As an alternative embodiment, a series resonance circuit is further provided between the circuit interface and the connection pin of the processing chip 100, and the series resonance circuit is provided at one end close to the circuit interface; the series resonance circuit includes a second capacitor and a second inductor connected in series. One end of the second inductor is connected to the peripheral interface 102, the other end of the second inductor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0073] As Figure 4 shown, a series resonance circuit is further provided between the circuit interface, which is ANT1 here, and the connection pin of the processing chip 100, which is LNA_IN here. The series resonance circuit is provided at one end close to the circuit interface; so as to perform frequency screening on the radio frequency signal input by ANT1.

[0074] The series resonance circuit includes a second capacitor C3 and a second inductor L3 connected in series. One end of the second inductor L3 is connected to the peripheral interface 102 ANT1, the other end of the second inductor L3 is connected to one end of the second capacitor C3, and the other end of the second capacitor C3 is grounded.

[0075] As an alternative embodiment, it further includes a power supply 101, which is connected to the processing chip 100 and used to supply power to the processing chip 100; an electrostatic protection circuit 103 is also provided on the circuit between the connection pins of the power supply 101 and the processing chip 100.

[0076] An electrostatic protection circuit 103 is also provided on the circuit between the connection pins of the power supply 101 and the processing chip 100. The power supply 101 is also Figure 4 VDD33 in, is connected to the processing chip 100 and used to supply power to the processing chip 100. For the connection circuit between the power supply VDD33 and the main computing chip U1 of the processing chip, as Figure 4 shown in, the circuit above the radio frequency line RF_ANT, the TVS diode D1 ESD, can be used as the corresponding electrostatic protection circuit to protect the corresponding circuit.

[0077] As an alternative embodiment, a filter circuit and decoupling capacitors are also provided between the power supply 101 and the processing chip 100; the filter circuit is connected in parallel with the electrostatic protection circuit 103 and is provided at one end of the electrostatic protection circuit 103 close to the peripheral interface 102 or at one end close to the processing chip 100; the decoupling capacitors include a plurality of third capacitors with different capacitances. One end of the third capacitor is connected to the power supply 101 and the other end is grounded; the third capacitors are arranged in sequence in descending order of capacitance between the power supply 101 and the processing chip 100, and the third capacitor with the largest capacitance is the closest to the power supply 101.

[0078] Such as Figure 4 shown, taking the circuit connected to the pin VDD3P3 of the main computing chip U1 of the circuit between the power supply 101 and the processing chip 100 as an example, a TVS diode D1 ESD is provided as the electrostatic protection circuit 103. The inductor L1, capacitors C4 and C5 form a filter circuit. The decoupling capacitors include C6 and C7. The capacitance of C6 is 10uF and the capacitance of C7 is 1uF. They are arranged in sequence in descending order between the power supply VDD33 and the main computing chip U1 of the processing chip 100, and the C6 with the largest capacitance is the closest to the power supply VDD33. Thus, multiple frequency selections are formed to only retain the required frequency signals.

[0079] As an alternative embodiment, the processing chip 100 includes a low-noise power amplifier for processing the radio frequency signals of the radio frequency antenna; the pins of the processing chip 100 include low-noise power amplifier input pins, and an inductor is also provided on the circuit between the low-noise power amplifier input pins and the low-noise power amplifier to eliminate the electrostatic voltage entering the low-noise power amplifier input pins.

[0080] The main computing chip U1 of the processing chip 100 further includes a low-noise power amplifier LNA, Figure 4Not shown in the figure, the pins of the main computing chip U1 of the processing chip 100 include a low-noise power amplifier input pin LNA_IN. An inductor is also provided on the circuit between the low-noise power amplifier input pin LNA_IN and the low-noise power amplifier LNA to eliminate the static voltage entering the low-noise power amplifier input pin.

[0081] The TVS diode combined with the electrostatic protection circuit and the inductor form a dual electrostatic protection, improving the effect of electrostatic protection and enhancing the working stability of the main computing chip U1 and the communication module.

[0082] On the other hand, the embodiment of the present application also provides an Internet of Things system, which includes the above-mentioned communication module. Therefore, this Internet of Things system includes all the technical effects of the above-mentioned communication module. Since the technical effects of the communication module have been described in detail above, they will not be elaborated here.

[0083] For the sake of convenience of description, spatial relative terms such as "above", "on top of", "on the upper surface", "above" etc. can be used here to describe the spatial position relationship between a device or feature shown in the figure and other devices or features. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation described in the figure for the device. For example, if the device in the figure is inverted, the device described as "above other devices or structures" or "on top of other devices or structures" will be positioned as "below other devices or structures" or "beneath other devices or structures" afterwards. Thus, the exemplary term "above" can include both the orientations of "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the corresponding explanations are made for the spatial relative descriptions used here.

[0084] In addition, it should be noted that the use of words such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Without additional statements, the above words have no special meanings, so they cannot be understood as limiting the protection scope of the present application.

[0085] The above are only the preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A communication module, characterized in that: It includes a processing chip (100), a peripheral interface (102), and an electrostatic protection circuit (103); The output pin of the processing chip (100) is connected to the peripheral interface (102), and the peripheral interface (102) is used to connect an external device to the processing chip (100), and the processing chip (100) controls the external device connected to the peripheral interface (102); The peripheral device interface (102) comprises a circuit interface that generates an electrostatic interference source, and the electrostatic protection circuit (103) is arranged on a circuit between the circuit interface and a connection pin of the processing chip (100); The electrostatic protection circuit (103) comprises a transient voltage suppression TVS diode, one end of the TVS diode is grounded, and the other end of the TVS diode is connected to the circuit between the circuit interface and the connection pin of the processing chip (100).

2. The communication module according to claim 1, characterized in that: There are a plurality of the peripheral interfaces (102), and all or part of the plurality of the peripheral interfaces (102) are provided with the electrostatic protection circuit (103).

3. The communication module according to claim 1, characterized in that: The TVS diode comprises a flyback TVS diode; After the flyback TVS diode reaches the breakdown voltage, the clamping voltage at both ends is pulled down to between the operating voltage and the breakdown voltage, and the difference between the clamping voltage after being pulled down and the breakdown voltage is within a preset range; The operating voltage of the flyback TVS diode is not less than the operating voltage of the circuit in which it is located, and is within a preset multiple range of the operating voltage of the circuit in which it is located.

4. The communication module according to claim 3, characterized in that: The preset multiple range is 1.2-1.

8.

5. The communication module according to claim 3, characterized in that: When the voltage signal of the circuit interface is a biased voltage signal, or the TVS diode is connected to a power supply (101), the preset range is 0.8-1.2V, and the structure of the TVS diode is a thyristor structure; When the preset range is 0-0.8V, the structure of the TVS diode is an NPNP structure or a grounded gate N-type MOS structure.

6. The communication module according to claim 3, characterized in that: The TVS diode is arranged after the electrostatic interference source on the circuit; When the peripheral device interface (102) is a circuit interface that generates an electrostatic interference source, the TVS diode is arranged at a position where the circuit interface is connected to the circuit.

7. The communication module according to claim 1, characterized in that: The circuit interface is an interface of a radio frequency input and output circuit; the peripheral interface (102) is used to directly install a radio frequency antenna, or to install a radio frequency antenna through a line interface for installing the radio frequency antenna.

8. The communication module according to claim 7, characterized in that: A filter circuit is also provided between the connection pins of the circuit interface and the processing chip (100); the filter circuit is connected in parallel with the electrostatic protection circuit (103) and is provided at one end of the electrostatic protection circuit (103) close to the peripheral interface (102) or close to one end of the processing chip (100).

9. The communication module according to claim 8, characterized in that: The filter circuit is arranged at one end of the electrostatic protection circuit (103) close to the processing chip (100); The filter circuit comprises two first capacitors and a first inductor, one end of the first inductor is connected to the electrostatic protection circuit (103), and the other end of the first inductor is connected to the peripheral interface (102); one end of the two first capacitors is respectively connected to the two ends of the first inductor, and the other ends of the two first capacitors are both grounded.

10. The communication module according to claim 9, characterized in that: A series resonant circuit is also provided between the circuit interface and the connection pin of the processing chip (100), and the series resonant circuit is provided at one end close to the circuit interface; The series resonant circuit comprises a second capacitor and a second inductor connected in series, one end of the second inductor is connected to the peripheral interface (102), the other end of the second inductor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

11. The communication module according to claim 1, characterized in that: It also includes a power supply (101), the power supply (101) being connected to the processing chip (100) and being used to supply power to the processing chip (100); The electrostatic protection circuit (103) is also provided on the circuit between the power source (101) and the connection pins of the processing chip (100).

12. The communication module according to claim 11, characterized in that: A filter circuit and a decoupling capacitor are also provided between the power supply (101) and the processing chip (100); The filter circuit is connected in parallel with the electrostatic protection circuit (103), and is arranged at an end of the electrostatic protection circuit (103) close to the peripheral interface (102), or close to an end of the processing chip (100); The decoupling capacitor comprises a plurality of third capacitors with different capacities, one end of the third capacitor being connected to the power supply (101) and the other end being grounded; the third capacitors are arranged in order from large to small in capacity, and are disposed between the power supply (101) and the processing chip (100), with the third capacitor with the largest capacity being closest to the power supply (101).

13. The communication module according to claim 7, characterized in that: The processing chip (100) comprises a low noise power amplifier, which is used to process the radio frequency signal of the radio frequency antenna; The pins of the processing chip (100) include a low noise power amplifier input pin, and an inductor is also provided on the circuit between the low noise power amplifier input pin and the low noise power amplifier to eliminate the electrostatic voltage entering the low noise power amplifier input pin.

Images