IO port multiplexing circuit

Abstract

The utility model relates to the technical field of electronic circuits, and provides an IO port multiplexing circuit, which comprises a main controller, and a first access detection module, a second access detection module and a key circuit which are connected with the main controller, a first recognition port A, a second recognition port B and a third recognition port C of a main controller are fully utilized, six input keys (S1 to S6) are connected at the same time, and the main controller controls and recognizes the states of three input / output ports, so that the key input is quickly recognized, the use number of IO ports is reduced, the flexibility of the circuit is improved, and the cost is reduced. According to the technical scheme, a plurality of key input signals can share a small number of IO ports, so that the number of required IO ports is reduced, the chip configuration requirement on the main controller is reduced, and the development and production cost is further reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a multiplexing circuit for multiple IO ports. Background Art

[0002] When designing electronic products, buttons are required to implement set functions. However, in a more complex system, there are more units that need control signals, and different buttons represent different signal inputs. Therefore, it is necessary to identify different button inputs. Currently, the conventional method is to configure an IO port for each button, and then judge different button inputs by distinguishing different IO port inputs to respond to user operation requirements.

[0003] However, in actual applications, if more than three microcontroller ports are added, it will cause excessive use of the number of identification ports of the microcontroller. In some circuit designs, it is necessary to replace the model of the microcontroller, and then increase the number of identification ports to meet the usage requirements of model identification, thus increasing the total cost of the electronic control main board. Summary of the Invention

[0004] The utility model provides a multiplexing circuit for multiple IO ports, which solves the technical problem that the existing button input recognition is limited by the number of recognition ports and requires a high microcontroller configuration, resulting in a high cost of the device.

[0005] To solve the above technical problems, the utility model provides a multiplexing circuit for multiple IO ports, including a main controller and a first access detection module, a second access detection module and a button circuit connected thereto; the main controller includes a first identification port A, a second identification port B and a third identification port C, and the first identification port A is connected to one end of the button circuit and the first access detection module; the second identification port B is connected to one end of the button circuit and the second access detection module; the third identification port C is connected to the button circuit; the other end of the first access detection module is connected to the button circuit; the other end of the second access detection module is connected to the button circuit; the button circuit includes at least one input button.

[0006] In a further embodiment, the button circuit includes a first button module and a second button module; one end of the first button module is connected to the first identification port A and the other end of the first access detection module, and the other end is connected to the second button module and the other end of the second access detection module; one end of the second button module is connected to the third identification port C, and the other end is connected to the first button module and the other end of the second access detection module.

[0007] In a further embodiment, the first button module includes input buttons S1, S2 and S3;

[0008] One end of the input button S1 is connected to the first recognition port A, and the other end is connected between the second button module and the second access detection module;

[0009] One end of the input button S2 is connected to the first access detection module, and the other end is connected between the second button module and the second access detection module;

[0010] One end of the input button S3 is connected to the first access detection module, and the other end is connected between the second button module and the second access detection module.

[0011] In a further embodiment, the second button module includes an input button S4, an input button S5, and an input button S6;

[0012] One end of the input button S4 is connected to the third recognition port C, and the other end is connected between the first button module and the second access detection module;

[0013] One end of the input button S5 is connected to the third recognition port C, and the other end is connected between the first button module and the second access detection module;

[0014] One end of the input button S6 is connected to the second recognition port B, and the other end is connected to the third recognition port C.

[0015] In a further embodiment, the first access detection module includes a first diode D1 and a second diode D2; the positive electrode of the first diode D1 is connected to the first recognition port A, and the negative electrode is connected to the input button S2; the positive electrode of the second diode D2 is connected to the input button S3, and the negative electrode is connected to the first recognition port A.

[0016] In a further embodiment, the second access detection module includes a third diode D3 and a fourth diode D4; the positive electrode of the third diode D3 is connected to the first button module and the input button S4, and the negative electrode is connected to the second recognition port B; the positive electrode of the fourth diode D4 is connected to the second recognition port B, and the negative electrode is connected to the input button S5.

[0017] In a further embodiment, the main controller is one of a microprocessor, a microcontroller, and a digital signal processor, and the first recognition port A, the second recognition port B, and the third recognition port C are all input / output ports (i.e., IO ports).

[0018] The beneficial effects of the present utility model are as follows;

[0019] (1) Make full use of the first identification port A, the second identification port B and the third identification port C of the main controller, and simultaneously connect 6 input buttons (S1 to S6). The main controller can quickly identify the button input by controlling and identifying the status of the three input / output ports, while saving the number of IO ports used, improving the flexibility of the circuit, and allowing multiple button input signals to share a small number of IO ports, thereby reducing the number of IO ports required, reducing the chip configuration requirements for the main controller, and further reducing the cost of development and production.

[0020] (2) Four diodes are used to form two groups of access detection modules, and three states are assigned to each input key, namely, whether it is connected to the corresponding identification port through the positive / negative pole of the diode. By cooperating with each other in the access detection modules, by changing the input control of any identification port and detecting the output state of other device ports, the input key that executes the key input can be determined, which not only reduces the number of components in the circuit, but also improves the stability and reliability of the circuit.

[0021] (3) A microprocessor, microcontroller, or digital signal processor that uses the original controller chip of the device to process and analyze key input signals to achieve more complex functions and operations, improve system efficiency and performance, and further save costs. Brief Description of the Figures

[0022] Figure 1 This is a system framework diagram of an IO port multiplexing circuit provided by an embodiment of the utility model;

[0023] Figure 2 This is provided by the embodiment of the utility model Figure 1 Part of the hardware circuit diagram in ;

[0024] Wherein: main controller 1; first access detection module 2; second access detection module 3; key circuit 4, first key module 41, second key module 42. Specific implementation method

[0025] The following is a detailed description of the implementation of the present invention in conjunction with the accompanying drawings. The examples are given only for illustrative purposes and cannot be understood as limiting the present invention. The accompanying drawings are only for reference and illustration purposes and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0026] An IO port multiplexing circuit provided by the embodiment of the utility model, such as Figure 1 、 Figure 2 ​​As shown in the figure, in this embodiment, it includes a main controller 1 and a first access detection module 2, a second access detection module 3, and a key circuit 4 connected thereto; the main controller 1 includes a first identification port A, a second identification port B, and a third identification port C. The first identification port A is connected to one end of the key circuit 4 and the first access detection module 2; the second identification port B is connected to one end of the key circuit 4 and the second access detection module 3; the third identification port C is connected to the key circuit 4; the other end of the first access detection module 2 is connected to the key circuit 4; the other end of the second access detection module 3 is connected to the key circuit 4; the key circuit 4 includes at least one input key.

[0027] In this embodiment, the key circuit 4 includes a first key module 41 and a second key module 42; one end of the first key module 41 is connected to the first identification port A and the other end of the first access detection module 2, and the other end is connected to the second key module 42 and the other end of the second access detection module 3; one end of the second key module 42 is connected to the third identification port C, and the other end is connected to the first key module 41 and the other end of the second access detection module 3.

[0028] In this embodiment, the first key module 41 includes input keys S1, S2, and S3;

[0029] One end of the input key S1 is connected to the first identification port A, and the other end is connected between the second key module 42 and the second access detection module 3;

[0030] One end of the input key S2 is connected to the first access detection module 2, and the other end is connected between the second key module 42 and the second access detection module 3;

[0031] One end of the input key S3 is connected to the first access detection module 2, and the other end is connected between the second key module 42 and the second access detection module 3.

[0032] In this embodiment, the second key module 42 includes input keys S4, S5, and S6;

[0033] One end of the input key S4 is connected to the third identification port C, and the other end is connected between the first key module 41 and the second access detection module 3;

[0034] One end of the input key S5 is connected to the third identification port C, and the other end is connected between the first key module 41 and the second access detection module 3;

[0035] One end of the input key S6 is connected to the second identification port B, and the other end is connected to the third identification port C.

[0036] In this embodiment, the first access detection module 2 includes a first diode D1 and a second diode D2; the positive electrode of the first diode D1 is connected to the first identification port A, and the negative electrode is connected to the input key S2; the positive electrode of the second diode D2 is connected to the input key S3, and the negative electrode is connected to the first identification port A.

[0037] In this embodiment, the second access detection module 3 includes a third diode D3 and a fourth diode D4; the positive electrode of the third diode D3 is connected to the first key module 41 and the input key S4, and the negative electrode is connected to the second identification port B; the positive electrode of the fourth diode D4 is connected to the second identification port B, and the negative electrode is connected to the input key S5.

[0038] In this embodiment, the main controller 1 is one of a microprocessor, a microcontroller, and a digital signal processor, and the first identification port A, the second identification port B, and the third identification port C are all input / output ports (i.e., IO ports).

[0039] Preferably, in this embodiment, a digital signal processor (DSP) is used to process and analyze the key input signals, and its real-time operating speed can reach tens of millions of complex instruction programs per second. Therefore, the sensitivity of key input recognition can be effectively improved.

[0040] Taking the main controller 1 as a digital signal processor as an example, the working principle of the present invention is as follows:

[0041] First, the digital signal processor outputs a high level to the first identification port A.

[0042] (1) If the second identification port B feeds back a high level to the digital signal processor; due to the unidirectional conduction of the diode, the first diode D1 conducts and the second diode D2 cuts off; therefore, it is guessed that the input key S1 or the input key S2 conducts;

[0043] At this time, the digital signal processor outputs a high level to the second identification port B, the third diode D3 cuts off, and the fourth diode D4 conducts; if the first identification port A is at a high level, it is determined that the input key S1 is pressed; if the first identification port A is at a low level, it is determined that the input key S2 is pressed.

[0044] (2) If the second identification port B feeds back a low level to the digital signal processor at this time; and when the digital signal processor outputs a high level to the second identification port B, the first identification port A is at a high level, it is determined that the input key S3 is pressed.

[0045] Second, the digital signal processor outputs a high level to the second identification port B.

[0046] (1) If the third recognition port C feeds back a high level to the digital signal processor; due to the one-way conduction of the diode, the third diode D3 is cut off and the fourth diode D4 is turned on; therefore, it is guessed that the input button S5 or the input button S6 is turned on;

[0047] At this time, the digital signal processor outputs a high level to the third recognition port C, the third diode D3 is turned on, and the fourth diode D4 is cut off; if the second recognition port B is at a high level, it is determined that the input button S4 is pressed; if the second recognition port B is at a low level, it is determined that the input button S5 is pressed.

[0048] (2) At this time, if the third recognition port C feeds back a low level to the digital signal processor; and when the digital signal processor outputs a high level to the third recognition port C and the second recognition port B is at a high level, it is determined that the input button S4 is pressed.

[0049] The beneficial effects of the present utility model are as follows;

[0050] (1) The first recognition port A, the second recognition port B, and the third recognition port C of the main controller 1 are fully utilized, and 6 input buttons (S1 to S6) are connected at the same time. The main controller 1 controls and identifies the states of 3 input / output ports, while quickly identifying button inputs, saving the number of used IO ports, improving the flexibility of the circuit, and enabling multiple button input signals to share a small number of IO ports, thereby reducing the required number of IO ports (reducing the chip configuration requirements for the main controller 1), and further reducing the development and production costs.

[0051] (2) Four diodes are used to form two groups and connected to the detection module. Three states of whether each input button is connected to the corresponding recognition port through the positive / negative pole of the diode are assigned. Through the pairwise cooperation of the access detection module, by changing the input control of any recognition port and detecting the output state of other device ports, the input button that executes the button input can be determined. This not only reduces the number of components in the circuit, but also improves the stability and reliability of the circuit.

[0052] (3) One of a microprocessor, a microcontroller, and a digital signal processor uses the original controller chip of the device to process and analyze the button input signal to implement more complex functions and operations, improve the efficiency and performance of the system, and further save costs.

[0053] The above embodiments are the preferred embodiments of the present utility model, but the embodiments of the present utility model are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present utility model shall be equivalent replacement methods and are all included in the protection scope of the present utility model.

Claims

1. An IO port multiplexing circuit, characterized in that: It includes a main controller and a first access detection module, a second access detection module and a key circuit connected thereto; the main controller includes a first identification port A, a second identification port B and a third identification port C, the first identification port A is connected to the key circuit and one end of the first access detection module; the second identification port B is connected to the key circuit and one end of the second access detection module; the third identification port C is connected to the key circuit; the other end of the first access detection module is connected to the key circuit; the other end of the second access detection module is connected to the key circuit; the key circuit includes at least one input key.

2. An IO port multiplexing circuit as claimed in claim 1, characterized in that: The key circuit includes a first key module and a second key module; one end of the first key module is connected to the first identification port A and the other end of the first access detection module, and the other end is connected to the second key module and the other end of the second access detection module; one end of the second key module is connected to the third identification port C, and the other end is connected to the first key module and the other end of the second access detection module.

3. An IO port multiplexing circuit as claimed in claim 2, characterized in that: The first button module includes an input button S1, an input button S2 and an input button S3; One end of the input button S1 is connected to the first identification port A, and the other end is connected between the second button module and the second access detection module; One end of the input button S2 is connected to the first access detection module, and the other end is connected between the second button module and the second access detection module; One end of the input button S3 is connected to the first access detection module, and the other end is connected between the second button module and the second access detection module.

4. An IO port multiplexing circuit as claimed in claim 2, characterized in that: The second button module includes an input button S4, an input button S5 and an input button S6; One end of the input button S4 is connected to the third identification port C, and the other end is connected between the first button module and the second access detection module; One end of the input button S5 is connected to the third identification port C, and the other end is connected between the first button module and the second access detection module; One end of the input button S6 is connected to the second identification port B, and the other end is connected to the third identification port C.

5. The IO port multiplexing circuit according to claim 3, characterized in that: The first access detection module includes a first diode D1 and a second diode D2; the anode of the first diode D1 is connected to the first identification port A, and the cathode is connected to the input key S2; the anode of the second diode D2 is connected to the input key S3, and the cathode is connected to the first identification port A.

6. An IO port multiplexing circuit as claimed in claim 4, characterized in that: The second access detection module includes a third diode D3 and a fourth diode D4; the anode of the third diode D3 is connected to the first button module and the input button S4, and the cathode is connected to the second identification port B; the anode of the fourth diode D4 is connected to the second identification port B, and the cathode is connected to the input button S5.

7. The IO port multiplexing circuit according to claim 1, characterized in that: The main controller is one of a microprocessor, a microcontroller, and a digital signal processor. The first identification port A, the second identification port B, and the third identification port C are all input / output ports.

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