Semiconductor device
By designing annular waveguides and input/output waveguides of different materials in semiconductor devices and controlling their spacing through the sub-layer thickness of the dielectric layer, the shortcomings of existing silicon photonic components in optical signal transmission efficiency and coupling characteristics are solved, and more efficient optical coupling and loss characteristics are achieved.
Patent Information
- Application Number
- CN202421605030.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-11
- Filing Date
- 2024-07-08
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2034-07-08
AI Technical Summary
Existing silicon photonic components fail to meet all requirements in some applications, especially in terms of the transmission efficiency and coupling characteristics of optical signals.
A semiconductor device is designed including an annular waveguide embedded in a dielectric layer and an input/output waveguide optically coupled to the annular waveguide in a vertical manner. The annular waveguide and the input/output waveguide are made of different materials and the spacing between them is controlled by the sub-layer thickness of the dielectric layer, thereby improving the optical coupling efficiency.
Through the vertical coupling mechanism, the coupling efficiency and loss characteristics of the optical device are improved, and the performance is better than that of the horizontal coupling mechanism.
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Figure CN222896284U_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the utility model relate to a semiconductor device, and in particular to a semiconductor device including an optical ring waveguide. Background Art
[0002] Silicon photonics, which use silicon waveguides as interconnects to carry optical signals, are compatible with the fabrication of integrated circuits (ICs). Silicon photonics offer reduced power consumption, higher efficiency, lower latency, and higher bandwidth than data transmission via conductive wiring. Although existing silicon photonics are generally adequate for their intended purposes, they are not satisfactory in all aspects. Utility Model Content
[0003] An embodiment of the utility model provides a semiconductor device comprising: a dielectric layer comprising a first material, a ring waveguide embedded in the dielectric layer, and an input / output waveguide embedded in the dielectric layer and vertically optically coupled to the ring waveguide. The ring waveguide comprises a second material different from the first material, and the input / output waveguide comprises a third material different from the first material and the second material.
[0004] An embodiment of the utility model provides a semiconductor device including an optical device and an optical input / output portion disposed on a semiconductor substrate and embedded in a dielectric layer overlying the semiconductor substrate. The optical device includes: a first waveguide arranged in a loop and a second waveguide optically coupled to the first waveguide and including a material different from that of the first waveguide. The vertical distance between the first waveguide and the second waveguide is the thickness of a portion of the dielectric layer sandwiched between the first waveguide and the second waveguide. The optical input / output portion is adjacent to the optical device in the lateral direction and is optically coupled to the second waveguide.
[0005] Based on the above, the input / output waveguide and the ring waveguide are located in different sublayers of the dielectric layer, so the spacing between the input / output waveguide and the ring waveguide can be well controlled by setting a sublayer with a suitable thickness between the input / output waveguide and the ring waveguide. In this way, the coupling efficiency of the optical device can be improved. In addition, the input / output waveguide and the ring waveguide located in different sublayers are optically coupled through a vertical coupling mechanism, and compared with the horizontal coupling mechanism, the vertical coupling mechanism has better coupling characteristics and loss characteristics.
[0006] In order to make the above features and advantages of the embodiments of the present invention more obvious and easy to understand, embodiments are specifically cited below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1A and Figure 1B Schematic cross-sectional views showing variations of semiconductor structures including optical devices according to some embodiments.
[0008] Figure 2A A schematic top view of an optical device according to some embodiments is shown.
[0009] Figure 2B According to some embodiments, Figure 2A Schematic cross-sectional view of the optical device taken along line 2B-2B in FIG.
[0010] Figure 2C According to some embodiments, Figure 2A A schematic cross-sectional view of a variant of the optical device taken along line 2B-2B in FIG.
[0011] Figure 3A A schematic top view of an optical device according to some embodiments is shown.
[0012] Figure 3B According to some embodiments, Figure 3A Schematic cross-sectional view of the optical device taken along line 3B-3B in FIG.
[0013] Figure 3C According to some embodiments, Figure 3A A schematic cross-sectional view of a variant of the optical device taken along line 3B-3B in FIG.
[0014] FIG. 4A to FIG. 4C A schematic top view showing a variation of an optical device according to some embodiments.
[0015] Figure 5A A schematic top view of an optical device according to some embodiments is shown.
[0016] Figure 5B According to some embodiments, Figure 5A Schematic cross-sectional view of the optical device taken along line 5B-5B in FIG.
[0017] Fig. 6A A schematic top view of an optical device according to some embodiments is shown.
[0018] Figure 6B According to some embodiments, Fig. 6A Schematic cross-sectional view of the optical device taken along line 6B-6B in FIG.
[0019] Fig. 7A A schematic top view of an optical device according to some embodiments is shown.
[0020] Figure 7B According to some embodiments, Fig. 7A Schematic cross-sectional view of the optical device taken along line 7B-7B in FIG.
[0021] Fig. 8A A schematic top view of an optical device according to some embodiments is shown.
[0022] Figure 8B According to some embodiments, Fig. 8A Schematic cross-sectional view of the optical device taken along line 8B-8B in FIG.
[0023] Fig. 9A A schematic top view of an optical device according to some embodiments is shown.
[0024] Fig. 9B According to some embodiments, Fig. 9A Schematic cross-sectional view of the optical device taken along line 9B-9B in FIG.
[0025] Fig. 9C According to some embodiments, Fig. 9A Schematic cross-sectional view of the optical device taken along line 9C-9C in FIG.
[0026] Fig. 10A A schematic top view of an optical device according to some embodiments is shown.
[0027] Fig. 10B According to some embodiments, Fig. 10A A schematic cross-sectional view of the optical device taken along line 10B-10B in FIG.
[0028] Fig.11 is a flow chart illustrating steps in a method of making an optical device according to some embodiments.
[0029] Description of Reference Numerals
[0030] 2B-2B, 3B-3B, 5B-5B, 6B-6B, 7B-7B, 8B-8B, 9B-9B, 9C-9C, 10B-10B: line; 10A: semiconductor device; 11: semiconductor substrate; 11a: active surface; 11b: back surface; 12: active device; 13, 13B: optical device; 13CL: coupling length; 13CR, 23CR, 23CR': coupling region; 14, 14B: optical input / output (I / O) part; 15: interlayer dielectric (ILD) layer / dielectric layer; 16: internal connection structure ; 16D: internal connection dielectric layer / dielectric layer; 16M: internal connection wiring; 23CL: coupling length; 131, 131A, 131D, 231, 231A, 233-4: ring waveguide; 131s: bottom surface; 131T, 133T, 231T, 233T: thickness; 131W, 133W, 135W, 231W, 233W, 239W: width; 133-1, 133-2, 233-1, 233-1D, 233-1D', 233-2, 233-2D, 233-2D', 233 -3: I / O waveguide; 133I: input end; 133O: output end; 133O': output; 133s: top surface; 135: dielectric; 160: conductive feature; 161: first electrode / first group; 162: second electrode / second group; 233D: doped region; 233L: length; 233N, 233N', 1311N: second doped region / doped region; 233N1, 233P1, 233RP: first segment; 233N2, 233P2, 233RN: second segment; 233N3: third undoped region; 233P , 233P', 1311P: first doped region / doped region; 233P3: first undoped region; 233R: rib region; 233R3: second undoped region; 233TW: total width; 239', 239", 239-1, 239-2: heating component; 500: method; 502, 504: steps; 1311, 1311', 2311: vertical segment; 1312, 2312: arc segment; 2331: first curved segment; 2332: second curved segment; S1: spacing; TR1: first trench; TR2: second trench. DETAILED DESCRIPTION
[0031] The following disclosure provides many different embodiments or examples for implementing different features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are only examples and are not intended to limit the scope of the present disclosure. For example, in the following description, a first feature is formed "above" or "on" a second feature, which may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature is formed between the first feature and the second feature so that the first feature and the second feature are not in direct contact. In addition, the present disclosure may reuse component numbers and / or letters in various examples. Such repetition is for the purpose of simplifying and clearly describing the present disclosure, rather than for defining the relationship between various embodiments and / or configurations.
[0032] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one component or feature to another (other) component or feature as shown in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be in other orientations (rotated 90 degrees or at other orientations) and the spatially relative descriptors used therein may be interpreted in a similar manner.
[0033] The ring waveguide may be included in a semiconductor device for an optical communication system and may be implemented in an optical device having an input / output (I / O) waveguide. For example, the ring waveguide includes a closed-loop waveguide and an I / O waveguide, the closed-loop waveguide serving as a resonator, and the I / O waveguide is optically coupled and horizontally coupled to the resonator in a coupling region for inputting signal light into the resonator and outputting signal light from the resonator. When light is coupled from the input waveguide into the resonator, the intensity of the light gradually increases due to constructive interference in the closed-loop resonator, and the light is output from the resonator to the output waveguide. The input waveguide and the output waveguide may be a single waveguide located at opposite ends or may be two separate waveguides disposed at opposite sides of the resonator. The optical resonator may operate as an optical filter because only selected wavelengths will be in a resonant state within the closed loop. In some examples, the ring waveguide may form a micro-ring modulator (MRM) for modulating the phase of an optical signal traveling within the waveguide. In some examples, the ring waveguide may form wavelength division multiplexing that multiplexes optical signals onto an optical fiber using light of different wavelengths. Silicon-on-insulator (SOI) photonic devices having silicon ring waveguides and silicon I / O waveguides formed in the same layer have been observed to be sensitive to the silicon patterning process, as the coupling efficiency is affected by the non-uniform gap spacing between the ring waveguide and the I / O waveguide due to patterning process variations.
[0034] An embodiment of the utility model provides a semiconductor structure including an optical device, wherein the optical device includes a ring waveguide and one or more input / output (I / O) waveguides optically coupled to the ring waveguide in a vertical manner. For example, the ring waveguide and the I / O waveguide are made of different materials and are located in different layers. By configuring the ring waveguide and the I / O waveguide of different materials and arranging the ring waveguide and the I / O waveguide at different layers, the vertical gap distance between the ring waveguide and the I / O waveguide can be well controlled, thereby improving the coupling efficiency of the optical device. The gap spacing between the ring waveguide and the I / O waveguide is determined by the thickness of the dielectric material sandwiched between the ring waveguide and the I / O waveguide. This vertical coupling scheme can provide flexibility in the design of the ring waveguide and the I / O waveguide to form an optical communication system. In addition, compared with the horizontal coupling mechanism, the vertical coupling mechanism can have better coupling characteristics and loss characteristics.
[0035] Figure 1A and Figure 1BSchematic cross-sectional views of variations of semiconductor structures including optical devices according to some embodiments are shown. Throughout the various views and exemplary embodiments, the same reference numerals are used to identify the same components. Figure 1A , the semiconductor device 10A includes a doped or undoped semiconductor substrate 11 (e.g., silicon) or an active layer of a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate 11 may include, for example, other semiconductor materials such as germanium; compound semiconductors including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; or combinations thereof. Other substrates such as a multi-layered substrate or a gradient substrate may also be used. The semiconductor substrate 11 may include an active surface 11a (also referred to as a front side) and a back surface 11b (also referred to as a back side).
[0036] In some embodiments, various devices are formed at / on the active surface 11a of the semiconductor substrate 11. An inter-layer dielectric (ILD) layer 15 may be disposed on the active surface 11a of the semiconductor substrate 11, wherein the ILD layer 15 surrounds and covers the devices. The ILD layer 15 may include one or more dielectric sublayers formed of materials such as phospho-silicate glass (PSG), boro-silicate glass (BSG), boron-doped phospho-silicate glass (BPSG), undoped silicate glass (USG), similar materials, or combinations thereof. The devices may include active devices 12 (e.g., transistors, diodes, etc.) and at least one optical device 13. The active device 12 and the optical device 13 may be formed at the same level in the ILD layer 15 by a front-end-of-line (FEOL) process. In some embodiments, the devices further include passive devices (e.g., capacitors, resistors, etc.; not shown) or the like. In some embodiments, an optical input / output (I / O) portion 14 is disposed on the active surface 11a of the semiconductor substrate 11, and the optical I / O portion 14 is optically coupled to the optical device 13. For example, the optical I / O portion 14 that is laterally adjacent to the optical device 13 is formed by a FEOL process. The optical I / O portion 14 may be or include a grating coupler, an edge coupler, or a coupler for inputting signal light into the optical device 13 and outputting signal light from the optical device 13.
[0037] In some embodiments, an interconnect structure 16 is formed on the semiconductor substrate 11, and the interconnect structure 16 interconnects one or more devices to form a functional circuit. For example, the functional circuit includes a logic circuit, a memory circuit, a sense amplifier, a controller, an input / output circuit, an image sensor circuit, the like, or a combination thereof. The interconnect structure 16 may include an interconnect dielectric layer 16D and an interconnect wiring 16M embedded in the interconnect dielectric layer 16D, and may be formed by a back-end-of-line (BEOL) process. The interconnect dielectric layer 16D may include a low-k dielectric material; a polymer material, such as polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB) or a similar polymer material; a nitride; an oxide, such as silicon oxide, PSG, BSG, BPSG or a combination thereof. The interconnect wiring 16M may include conductive materials such as solder, copper, aluminum, gold, nickel, silver, palladium, tin, similar materials, or combinations thereof. The interconnect wiring 16M includes conductive lines, vias, conductive pads, and other conductive features that are electrically coupled to one or more devices (e.g., active device 12).
[0038] In some embodiments, the bottommost via of the interconnect wiring 16M electrically and physically contacts the active device 12. In some embodiments, the size of the interconnect wiring 16M increases from bottom to top. The interconnect wiring 16M can be coupled to the optical device 13 as FIG. 6A to FIG. 10B As another option, the internal connection wiring 16M is not coupled to the optical device 13, and therefore, the portion of the internal connection wiring that falls on the optical device 13 is shown in dashed lines to indicate that it may or may not exist. It should be noted that Figure 1A The components in the embodiment are provided for illustration purposes only and other embodiments may utilize fewer components or additional components. In some embodiments, the semiconductor device 10A, in whole or in part, acts as an I / O interface between optical signals and electrical signals in a photonic system. The semiconductor device 10A described herein may be considered a system-on-chip (SoC) device or a system-on-integrated-circuit (SoIC) device.
[0039] Reference Figure 1B And refer to Figure 1A, the semiconductor device 10B is similar to the semiconductor device 10A, except that the optical device 13B and the optical I / O portion 14B optically coupled to the optical device 13B are disposed above the active device 12. The optical device 13B and the optical I / O portion 14B may be embedded in the interconnect dielectric layer 16D and may be formed by a BEOL process. The interconnect wiring 16M may be coupled to the optical device 13B as FIG. 6A to FIG. 10B 160 is shown in the embodiment of the present invention. Alternatively, the interconnect wiring 16M is not coupled to the optical device 13B, and therefore, the portion of the interconnect wiring that falls on the optical device 13B is shown in dotted lines to indicate that it may or may not exist. The optical device 13 / 13B can be formed from semiconductor materials and dielectric materials using integrated circuit (IC) processes. This enables one or more of the optical devices 13 / 13B to be co-located on the semiconductor substrate 11 with the integrated circuit system to provide optical phase shifting, signal routing, switching, filtering, detection, etc. capabilities. Please refer to the attached FIG. 2A to FIG. 10B The optical device 13 / 13B is explained in more detail.
[0040] Figure 2A shows a schematic top view of an optical device according to some embodiments, Figure 2B According to some embodiments, Figure 2A A schematic cross-sectional view of the optical device taken along line 2B-2B in FIG. Figure 2C According to some embodiments, Figure 2A A schematic cross-sectional view of a variant of the optical device taken along line 2B-2B in FIG. FIG. 2A to FIG. 2C The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B An optical device 13B of a semiconductor device 10B is shown in FIG.
[0041] Reference FIG. 2A to FIG. 2B And refer to Figure 1A to Figure 1B, the ring waveguide 131 (also referred to as a microring resonator or an optical resonator) is optically coupled to at least one I / O waveguide (e.g., 133-1 and / or 133-2). In some embodiments, the I / O waveguides 133-1 and 133-2 are disposed at opposite sides of the ring waveguide 131 and are optically coupled to the ring waveguide 131. The I / O waveguide 133-2 is shown in dotted lines to indicate that it may or may not exist. The I / O waveguides 133-1 and / or 133-2 may be used as input and output of light of various wavelengths into and out of the ring waveguide 131. In a top view, the region where the ring waveguide 131 overlaps the I / O waveguides 133-1 and 133-2 may be considered an optical coupling region. In some embodiments in which the ring waveguide 131 and the I / O waveguides 133-1 and 133-2 are included in the optical device 13 of the semiconductor device 10A, the ring waveguide 131 and the I / O waveguides 133-1 and 133-2 are embedded in the ILD layer 15. In some embodiments in which the ring waveguide 131 and the I / O waveguides 133-1 and 133-2 are included in the optical device 13B of the semiconductor device 10B, the ring waveguide 131 and the I / O waveguides 133-1 and 133-2 are embedded in the interconnect dielectric layer 16D.
[0042] In some embodiments in which a single I / O waveguide 133-1 (or 133-2) is optically coupled to the ring waveguide 131, opposite ends of the I / O waveguide 133-1 provide input and output to the ring waveguide 131, respectively. For example, when light that meets the resonance condition enters the I / O waveguide 133-1 at the input end 133I and passes through the ring waveguide 131, the intensity of the light gradually increases due to constructive interference in the ring waveguide 131, and then the light is output at the output end 133O. For example, the optical I / O portion 14 (such as Figure 1A to Figure 1B 133-2) is optically coupled to an input end 133I. In some embodiments where two I / O waveguides (133-1 and 133-2) are optically coupled to the ring waveguide 131, the I / O waveguide 133-1 provides an input and an output to / from the ring waveguide 131, and the I / O waveguide 133-2 provides another output 133O' to the ring waveguide 131. The ring waveguide 131 and the I / O waveguides 133-1 and / or 133-2 can operate as an optical filter because only light of a specific wavelength can resonate in the ring waveguide 131.
[0043] The ring waveguide 131 may be arranged in a loop. In the illustrated embodiment, the ring waveguide 131 is a closed-loop waveguide having a circular / ring-shaped top view shape. The I / O waveguide 133-1 and / or 133-2 may be a vertical waveguide or a linear waveguide. Depending on the optical requirements and product requirements, other shapes of the ring waveguide 131 and the I / O waveguides 133-1 and 133-2 may be used. The resonant wavelength may be changed by increasing (or decreasing) the radius of the ring waveguide 131 and / or the vertical distance between the ring waveguide 131 and the I / O waveguides 133-1 and / or 133-2, and the ring waveguide 131 used as an optical filter may be considered to be tunable. In some embodiments, the ring waveguide 131 has a width 131W ranging from about 0.1 microns to about 1 micron. The I / O waveguide 133-1 and / or 133-2 may have a width 133W greater than the width 131W of the ring waveguide 131. For example, the width 133W of the I / O waveguides 133-1 and / or 133-2 is in the range of about 0.1 microns and about 5 microns. The I / O waveguide 133-1 and the I / O waveguide 133-2 may have substantially the same width 133W or may have different widths.
[0044] In some embodiments, the ring waveguide 131 and the I / O waveguides (133-1 and 133-2) are made of different materials. For example, the ring waveguide 131 is made of a semiconductor material such as silicon. Other semiconductor materials (such as group III materials, group V materials, compound semiconductors, alloy semiconductors, or combinations thereof) may also be used. The I / O waveguides (133-1 and 133-2) may be made of a dielectric material having a dielectric constant different from that of the ILD layer 15 (in the embodiment of the semiconductor device 10A) or different from that of the interconnect dielectric layer 16D (in the embodiment of the semiconductor device 10B). The I / O waveguides 133-1 and 133-2 may be made of the same dielectric material. In an alternative embodiment, the I / O waveguides 133-1 and 133-2 are made of different dielectric materials. For example, the I / O waveguides (133-1 and / or 133-2) may be made of a nitride such as silicon nitride. Other dielectric materials (e.g., silicon oxide, silicon oxynitride, silicon carbon nitride, silicon carbon oxynitride, similar materials, or suitable dielectric materials that provide reduced thermos-optic effects) may also be used. The performance of the ring waveguide is sensitive to temperature changes. In some embodiments, the material of the I / O waveguide 133-1 (or 133-2) has a higher thermal conductivity than the material of the ring waveguide 131, and when heat is applied, the thermal impact on the ring waveguide 131 is less than the thermal impact on the I / O waveguide 133-1 (or 133-2).
[0045] In some embodiments, silicon nitride on insulator can be used to form I / O waveguides (133-1 and 133-2) of integrated optical devices due to reduced thermo-optical effects and sensitivity to waveguide variations. For example, the ring waveguide 131 and the I / O waveguides (133-1 and 133-2) are formed by patterning silicon nitride integrated onto a silicon-on-insulator (SOI) substrate. In some embodiments, forming the ring waveguide 131 and the I / O waveguides (133-1 and 133-2) includes: providing an SOI substrate, the SOI substrate including a silicon base layer, an oxide layer overlying the silicon base layer, and a silicon layer overlying the oxide layer; patterning the silicon layer to form a ring waveguide; removing the silicon base layer; forming a silicon nitride layer on the side of the oxide layer covered by the silicon base layer; patterning the silicon nitride layer to form an I / O waveguide; covering the I / O waveguide with a dielectric material (e.g., an ILD layer or an interconnect dielectric layer); and disposing a semiconductor substrate on the dielectric material.
[0046] Still refer to Figure 2B And refer to Figure 2A , the ring waveguide 131 and the I / O waveguide 133-1 optically coupled to each other in a vertical manner may be located in different dielectric sublayers. In some embodiments, the ring waveguide 131 is disposed above the I / O waveguide 133-1 and is spaced apart from the I / O waveguide 133-1. Figure 2B In the coupling region shown in the cross-sectional view of FIG. 1 , the ring waveguide 131 overlaps the I / O waveguide 133-1. In some embodiments, the ring waveguide 131 has a thickness 131T ranging from about 0.1 microns to about 1 micron. The I / O waveguide 133-1 may have a thickness 133T ranging from about 0.1 microns to about 1 micron. In some embodiments, the I / O waveguide 133-1 is thicker than the ring waveguide 131. Alternatively, the ring waveguide 131 has substantially the same thickness as the I / O waveguide 133-1.
[0047] In some embodiments of the semiconductor device 10A, the ILD layer 15 includes a plurality of sublayers shown in dashed lines, the ring waveguide 131 is embedded in an upper sublayer away from the semiconductor substrate 11, and the I / O waveguide 133-1 is embedded in a lower sublayer close to the semiconductor substrate 11, wherein the ring waveguide 131 is spatially separated from the I / O waveguide 133-1 by the ILD layer 15. One or more sublayers may be disposed between the upper sublayer and the lower sublayer. Similarly, in some embodiments of the semiconductor device 10B, the ring waveguide 131 embedded in the upper sublayer of the interconnect dielectric layer 16D is spatially separated from the I / O waveguide 133-1 embedded in the lower sublayer of the interconnect dielectric layer 16D by one or more sublayers of the interconnect dielectric layer 16D.
[0048] The coupling coefficient may depend on the gap (or vertical distance in the illustrated embodiment) between the I / O waveguide 133-1 and the ring waveguide 131. For example, the I / O waveguide 133-1 and the ring waveguide 131 have a non-zero spacing S1 therebetween, wherein the spacing S1 is the thickness of the portion of the ILD layer 15 (or the interconnect dielectric layer 16D) sandwiched between the I / O waveguide 133-1 and the ring waveguide 131 in the vertical direction. The spacing S1 may be measured between the top surface 133s of the I / O waveguide 133-1 and the bottom surface 131s of the ring waveguide 131. For example, the spacing S1 is in the range of about 0.01 microns and about 5 microns. The I / O waveguide 133-2 is optionally located in the same sublayer as the I / O waveguide 133-1 and may have the same (or similar) size as the I / O waveguide 133-1. The spacing between the I / O waveguide 133-2 and the ring waveguide 131 may be substantially equal to the spacing S1. Since the I / O waveguide 133-1 and the ring waveguide 131 are located in different sublayers of a dielectric layer (e.g., an ILD layer or an interconnect dielectric layer), the spacing S1 between the I / O waveguide and the ring waveguide may be well controlled by providing a sublayer with a suitable thickness between the I / O waveguide 133-1 and the ring waveguide 131. In this way, the coupling efficiency of the optical device may be improved. In addition, the I / O waveguide and the ring waveguide located in different sublayers are optically coupled through a vertical coupling mechanism, which has better coupling characteristics and loss characteristics than a horizontal coupling mechanism.
[0049] Reference Figure 2C And refer to Figure 2A and Figure 2B , except that a medium 135 is provided in the coupling region and the medium 135 is sandwiched between the I / O waveguide 133-1 and the ring waveguide 131 in the vertical direction, Figure 2C The structure in the cross-sectional view is similar to Figure 2BThe structure in the cross-sectional view of FIG. The medium 135 and the ring waveguide 131 may be covered laterally by the ILD layer 15 (in the embodiment of the semiconductor device 10A) or the interconnect dielectric layer 16D (in the embodiment of the semiconductor device 10B). The material of the medium 135 may affect the optical coupling and transmission of light waves. In some embodiments, the medium 135 is made of a dielectric material having a dielectric constant different from that of the I / O waveguide 133-1 and also different from that of the ILD layer 15 (in the embodiment of the semiconductor device 10A) or the interconnect dielectric layer 16D (in the embodiment of the semiconductor device 10B). Depending on optical requirements and product requirements, the medium 135 may be a high refractive index medium or may be a relatively low refractive index medium (i.e., air / vacuum / other gas with a refractive index of about 1 in the gap). In some embodiments, the medium 135 is a cavity between the I / O waveguide 133-1 and the ring waveguide 131. In cross section, the medium 135 may have a width 135W that is smaller than the width of the ring waveguide 131 and also smaller than the width of the I / O waveguide 133-1. In alternative embodiments, the width 135W of the medium 135 is substantially equal to the width of the ring waveguide 131 or the width of the I / O waveguide 133-1.
[0050] Figure 3A shows a schematic top view of an optical device according to some embodiments, Figure 3B According to some embodiments, Figure 3A A schematic cross-sectional view of the optical device taken along line 3B-3B in FIG. Figure 3C According to some embodiments, Figure 3A A schematic cross-sectional view of a variant of the optical device taken along line 3B-3B in FIG. FIG. 3A to FIG. 3C The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in these embodiments represent FIG. 2A to FIG. 2C The same components as in the embodiments shown.
[0051] Reference FIG. 3A to FIG. 3B And refer to Figure 2A , in addition to the materials and dimensions of the ring waveguide 231 and the I / O waveguides 233-1 and 233-2, Figure 3A The structure shown is similar to Figure 2AThe structure shown. For example, the ring waveguide 231 is made of a dielectric material, and the I / O waveguide 233-1 (and / or 233-2) may be made of a semiconductor material. For example, the ring waveguide 231 is made of a nitride-containing material such as silicon nitride. Other dielectric materials (such as silicon oxide, silicon oxynitride, silicon carbonitride, silicon carbon oxynitride, similar materials, or suitable dielectric materials that provide reduced thermo-optical effects) may also be used. The I / O waveguide 233-1 (and / or 233-2) may be made of silicon or other semiconductor materials (such as group III materials, group V materials, compound semiconductors, alloy semiconductors, or similar materials). The ring waveguide 231 may have a width 231W that is larger than the width 233W of the I / O waveguide 233-1 (and / or 233-2). In some embodiments, the width 231W of the ring waveguide 231 is in the range of about 0.1 microns to about 5 microns. The width 233W of the I / O waveguides 233 - 1 and / or 233 - 2 is in the range of about 0.1 microns and about 1 micron.
[0052] Still refer to Figure 3B And refer to Figure 3A and Figure 2B Except for the sizes of the ring waveguide 231 and the I / O waveguide 233-1 (or 233-2), the ring waveguide 231 and the I / O waveguide 233-1 (or 233-2) located in different layers may be similar to Figure 2B 1 and 2. The ring waveguide 131 and the I / O waveguide 133-1 described in the drawings are shown in FIG. 2. For example, the ring waveguide 231 has a thickness 231T that is greater than the thickness 233T of the I / O waveguide 233-1 (or 233-2). As another option, the ring waveguide 231 and the I / O waveguide 233-1 (or 233-2) have substantially the same thickness. The spacing S1 between the I / O waveguide 233-1 (or 233-2) and the ring waveguide 231 is non-zero. The spacing S1 can be controlled by the thickness of a portion of a dielectric layer (e.g., an ILD layer 15 or an interconnect dielectric layer 16D) sandwiched between the I / O waveguide 233-1 (or 233-2) and the ring waveguide 231 in the vertical direction.
[0053] Reference Figure 3C And refer to Figure 3B and Figure 2C , except that the medium 135 is sandwiched between the I / O waveguide 233-1 (or 233-2) and the ring waveguide 231 in the vertical direction, Figure 3C The structure shown is similar to Figure 3B The structure shown. The medium 135 is similar to Figure 2C The medium 135 described in the description will not be repeated in detail for the sake of brevity.
[0054] FIG. 4A to FIG. 4CA schematic top view showing a variation of an optical device according to some embodiments. FIG. 4A to FIG. 4C The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0055] Reference Figure 4A And refer to Figure 2A , in addition to the top view of the ring waveguide, Figure 4A The structure shown is similar to Figure 2A The structure shown. For example, the shape of the ring waveguide 131A in a top view is oval or elliptical. Other suitable closed loop shapes can also be used. The ring waveguide 131A may include a vertical segment 1311 and an arc segment 1312 connected to the vertical segment 1311, wherein the vertical segment 1311 overlapping the I / O waveguide is used to couple light from the I / O waveguide, and the arc segment 1312 is used to change the direction of light from / to the vertical segment 1311. Figure 2A The ring waveguide 131 shown may only include arc segments directly connected to each other, rather than coupling light through vertical segments. It should be understood that the coupling length will affect the optical coupling. In the embodiment shown, compared to Figure 2A For the circular ring waveguide 131 in FIG. 1 , the coupling length 13CL and the coupling region 13CR are increased. The resonance wavelength can be changed by increasing (or decreasing) the radius of the arc segment, and the ring waveguide 131A used as an optical filter can be considered tunable. In a top view, the ring waveguide 131A can have a substantially uniform width, wherein the range of the width of the ring waveguide 131A can be similar to Figure 2A The cross-sectional view of the coupling region between the ring waveguide 131A and the I / O waveguide 133-1 (or 133-2) can be compared with Figure 2B (or alternative embodiments Figure 2C ) is the same as the cross-sectional view described in ).
[0056] Reference Figure 4B And refer to Figure 3A , in addition to the top view of the ring waveguide, Figure 4B The structure shown is similar to Figure 3A The structure shown. For example, the shape of the ring waveguide 231A in top view is oval or elliptical. Other suitable closed loop shapes can also be used. The ring waveguide 231A may include a vertical segment 2311 and an arc segment 2312 connected to the vertical segment 2311, wherein the vertical segment 2311 overlapping the I / O waveguide is used to couple light from the I / O waveguide, and the arc segment 2312 is used to change the direction of light from / to the vertical segment 2311. Figure 3AThe ring waveguide 231 shown may only include arc segments directly connected to each other, rather than coupling light through vertical segments. Figure 3A For the circular ring waveguide 231A in FIG. 1 , the coupling length 23CL and the coupling region 23CR are increased. In a top view, the ring waveguide 231A may have a substantially uniform width, wherein the range of the width of the ring waveguide 231A may be similar to Figure 3A The cross-sectional view of the coupling region between the ring waveguide 231A and the I / O waveguide 233-1 (or 233-2) can be compared with Figure 3B (or alternative embodiments Figure 3C ) is the same as the cross-sectional view described in ).
[0057] Reference Figure 4C and Figure 3A , in addition to the shape of the I / O waveguide, Figure 4B The structure shown is similar to Figure 3A The structure shown. For example, the I / O waveguide 233-3 includes a first curved segment 2331 and a second curved segment 2332 connected to the opposite end of the first curved segment 2331, wherein the first curved segment 2331 is directly below the ring waveguide 231 and conformally overlaps with the ring waveguide 231 in the coupling region 23CR'. In some embodiments, the opposite ends of the first curved segment 2331 connected to the second curved segment 2332 are regarded as inflection points, wherein the first curved segment 2331 is a curve that is concave upward, and the second curved segment 2332 is a curve that is concave downward. In an alternative embodiment, the first curved segment 2331 is a curve that is concave downward, and the second curved segment 2332 is a curve that is concave upward. First and second curved segments of other shapes may also be used. The length of the first curved segment 2331 in the coupling region 23CR' may be appropriately set depending on optical requirements and product requirements. It should be understood that, if FIG. 4A to FIG. 4C The length of the coupling region shown is not necessarily drawn to scale, but is shown for illustration purposes. In top view, the ring waveguide 231A may have a substantially uniform width, wherein the width of the ring waveguide 231A may range similar to Figure 3A The cross-sectional view of the coupling region between the ring waveguide 231 and the I / O waveguide 233-3 can be compared with Figure 3B (or alternative embodiments Figure 3C ) is the same as the cross-sectional view described in ).
[0058] Figure 5A shows a schematic top view of an optical device according to some embodiments, and Figure 5B According to some embodiments, Figure 5A Schematic cross-sectional view of the optical device taken along line 5B-5B in FIG. Figure 5A and Figure 5B The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0059] Reference FIG. 5A to FIG. 5B And refer to Figure 2B , Figure 3A and Figure 4A , the whole or part of the optical device 13 / 13B may be a wavelength division multiplexing (WDM) device. The WDM device may be used to combine multiple optical signals for transmission along the I / O waveguides 133-1 and / or 133-2. For example, the WDM device includes more than one ring waveguide (e.g., 131A and 231) configured and operated to modulate the wavelength. In some embodiments, the ring waveguides of the WDM device are made of the same material and may be located in the same sublayer. In some embodiments, the ring waveguides of the WDM device are made of different materials and are located in different sublayers. In the illustrated embodiment, the WDM device includes two ring waveguides 131A and one ring waveguide 231 disposed below the ring waveguide 131A and optically coupled to the ring waveguide 131A. It should be understood that the number of ring waveguides 131A and 231 is shown as an example and does not constitute a limitation of the present invention.
[0060] In some embodiments, in a top view, the ring waveguide 131A is disposed at opposite sides of the ring waveguide 231, and the vertical segments 1311 of each ring waveguide 131A may overlap opposite sides of the ring waveguide 231. The corresponding ring waveguide 131A may include one of the vertical segments 1311 overlapping the ring waveguide 231 and another of the vertical segments 1311 overlapping the I / O waveguide 133-1 (or 133-2). Figure 5B As shown, the I / O waveguides 133-1 and 133-2 and the ring waveguide 231 may be located in the lower sublayer, the ring waveguide 131A may be located in the upper sublayer, and a portion of the dielectric layer (e.g., the ILD layer 15 or the interconnect dielectric layer 16D) may be sandwiched between the I / O waveguides 133-1 and 133-2 and the ring waveguide 231 in the vertical direction. Figure 5B The cross-sectional view shown in may be similar to Figure 2B In some embodiments, a medium may be sandwiched between the ring waveguide 131A and the I / O waveguide (133-1 and / or 133-2) or between the ring waveguide 131A and the ring waveguide 231, wherein the medium is similar to Figure 2C The medium 135 described in .
[0061] In some embodiments, a portion (or all) of the oval ring waveguide 131A may be used Figure 2A In other embodiments, the I / O waveguide 133-1 (and / or 133-2) may be replaced by the circular ring waveguide 131 described in the embodiment. FIG. 3A to FIG. 3B The I / O waveguide 233-1 (or 233-2) described in the foregoing may be replaced, and / or the ring waveguides 231 and 131A may be replaced with other ring waveguides described elsewhere herein. All such combinations are fully intended to be included within the scope of the embodiments. This provides flexibility in the design of the ring waveguide and the I / O waveguide, because the designs of the ring waveguide and the I / O waveguide can be easily integrated without incurring additional processing steps and costs.
[0062] Fig. 6A shows a schematic top view of an optical device according to some embodiments, and Figure 6B According to some embodiments, Fig. 6A Schematic cross-sectional view of the optical device taken along line 6B-6B in FIG. Fig. 6A and Figure 6B The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0063] Reference FIG. 6A to FIG. 6B And refer to FIG. 3A to FIG. 3B , the ring waveguide 231 is optically coupled to at least one I / O waveguide (e.g., 233-1D and 233-2D). The ring waveguide 231 may be similar to FIG. 3A to FIG. 3B The I / O waveguide 233-1D may be similar to the ring waveguide 231 described in the foregoing. Except that the I / O waveguide 233-1D includes doping regions having opposite conductivity types, the I / O waveguide 233-1D may be similar to the ring waveguide 231 described in the foregoing. FIG. 3A to FIG. 3B 233-1D. For example, the I / O waveguide 233-1 includes a first doping region 233P having a p-type dopant and a second doping region 233N adjacent to the first doping region 233P and having an n-type dopant. In a top view, the first doping region 233P and the second doping region 233N may each have a straight direction parallel to the extension direction of the I / O waveguide 233-1D. In a top view, the first doping region 233P and the second doping region 233N may be arranged in a vertical direction and may overlap the ring waveguide 231 tangentially. It should be understood that, as FIG. 6A to FIG. 6B The relative positions of the first doping region 233P and the second doping region 233N shown in FIG. 2 are shown for illustrative purposes, and in other embodiments, the relative positions of the first doping region 233P and the second doping region 233N may be reversed.
[0064] In the cross-sectional view, the doped regions (eg, 233P and 233N) may occupy the entire cross-section or a portion of the cross-section of the I / O waveguide 233-1. Figure 6B In the cross-sectional view of FIG. 1 , the peripheral portion of the I / O waveguide 233-1 is shown in dotted lines to indicate that it may or may not exist. In some embodiments, the first doped region 233P and the second doped region 233N of the I / O waveguide 233-1D overlap with the ring waveguide 231 in the cross-sectional view, and a portion of the dielectric layer (e.g., the ILD layer 15 or the interconnect dielectric layer 16D) is located in the gap between the lower surface of the ring waveguide 231 and the upper surfaces of the first doped region 233P and the upper surfaces of the second doped region 233N, wherein the spacing S1 of the gap is in the range of about 0.01 microns to about 5 microns. In an alternative embodiment, a dielectric (not shown) is disposed in the gap between the lower surface of the ring waveguide 231 and the upper surfaces of the first doped region 233P and the upper surfaces of the second doped region 233N, wherein the dielectric is similar to Figure 2C The medium 135 described in .
[0065] In some embodiments, the width 231W of the ring waveguide 231 is less than the total width 233TW of the first doped region 233P and the second doped region 233N. As another option, the width 231W is substantially equal to the total width 233TW. In a top view, the length 233L of the first doped region 233P may be substantially equal to the length of the second doped region 233N. In some embodiments, the length 233L is similar to the coupling length and can be adjusted depending on optical requirements and product requirements. Depending on the optical requirements and product requirements, the doping concentration of the first doped region 233P and the doping concentration of the second doped region 233N may be substantially the same or different. The first doped region 233P and the second doped region 233N are configured to change the refractive index of the I / O waveguide 233-1D to control the coupling efficiency between the I / O waveguide 233-1D and the ring waveguide 231.
[0066] Still refer to FIG. 6A to FIG. 6B, the conductive features 160 including the first group (e.g., first electrodes) 161 and the second group (e.g., second electrodes) 162 are physically and electrically in contact with the first doped region 233P and the second doped region 233N, wherein each group of the conductive features 160 may include a conductive pad, a via, a conductive line, a combination thereof, etc. The conductive features 160 formed by the FEOL process may be embedded in the ILD layer 15. In some embodiments, the conductive features 160 formed by the BEOL process are embedded in the interconnect dielectric layer 16D as part of the interconnect wiring 16M. In some embodiments, the vias of the conductive features 160 falling on the first doped region 233P and the second doped region 233N are formed by the FEOL process and embedded in the ILD layer 15, and another portion of the conductive features 160 overlying the vias may be formed by the BEOL process and embedded in the interconnect dielectric layer 16D.
[0067] The first doped region 233P and the second doped region 233N may be electrically connected to a voltage source (not shown) via the conductive feature 160. For example, one of the first electrode and the second electrode (161 and 162) is coupled to the positive terminal of the voltage source, and the other of the first electrode and the second electrode (161 and 162) is coupled to the negative terminal of the voltage source. The conductive feature 160 connected to the first doped region 233P and the second doped region 233N may provide a variable phase shift in the I / O waveguide 233-1D in response to the voltage applied to the first doped region 233P and the second doped region 233N. By changing the voltage applied between the first doped region 233P and the second doped region 233N, the coupling ratio between the ring waveguide 231 and the I / O waveguide 233-1D may be tuned.
[0068] The I / O waveguide 233-2D is optionally disposed at the opposite side of the ring waveguide 231 relative to the I / O waveguide 233-1D. The I / O waveguide 233-2D may be similar to the I / O waveguide 233-1D. The doped region of the I / O waveguide 233-2D may be electrically coupled to the conductive feature 160. The I / O waveguide 233-2D and the conductive feature 160 connected to the doped region of the I / O waveguide 233-2D are optionally disposed, and therefore, these components are shown in dashed lines to indicate that they may or may not be present.
[0069] Fig. 7A shows a schematic top view of an optical device according to some embodiments, and Figure 7B According to some embodiments, Fig. 7A Schematic cross-sectional view of the optical device taken along line 7B-7B in FIG. Fig. 7A and Figure 7B The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1BUnless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0070] Reference FIG. 7A to FIG. 7B and FIG. 6A to FIG. 6B , FIG. 7A to FIG. 7B The structures shown are similar to FIG. 6A to FIG. 6B The structure shown. FIG. 7A to FIG. 7B The structure shown is FIG. 6A to FIG. 6B The difference between the structures shown includes that the I / O waveguide 233-1D' includes a doped region 233D having a p-type dopant or an n-type dopant. The doped region 233D can be electrically connected to a voltage source (not shown) via a conductive feature 160. When a voltage is applied to the doped region 233D, the doped region 233D of the I / O waveguide 233-1D' can act as a resistive component. When a voltage is applied to the doped region 233D, the heat generated in the doped region 233D can heat the I / O waveguide 233-1D', and the I / O waveguide 233-1D' can be used as an electrical heater. By changing the voltage applied to the doped region 233D, the coupling ratio between the ring waveguide 231 and the I / O waveguide 233-1D' can be tuned. Relative to the I / O waveguide 233-1D', the I / O waveguide 233-2D' is optionally disposed at the opposite side of the ring waveguide 231. I / O waveguide 233-2D may be similar to I / O waveguide 233-1D'. I / O waveguide 233-2D' and conductive features 160 connected to doped regions of I / O waveguide 233-2D' are provided as needed, and therefore, these components are shown in dashed lines to indicate that they may or may not be present.
[0071] Fig. 8A shows a schematic top view of an optical device according to some embodiments, and Figure 8B According to some embodiments, Fig. 8A Schematic cross-sectional view of the optical device taken along line 8B-8B in FIG. Fig. 8A and Figure 8B The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0072] Reference Fig. 8A and Figure 8B And refer to FIG. 3A to FIG. 3B , FIG. 8A to FIG. 8B The structures shown are similar to FIG. 3A to FIG. 3B The structure shown. FIG. 8A to FIG. 8B The structure shown is FIG. 3A to FIG. 3BThe differences between the structures shown include that the heating element 239-1 is thermally coupled to the I / O waveguide 233-1, and the conductive features 160 including the first group (e.g., first electrodes) 161 and the second group (second electrodes) 162 are electrically and physically connected to the heating element 239-1. In some embodiments, the heating element 239-1 is disposed above the ring waveguide 231 and embedded in the ILD layer 15 (or the interconnect dielectric layer 16D), and a portion of the ILD layer 15 (or the interconnect dielectric layer 16D) may be sandwiched between the heating element 239-1 and the ring waveguide 231 in a vertical direction. The spacing between the lower surface of the heating element 239-1 and the upper surface of the ring waveguide 231 is the thickness of a portion of the ILD layer 15 (or the interconnect dielectric layer 16D), and the spacing between the heating element 239-1 and the ring waveguide 231 may vary depending on optical requirements and product requirements.
[0073] In some embodiments, the heating element 239-1 has a width 239W that is greater than the width 231W of the ring waveguide 231. Alternatively, the width 239W is substantially equal to (or less than) the width 231W of the ring waveguide 231. The heating element 239-1 may include a thermally conductive material, such as aluminum, nickel, copper, stainless steel, alloys thereof, and / or other suitable materials. In some other embodiments, the heating element (e.g. Figure 8B 239') is disposed below the I / O waveguide 233-1 and thermally coupled to the I / O waveguide 233-1. In some other embodiments, a heating element (e.g. Figure 8B 239" as shown) surrounds at least one side wall of the I / O waveguide 233-1 and is thermally coupled to the I / O waveguide 233-1. The I / O waveguide 233-2 may be as desired. FIG. 3A to FIG. 3B The heating element 239-2 is optionally configured to be thermally coupled to the I / O waveguide 233-2, and the conductive features 160 including the first set 161 and the second set 162 are optionally connected to the heating element 239-2. Other configurations of the heating element 239-1 may also be used.
[0074] In some embodiments, a voltage source (not shown) is connected to the conductive feature 160. When a voltage is applied, the heat generated by the induced current flowing through the heating element 239-1 can affect the optical properties of the I / O waveguide 233-1. For example, the material of the I / O waveguide 233-1 has a higher thermal conductivity than the material of the ring waveguide 231, so that when heat is generated by applying a voltage to the heating element 239-1, the thermal impact on the ring waveguide 231 is less than the thermal impact on the I / O waveguide 233-1. In some embodiments, the heating of the I / O waveguide 233-1 changes the refractive index through a thermo-optical effect. For example, the effective index difference between the I / O waveguide 233-1 and the dielectric layer (e.g., 15 or 16D) covering the I / O waveguide 233-1 becomes close to the effective index difference between the ring waveguide 231 and the dielectric layer (e.g., 15 or 16D) covering the ring waveguide 231.
[0075] Fig. 9A shows a schematic top view of an optical device according to some embodiments, Fig. 9B According to some embodiments, Fig. 9A A schematic cross-sectional view of the optical device taken along line 9B-9B in FIG. Fig. 9C According to some embodiments, Fig. 9A Schematic cross-sectional view of the optical device taken along line 9C-9C in FIG. 9A to 9C The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0076] Reference 9A to 9C , the optical device 13 / 13B may be a micro-ring modulator (MRM) device for high-efficiency electrical signal to optical signal conversion. For example, the MRM device includes a ring waveguide 233-4 optically coupled to the I / O waveguide 133-1, and the coupling region of the MRM device can introduce an input optical signal with an operating wavelength into the ring waveguide 233-4. The ring waveguide 233-4 may include a rib region 233R made of a semiconductor material (e.g., silicon, a III-V compound semiconductor, or a similar material), a first doped region 233P' disposed at the outer edge of the rib region 233R, and a second doped region 233N' disposed at the inner edge of the rib region 233R, wherein the rib region 233R is disposed in the middle to achieve a resonance effect and a resonance mode. The rib region 233R, the first doped region 233P', and the second doped region 233N' may form a PIN junction.
[0077] The rib region 233R may have an annular top view shape. The first doped region 233P' and the second doped region 233N' may have a substantially annular top view shape conformally lined on the rib region 233R. The first doped region 233P' and the second doped region 233N' may have opposite conductivity types, for example, the first doped region 233P' has a p-type dopant, and the second doped region 233N' has an n-type dopant. As another option, the p-type dopant and the n-type dopant of the first doped region and the second doped region may be reversed. In some embodiments, the annular waveguide 233-4 is formed by the following steps: patterning a semiconductor material layer to form a first trench TR1 and a second trench TR2 surrounded by the first trench TR1; and doping the semiconductor material layer.
[0078] In some embodiments, the first doped region 233P' includes a first segment 233P1 and a second segment 233P2 located between the first segment 233P1 and the rib region 233R, wherein the second segment 233P2 corresponds to the first trench TR1 and the first segment 233P1 protrudes from the second segment 233P2. The second doped region 233N' may include a first segment 233N1 and a second segment 233N2 located between the first segment 233N1 and the rib region 233R, wherein the second segment 233N2 corresponds to the second trench TR2 and the first segment 233N1 protrudes from the second segment 233N2. The rib region 233R may include a first segment 233RP adjacent to the first doped region 233P' and a second segment 233RN adjacent to the second doped region 233N'. A first portion of the first segment 233RP adjacent to the second segment 233P2 may correspond to the first trench TR1, and a second portion of the first segment 233RP adjacent to the second segment 233RN may protrude from the first portion of the first segment 233RP. A first portion of the second segment 233RN adjacent to the second segment 233N2 may correspond to the second trench TR2, and a second portion of the second segment 233RN adjacent to the first segment 233RP may protrude from the first portion of the second segment 233RN. In some embodiments, the first segment 233RP includes a dopant of the same conductivity type as the first doping region 233P' and has a lower doping concentration than the first doping region 233P', and the second segment 233RN includes a dopant of the same conductivity type as the second doping region 233N' and has a lower doping concentration than the second doping region 233N'. The first doping region 233P' and the second doping region 233N' may be heavily doped regions, and the rib region 233R may be a lightly doped region.
[0079] like Fig. 9CAs shown in the cross-sectional view of FIG. 1 , the I / O waveguide 133-1 may be disposed on the ring waveguide 233-4 in the vertical direction, and the ILD layer 15 (or the interconnect dielectric layer 16D) may be interposed between the I / O waveguide 133-1 and the ring waveguide 233-4. The ring waveguide 233-4 may have a first undoped region 233P3 connected to the first doped region 233P′, a second undoped region 233R3 connected to the rib region 233R, and a third undoped region 233N3 connected to the second doped region 233N′. The I / O waveguide 133-1 may overlap the first undoped region 233P3, the second undoped region 233R3, and the third undoped region 233N3.
[0080] In some embodiments, the conductive features 160 including the first group (e.g., first electrodes) 161 and the second group (e.g., second electrodes) 162 are physically and electrically in contact with the first doped region 233P' and the second doped region 233N'. The conductive features 160 formed by the FEOL process may be embedded in the ILD layer 15. In some embodiments, the conductive features 160 formed by the BEOL process are embedded in the interconnect dielectric layer 16D as part of the interconnect wiring 16M. In some embodiments, the vias of the conductive features 160 that fall on the first doped region 233P' and the second doped region 233N' are formed by the FEOL process and embedded in the ILD layer 15, and another portion of the conductive features 160 that overlie the vias may be formed by the BEOL process and embedded in the interconnect dielectric layer 16D. The first doped region 233P' and the second doped region 233N' may be electrically connected to a voltage source (not shown) via the conductive features 160. The refractive index change of the ring waveguide 233-4 may be induced by current injection. For example, when voltage is applied, the resonance property of the ring waveguide 233-4 corresponding to the operating wavelength is changed by controlling free carriers. Therefore, the transmittance of the input light in the I / O waveguide 133-1 can be changed together with the resonance state, so that the optical signal can be modulated to a specific wavelength through the resonance effect.
[0081] Fig. 10A shows a schematic top view of an optical device according to some embodiments, and Fig. 10B According to some embodiments, Fig. 10A A schematic cross-sectional view of the optical device taken along line 10B-10B in FIG. Fig. 10A and Fig. 10B The optical device described in Figure 1A The optical device 13 of the semiconductor device 10A shown in FIG. Figure 1B Unless otherwise specified, the same reference numerals in the embodiments denote the same components.
[0082] Reference FIG. 10A to FIG. 10B And refer to FIG. 5A to FIG. 5B , Fig. 10A The structure shown can be similar to Figure 5A The WDM device shown. Fig. 10A The structure shown is Figure 5A The differences between the WDM devices shown include Figure 5A The ring waveguide 131A in the embodiment is replaced with a ring waveguide 131D having doped regions (e.g., 1311N and 1311P) and the conductive feature 160 is electrically coupled to the doped region having the opposite conductivity type. For example, the corresponding ring waveguide 131D includes a vertical segment 1311' having a first doped region 1311P and a second doped region 1311N. The first doped region 1311P may include a p-type dopant, and the second doped region 1311N may have an n-type dopant. As another option, the p-type dopant and the n-type dopant of the first doped region and the second doped region may be reversed. The first doped region 1311P and the second doped region 1311N may be located in the coupling region of the ring waveguides 231 and 131D.
[0083] In some embodiments, a first group (e.g., first electrodes) 161 of the conductive features 160 physically contacts and electrically contacts the first doped region 1311P, and a second group (e.g., second electrodes) 162 of the conductive features 160 physically contacts and electrically contacts the second doped region 1311N. In some embodiments, the second doped region 1311N of the upper ring waveguide 131D and the second doped region 1311N of the lower ring waveguide 131D are connected in series via the second group 162 of the conductive features 160. In some embodiments, the first doped region 1311P of the upper ring waveguide 131D and the first doped region 1311P of the lower ring waveguide 131D are respectively connected to two separate first groups 161 of the conductive features 160. Other suitable electrical configurations may also be used depending on product requirements. The first doped region 1311P and the second doped region 1311N may be electrically connected to a voltage source (not shown) via the conductive features 160. By changing the voltage applied between the first doping region 1311P and the second doping region 1311N, the coupling ratio between the ring waveguide 231 and the ring waveguide 131D can be tuned.
[0084] Fig.11 is a diagram showing a method for making an optical device (eg Figure 1A 13 or Figure 1B 13B) of the flowchart of the steps of method 500. Fig.11, the method 500 may include the following steps. In step 502, a semiconductor material layer disposed on a first side of a first dielectric material layer is patterned to form a first waveguide. In step 504, a second dielectric material layer disposed on a second side of the first dielectric material layer opposite to the first side is patterned to form a second waveguide optically coupled to the first waveguide. The first dielectric material layer and the second dielectric material layer may include different dielectric constants. In the step 505, a method for forming a first waveguide is provided. Figure 1A In some embodiments of the method 500 for forming the optical device 13 in the embodiment of the present invention, the first dielectric material layer is part of the ILD layer 15, the second dielectric material layer can be a nitride-containing material (such as silicon nitride) or other suitable dielectric material, and steps 502 and 504 are performed by a FEOL process. Figure 1B In some embodiments of method 500 of the optical device 13B in FIG. 1 , the first dielectric material layer is part of the interconnect dielectric layer 16D, the second dielectric material layer may be a nitride-containing material (eg, silicon nitride) or other suitable dielectric material, and steps 502 and 504 are performed by a BEOL process.
[0085] In some embodiments, nitride on insulator can be used to form a second waveguide of an integrated optical device due to reduced thermo-optical effects and sensitivity to waveguide changes. For example, forming a first waveguide and a second waveguide by patterning a nitride-containing material integrated onto an SOI substrate may include the following steps. A substrate is provided, the substrate comprising a base layer, a first dielectric material layer overlying the base layer, and a semiconductor layer overlying a first side of the first dielectric material layer. The semiconductor layer is patterned to form a first waveguide, and then the base layer may be removed to expose a second side of the oxide layer opposite to the first side. A second dielectric material layer may be formed on the second side of the oxide layer and patterned to form a second waveguide. Then, the first waveguide and the second waveguide may be covered by another first dielectric material layer. The second waveguide may be located at one side of another first dielectric material layer, and the semiconductor substrate may be located at the opposite side of another first dielectric material layer.
[0086] In some embodiments, the first waveguide functions as a ring waveguide (e.g., a microring resonator) and the second waveguide functions as an I / O waveguide. FIG. 2A to FIG. 2C , Figure 4A , FIG. 5A to FIG. 5B , FIG. 9A to FIG. 9B and FIG. 10A to FIG. 10B Exemplary implementations of these embodiments are described. FIG. 5A to FIG. 5BIn the embodiment, during the step of forming the second waveguide (i.e., the I / O waveguides 133-1 and 133-2), the second dielectric material layer is also patterned to form the ring waveguide 231, so that the ring waveguide 231 and the I / O waveguides 133-1 and 133-2 are formed of the same material at the same level. FIG. 9A to FIG. 9B and FIG. 10A to FIG. 10B In an embodiment of the present invention, the semiconductor material layer may be doped to form the doped regions 233P' and 233N', and the conductive feature 160 may be formed after forming the second waveguide.
[0087] In some embodiments, the first waveguide functions as an I / O waveguide and the second waveguide functions as a ring waveguide. FIG. 3A to FIG. 3C , FIG. 4B to FIG. 4C , FIG. 6A to FIG. 6B , FIG. 7A to FIG. 7B and FIG. 8A to FIG. 8B Exemplary implementations of these embodiments are described. FIG. 6A to FIG. 6B and FIG. 7A to FIG. 7B In the embodiment of the present invention, the semiconductor material layer may be doped to form a doped region (eg FIG. 6A to FIG. 6B 233P and 233N or FIG. 7A to FIG. 7B 233D in the figure), and the conductive feature 160 may be formed after forming the second waveguide. FIG. 8A to FIG. 8B In the embodiment of the present invention, the heating element 239-1 may be formed after forming the second waveguide.
[0088] Other features and processes may also be included. For example, a test structure may be included to assist in verification testing of a three-dimensional (3D) package or 3DIC device. The test structure may, for example, include a test pad formed in a redistribution layer or on a substrate, thereby enabling testing of the 3D package or 3DIC, use of probes and / or probe cards, and the like. Verification testing may be performed on intermediate structures as well as final structures. In addition, the structures and methods disclosed herein may be used in conjunction with a test method that includes intermediate verification of a known good die to improve yield and reduce cost.
[0089] According to some embodiments, a device includes: a dielectric layer including a first material, a ring wave embedded in the dielectric layer, and an I / O waveguide embedded in the dielectric layer and vertically optically coupled to the ring waveguide. The ring waveguide includes a second material different from the first material, and the I / O waveguide includes a third material different from the first material and the second material.
[0090] In some embodiments, the second material has a semiconductor material, and the first material and the third material have dielectric materials with different dielectric constants. In some embodiments, the ring waveguide includes an arc segment and a vertical segment to form an oval in a top view, and one of the vertical segments overlaps with the input / output waveguide. In some embodiments, the ring waveguide includes a rib region, a first doped region disposed at an outer edge of the rib region and including a dopant of a first conductivity type, and a second doped region disposed at an inner edge of the rib region and including a dopant of a second conductivity type opposite to the first conductivity type. In some embodiments, the device further includes a dielectric ring waveguide, the dielectric ring waveguide including the third material, wherein the dielectric ring waveguide located next to the input / output waveguide is embedded in the dielectric layer, and the dielectric ring waveguide is spaced apart from the ring waveguide in a vertical direction by the dielectric layer. In some embodiments, the ring waveguide includes a first doped region and a second doped region having opposite conductivity types, and the first doped region and the second doped region overlap with the dielectric ring waveguide. In some embodiments, the first material and the second material are dielectric materials having different dielectric constants, and the third material is a semiconductor material. In some embodiments, the input / output waveguide includes a curved section that conformally overlaps the ring waveguide. In some embodiments, the input / output waveguide includes at least one doped region that overlaps the ring waveguide. In some embodiments, the device further includes a heating element embedded in the dielectric layer and thermally coupled to the input / output waveguide.
[0091] According to some alternative embodiments, a device includes an optical device disposed on a semiconductor substrate and embedded in a dielectric layer overlying the semiconductor substrate. The optical device includes: a first waveguide arranged in a loop and a second waveguide optically coupled to the first waveguide and including a material different from that of the first waveguide. The vertical distance between the first waveguide and the second waveguide is the thickness of a portion of the dielectric layer sandwiched between the first waveguide and the second waveguide. The device includes an optical I / O portion that laterally abuts the optical device and is optically coupled to the second waveguide.
[0092] In some embodiments, the material of the first waveguide is a semiconductor material, and the thermal conductivity of the material of the second waveguide is less than the thermal conductivity of the material of the first waveguide. In some embodiments, the top-view width of the second waveguide is greater than the top-view width of the first waveguide. In some embodiments, the first waveguide includes a first doped region and a second doped region having different conductivity types. In some embodiments, the material of the second waveguide is a semiconductor material, and the thermal conductivity of the material of the first waveguide is less than the thermal conductivity of the material of the second waveguide. In some embodiments, the top-view width of the first waveguide is greater than the top-view width of the second waveguide. In some embodiments, the second waveguide includes at least one doped region overlapping the first waveguide.
[0093] According to some alternative embodiments, a method includes: patterning a semiconductor material layer on a first side of a first dielectric material layer to form a first waveguide; and patterning a second dielectric material layer on a second side of the first dielectric material layer opposite to the first side to form a second waveguide optically coupled to the first waveguide. The first dielectric material layer and the second dielectric material layer include different dielectric constants, and one of the first waveguide and the second waveguide is used as a ring waveguide, and the other of the first waveguide and the second waveguide is used as an I / O waveguide.
[0094] In some embodiments, the method further includes forming an active device on a semiconductor substrate, wherein the first waveguide and the second waveguide are formed at substantially the same level as the active device located above the semiconductor substrate. In some embodiments, the method further includes forming an active device on a semiconductor substrate and forming an interconnect structure above the active device, wherein the first waveguide and the second waveguide are formed at substantially the same level as the interconnect structure.
[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the utility model, rather than to limit them. Although the embodiments of the utility model are described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the embodiments of the utility model.
Claims
1. A semiconductor device, characterized in that: include: a dielectric layer comprising a first material; a ring waveguide, embedded in the dielectric layer, the ring waveguide comprising a second material different from the first material; as well as An input / output waveguide is embedded in the dielectric layer and optically coupled to the ring waveguide in a vertical manner, wherein the input / output waveguide comprises a third material different from the first material and the second material.
2. The semiconductor device according to claim 1, wherein: The second material comprises a semiconductor material, and the first material and the third material comprise dielectric materials having different dielectric constants.
3. The semiconductor device according to claim 1, wherein: Also includes: A dielectric ring waveguide includes the third material, wherein the dielectric ring waveguide located beside the input / output waveguide is embedded in the dielectric layer and is spaced apart from the ring waveguide in a vertical direction by the dielectric layer.
4. The semiconductor device according to claim 1, wherein: The first material and the second material are dielectric materials with different dielectric constants, and the third material is a semiconductor material.
5. The semiconductor device according to claim 1, wherein: Wherein the input / output waveguide includes a curved segment that conformally overlaps the ring waveguide.
6. The semiconductor device according to claim 1, wherein: The input / output waveguide includes at least one doped region overlapping the ring waveguide.
7. The semiconductor device according to claim 1, wherein: Also includes: A heating element is embedded in the dielectric layer and thermally coupled to the input / output waveguide.
8. A semiconductor device, characterized in that: include: An optical device is disposed on a semiconductor substrate and embedded in a dielectric layer overlying the semiconductor substrate, the optical device comprising: A first waveguide, arranged in a loop; as well as a second waveguide optically coupled to the first waveguide and comprising a material different from that of the first waveguide, wherein a vertical distance between the first waveguide and the second waveguide is a thickness of a portion of the dielectric layer sandwiched between the first waveguide and the second waveguide; and an optical input / output portion laterally adjacent to the optical device and optically coupled to the second waveguide.
9. The semiconductor device according to claim 8, wherein: The material of the first waveguide is a semiconductor material, and the thermal conductivity of the material of the second waveguide is less than the thermal conductivity of the material of the first waveguide.
10. The semiconductor device according to claim 8, wherein: The material of the second waveguide is a semiconductor material, and the thermal conductivity of the material of the first waveguide is smaller than the thermal conductivity of the material of the second waveguide.