PCB with low return loss and high through-current capability
By adopting a hybrid hollowing method on the first metallization hole of the PCB board, combined with the design that retains the two intermediate power layers without hollowing out, the problem of low return loss and high flow capacity in the prior art is solved, and the signal quality improvement of the high-speed differential line and the power supply flow satisfaction of the ultra-large current is achieved.
Patent Information
- Application Number
- CN202421790377.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-26
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2034-07-26
AI Technical Summary
When designing metallized holes of high-speed differential lines, existing PCB boards cannot meet both low return loss and high flow capacity, resulting in poor signal quality or insufficient power supply flow.
A PCB board with low return loss and high flow capacity is designed. By adopting a hybrid hollowing method on the first metallization hole, the power layer with super high current in the middle is retained without hollowing out, while the other layers are hollowed out to meet the return loss index of the high-speed differential line and the power supply current requirements of super high current.
It achieves the high-current high-flow capability of the power supply layer while meeting the high-speed differential line return loss index, and ensures the high-current flow capability of the power supply layer, improves the return loss index of the metallized hole, and meets the design requirements of the 25Gbps signal.
Smart Images
Figure CN222967145U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of circuit boards, and particularly relates to a PCB board with both low return loss and high current-carrying capacity. Background Art
[0002] Generally, the signal rate of general high-end processor chips is basically above 25 Gbps, the power consumption is above three hundred watts, and the number of single-board layers is above 10, which poses high technical requirements for PCB design. At present, for the design of metallized holes of 25 Gbps high-speed differential lines, the metal plane around them is hollowed out to ensure the impedance continuity at the metallized holes. Specifically, the impedance of the metallized holes on the PCB board is usually much lower than the transmission line impedance. To increase the impedance of the metallized holes, the power plane or ground plane around the metallized holes needs to be hollowed out. The larger the hollowed-out area, the higher the impedance of the metallized holes, and it can be determined by checking whether the index of return loss meets the design requirements of 25 Gbps signals. The current of the high-power power layer is above 200 A. Generally, many inner layers are designed in the PCB to lay the power supply, and the copper thickness is generally 2 oz. However, when the current-carrying capacity of the power supply still cannot be satisfied, the metallized holes of the high-speed differential lines are not hollowed out, and a trade-off is made between the return loss of the signal quality and the current-carrying capacity of the power supply that meets the super-large current. Specifically, the hollowing out of the metallized holes of the high-speed differential lines on the PCB board will interrupt the power layer of the super-large current. Although it can ensure that the return loss of the high-speed differential lines meets the index, because the power layer of the super-large current is interrupted after hollowing out, the current-carrying capacity of the power supply of the super-large current cannot be satisfied. When the metallized holes of the high-speed differential lines on the PCB board are not hollowed out, the power layer of the super-large current is basically intact. The copper skin of the power supply is not interrupted, and the high current-carrying capacity can be satisfied, but the return loss index of the metallized holes of the high-speed differential lines cannot be met. As Figure 1 shown, the abscissa represents the frequency, the ordinate represents the loss value. The curve below at 0 Hz is the waveform of the return loss, and the curve above is the index of the return loss. It can be seen that the return loss of the non-hollowed-out metallized holes does not meet the index. Summary of the Utility Model
[0003] The purpose of the utility model is to propose a PCB board with both low return loss and high current-carrying capacity for the above problems, while meeting the return loss index of the high-speed differential lines, ensuring the high current-carrying capacity of the power layer of the super-large current.
[0004] To achieve the above purpose, the technical solution adopted by the utility model is as follows:
[0005] A PCB board with both low return loss and high current-carrying capacity proposed by the present utility model is an even-layer board and includes a plurality of first power layers, two second power layers, and a plurality of ground layers. The current of the second power layer is greater than or equal to 200A, and the two second power layers are located in the middle two layers. The PCB board with both low return loss and high current-carrying capacity also penetrates through a plurality of first metallized holes. The first metallized holes are differential vias. Every two first metallized holes form a group. The space between the two first metallized holes in the same group, and the first power layer and the ground layer around the two first metallized holes in the same group are hollowed out.
[0006] Preferably, the first metallized hole satisfies L1 = 4 mil and L2 = 18 mil, where L1 is the distance between the first metallized hole and the first power layer or the ground layer, and L2 is the distance at the narrowest part of the hollowed-out area on the first power layer or the ground layer.
[0007] Preferably, the PCB board with both low return loss and high current-carrying capacity further includes a plurality of second metallized holes penetrating through. The second metallized holes are return ground vias and correspond to the first metallized holes one by one.
[0008] Preferably, the total number of layers of the PCB board with both low return loss and high current-carrying capacity is greater than or equal to 10 layers.
[0009] Preferably, the PCB board with both low return loss and high current-carrying capacity further includes a plurality of signal layers. The space between the two first metallized holes in the same group, and the signal layers around the two first metallized holes in the same group are hollowed out.
[0010] Preferably, the PCB board with both low return loss and high current-carrying capacity includes the top layer TOP, the ground layer GND02, the signal layer ART03, the first power layer POWER04, the signal layer ART05, the ground layer GND06, the signal layer ART07, the first power layer POWER08, the second power layer POWER09, the second power layer POWER10, the first power layer POWER11, the signal layer ART12, the ground layer GND13, the signal layer ART14, the first power layer POWER15, the signal layer ART16, the ground layer GND17, and the bottom layer BOTTOM arranged in sequence.
[0011] Preferably, the sizes of the hollowed-out areas of each layer are the same.
[0012] Compared with the prior art, the beneficial effects of the present utility model are:
[0013] In this application, the power supply layer with ultra-high current is designed on the two middlemost layers, and a hybrid hollowing method is adopted for the first metallization via, that is, the two middlemost layers with ultra-high current power supply layers are not hollowed out, while other layers are hollowed out. This can meet the return loss index of high-speed differential lines without affecting the current conduction of the power supply layer with ultra-high current (greater than 200 A), which helps to ensure the power supply design of the ultra-high current of high-power chips. It can not only prevent the interruption of the current conduction of the ultra-high current power supply plane due to the hollowing of the metallization via, but also ensure that the return loss of the metallization via of the high-speed differential line can meet the index requirements of 25 Gbps signals, and the return loss index of the metallization via is significantly improved compared with the case without hollowing. Description of the Drawings
[0014] Figure 1 Fig. is a schematic diagram of the return loss of the metallization via of high-speed differential lines on a PCB board in the prior art without hollowing;
[0015] Figure 2 Fig. is a cross-sectional view of a PCB board of the present utility model with both low return loss and high current conduction ability;
[0016] Figure 3 Fig. is a top view of a PCB board of the present utility model with both low return loss and high current conduction ability;
[0017] Figure 4 Fig. is a schematic diagram of the return loss of a PCB board of the present utility model with both low return loss and high current conduction ability;
[0018] Figure 5 Fig. is a schematic diagram of the power supply current conduction simulation of a PCB board of the present utility model with both low return loss and high current conduction ability. Detailed Embodiments
[0019] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.
[0020] It should be noted that when a component is referred to as being "connected" to another component, it can be directly connected to the other component or there may also be an intermediate component. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field of the present application. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.
[0021] As Figure 2-5As shown, a PCB board with both low return loss and high current-carrying capacity is an even-layer board and includes a plurality of first power layers, two second power layers, and a plurality of ground layers. The current of the second power layer is greater than or equal to 200A, and the two second power layers are located in the middle two layers. The PCB board with both low return loss and high current-carrying capacity also penetrates through a plurality of first metallized holes, and the first metallized holes are differential vias. Every two first metallized holes form a group. Between the two first metallized holes in the same group, as well as the first power layer and the ground layer around the two first metallized holes in the same group are hollowed out.
[0022] Among them, the PCB board 1 with both low return loss and high current-carrying capacity (hereinafter referred to as the PCB board) is applied to high-power chips, generally a single board with 10 or more layers, basically an even layer. In the stack-up design of the PCB board for high-power chips, the power layer with ultra-high current (i.e., the second power layer) needs to be designed in the middle two layers. After the high-speed differential lines lead out metallized holes on the PCB board (i.e., the metallized holes of the high-speed differential lines, abbreviated as differential vias, corresponding to the first metallized holes 2), a hybrid hollowing method is adopted on the first metallized holes 2 of the PCB board. That is, the power layers with ultra-high current in the middle two layers can be designed without hollowing, and the other layers are all hollowed. As Figure 2 shown, 11 represents the first power layer or the ground layer, and the second power layer 12 is located in the middle two layers. Figure 3 In the figure, S represents the hollowed area.
[0023] In an embodiment, the first metallized hole satisfies L1 = 4 mil and L2 = 18 mil. Among them, L1 is the distance between the first metallized hole and the first power layer or the ground layer, and L2 is the distance at the narrowest part of the hollowed area on the first power layer or the ground layer. As Figure 3 shown, among them, the settings of L1 and L2 help to further ensure meeting both low return loss and high current-carrying capacity at the same time. The narrowest part of the hollowed area is the vertical direction of the center connection line of the two first metallized holes in the same group.
[0024] In an embodiment, the PCB board with both low return loss and high current-carrying capacity further includes a plurality of second metallized holes penetrating through. The second metallized holes are return ground vias and correspond to the first metallized holes one by one. Among them, the second metallized holes 3 as return ground vias can, on the one hand, provide a good return current path; on the other hand, eliminate electromagnetic radiation.
[0025] In an embodiment, the total number of layers of the PCB board with both low return loss and high current-carrying capacity is greater than or equal to 10 layers. The specific number of layers can be adjusted according to actual needs, and more power layers are more helpful to ensure current conduction.
[0026] In one embodiment, the PCB board with both low return loss and high current-carrying capacity further includes a plurality of signal layers, and the signal layers between two first metallized holes in the same group and around the two first metallized holes in the same group are hollowed out. The first power layer, the ground layer, and the signal layers can be arranged arbitrarily according to actual requirements, and it is preferred that the signal layers and the ground layers are arranged alternately.
[0027] In one embodiment, the PCB board with both low return loss and high current-carrying capacity includes a top layer TOP, a ground layer GND02, a signal layer ART03, a first power layer POWER04, a signal layer ART05, a ground layer GND06, a signal layer ART07, a first power layer POWER08, a second power layer POWER09, a second power layer POWER10, a first power layer POWER11, a signal layer ART12, a ground layer GND13, a signal layer ART14, a first power layer POWER15, a signal layer ART16, a ground layer GND17, and a bottom layer BOTTOM arranged in sequence. It is easy to think that those skilled in the art can arbitrarily change the number of layers of the PCB board and the arrangement order of each layer according to actual requirements.
[0028] In one embodiment, the sizes of the hollowed-out areas of each layer are the same. To facilitate the hollowing-out process, when hollowing out, the positions of the two middle second power layers can be reserved without hollowing out, or after all layers are hollowed out, the hollowed-out areas at the positions of the two middle second power layers can be filled, such as filling with the same material.
[0029] The return loss index and the power current-carrying capacity of the super-large current are verified and compared through simulation software, specifically as Figure 4 、 5 shown. Figure 4 At the corresponding position of 30 GHz in the figure, the curves from top to bottom correspond to the index of the return loss of 25 Gbps, the return loss of the second metallized hole without hollowing out, the return loss of the second metallized hole with mixed hollowing out (corresponding to the present application), and the return loss of the second metallized hole with hollowing out. It can be seen that the return loss of the present application does not exceed the index of the return loss of 25 Gbps, meets the index, and Figure 5 the current-carrying of the power supply in the figure also meets the high current-carrying requirement.
[0030] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.
[0031] The above-described embodiments merely represent relatively specific and detailed embodiments of the present application, but should not be construed as limiting the scope of the patent of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.
Claims
1. A PCB board with low return loss and high current capacity, characterized in that: The PCB board with both low return loss and high current capacity is an even-layer board and includes several first power supply layers, two second power supply layers and several ground layers. The current of the second power supply layer is greater than or equal to 200A and the two second power supply layers are located in the middle two layers. The PCB board with both low return loss and high current capacity is also penetrated by several first metallized holes, the first metallized holes are differential vias, every two first metallized holes form a group, and the first power supply layer and the ground layer between the two first metallized holes in the same group and around the two first metallized holes in the same group are hollowed out.
2. The PCB board with low return loss and high current carrying capacity as claimed in claim 1, characterized in that: The first metallized hole satisfies L1=4mil, L2=18mil, wherein L1 is the distance between the first metallized hole and the first power layer or ground layer, and L2 is the distance at the narrowest part of the hollowed-out area on the first power layer or ground layer.
3. The PCB board with low return loss and high current capacity as claimed in claim 1, characterized in that: The PCB board with both low return loss and high current capacity also includes a plurality of second metallized holes arranged through the board, wherein the second metallized holes are return holes and correspond one-to-one with the first metallized holes.
4. The PCB board with low return loss and high current carrying capacity as claimed in claim 1, characterized in that: The total number of layers of the PCB board having both low return loss and high current-carrying capacity is greater than or equal to 10 layers.
5. The PCB board with low return loss and high current carrying capacity as claimed in claim 4, characterized in that: The PCB board with both low return loss and high current capacity also includes a plurality of signal layers, and the signal layers between two of the first metallized holes in the same group and around the two of the first metallized holes in the same group are hollowed out.
6. The PCB board with low return loss and high current carrying capacity as claimed in claim 5, characterized in that: The PCB board with both low return loss and high current capacity includes a top layer TOP, a ground layer GND02, a signal layer ART03, a first power layer POWER04, a signal layer ART05, a ground layer GND06, a signal layer ART07, a first power layer POWER08, a second power layer POWER09, a second power layer POWER10, a first power layer POWER11, a signal layer ART12, a ground layer GND13, a signal layer ART14, a first power layer POWER15, a signal layer ART16, a ground layer GND17 and a bottom layer BOTTOM which are arranged in sequence.
7. A PCB board with low return loss and high current capacity as claimed in any one of claims 1 to 6, characterized in that: The hollowed-out areas of each of the layers are of the same size.