Packaging structure

Abstract

The utility model provides a packaging structure, which is applied to the technical field of semiconductors. Specifically, a shielding chip, such as a dummy chip, can be arranged between adjacent radio frequency modules or between a plurality of chips, which need to be shielded in a partitioned manner, in one radio frequency module according to the distance between devices or chips which need to be shielded in the partitioned manner, or a functional chip in the adjacent radio frequency module or the radio frequency module is used as the shielding chip, so that the shielding chip can be shielded in the partitioned manner. And then, a chip bonding pad is arranged on the shielding chip, and the chip bonding pad on the shielding chip is electrically connected with a grounding bonding pad on the substrate in a routing manner, so that an electromagnetic shielding effect is achieved. In addition, due to the fact that routing is carried out on the chip bonding pad located on the shielding chip, the arc height of the shielding lead is reduced, and the problems that operation is difficult and the arc is not stable due to the fact that the arc height of the shielding lead is large are solved. In addition, the shielding chip serves as a functional device in the radio frequency module, the packaging size cannot be increased, the miniaturization development trend is met, and meanwhile the shielding effect can be improved.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and particularly to a packaging structure. Background Art

[0002] A radio frequency (RF) module is a design solution that integrates two or more discrete devices, such as a filter, a diplexer / diplexer / multiplexer, a low noise amplifier (LNA), a power amplifier (PA), and a radio frequency switch, in the same module, which can improve the integration of RF chips and further miniaturize them.

[0003] In recent years, the distance between components in the RF front-end module has become smaller and smaller, resulting in an increasingly serious problem of mutual interference between components. To reduce the mutual interference between components / subsystems in the packaged module, a partition shielding method is usually adopted during the module manufacturing process to achieve electromagnetic shielding of sensitive components / subsystems.

[0004] The current packaging shielding structure usually forms shielding wire arcs on the ground pads around the sensitive components and connects them to the conformal shielding layer for partition shielding, thereby effectively improving the mutual interference between components in the module. However, the wire arcs used in this shielding method have a relatively high height, resulting in difficult wire bonding operations and poor wire arc stability. At the same time, the shielding wire arcs are usually discrete spaced wire arcs, and the shielding effect is poor.

[0005] Therefore, how to reduce the complexity of the packaging shielding structure is the key problem to be solved by this technical solution. Summary of the Utility Model

[0006] The purpose of the utility model is to provide a packaging structure, which uses a shielding chip to form partition shielding by wire bonding to achieve electromagnetic shielding between sensitive devices / multi-RF modules in the RF module and reduce the complexity of the packaging shielding structure.

[0007] To achieve the above purpose, the utility model provides a packaging structure, which specifically may include:

[0008] A substrate, including a first surface and a second surface;

[0009] A shielding chip, disposed on the first surface of the substrate;

[0010] A chip pad, disposed on the shielding chip;

[0011] A ground pad is disposed on the first surface of the substrate on one side or both sides of the shielding chip;

[0012] A plastic encapsulation layer is disposed on the substrate and buries the shielding chip, the chip pad and the ground pad;

[0013] A shielding lead is disposed in the plastic encapsulation layer, and the shielding lead includes:

[0014] A first sub-wire arc, including a first end and a second end, the first end is electrically connected to the chip pad, and the second end passes through the plastic encapsulation layer and is at the same horizontal height as its top surface; and,

[0015] A second sub-wire arc, including a third end and a fourth end, the third end is electrically connected to the ground pad, the fourth end passes through the plastic encapsulation layer and is at the same horizontal height as its top surface, and the second end and the fourth end do not directly contact;

[0016] A metal shielding layer covers the outside of the plastic encapsulation layer and is in direct contact with both the second end of the first sub-wire arc of the shielding lead and the fourth end of the second sub-wire arc.

[0017] In some alternative examples, a plurality of the chip pads may be disposed on the shielding chip, and the plurality of chip pads are disposed separately from each other in a first direction; wherein, one shielding lead is electrically connected to each of the chip pads.

[0018] In some alternative examples, a plurality of the chip pads are disposed on the shielding chip, and the plurality of chip pads are disposed separately from each other in a first direction and a second direction to form a chip pad array, and one shielding lead is electrically connected to each of the chip pads located in the chip pad array.

[0019] In some alternative examples, the shielding leads electrically connected to different chip pads are all electrically connected to the same ground pad in a wire bonding manner.

[0020] In some alternative examples, the shielding leads electrically connected to different chip pads are all electrically connected to different ground pads in a wire bonding manner.

[0021] In some alternative examples, the packaging structure may further include:

[0022] A radio frequency module, including a functional chip and a radio frequency chip that are disposed separately from each other in a second direction.

[0023] In some alternative examples, the functional chip includes one or a combination of a switch chip, an amplifier chip, a capacitor, and an inductor.

[0024] In some alternative examples, the shielding chip may be the functional chip; the packaging structure further includes:

[0025] A plurality of functional pads, part of which are located on the functional chip and the remaining part are located on the substrate;

[0026] A plurality of functional leads, with both ends of each functional lead being electrically connected to the functional pads located on the functional chip and on the substrate respectively.

[0027] In some alternative examples, at least part of the plurality of functional pads and the plurality of chip pads or the plurality of ground pads are staggered in the first direction.

[0028] In some alternative examples, the projection of the functional pad and the chip pad or the ground pad in the first direction coincides.

[0029] In some alternative examples, the shielding chip may be a dummy chip, and the dummy chip is located between adjacent radio frequency modules, or between the functional chip and the radio frequency chip in the radio frequency module.

[0030] In some alternative examples, the end of the functional lead is lower than the top surface of the plastic encapsulation layer.

[0031] Compared with the prior art, the present utility model has at least the following technical effects:

[0032] According to the distance between the devices or chips that need to be shielded in zones, a shielding chip, such as a dummy chip, is arranged between adjacent radio frequency modules or between multiple chips that need to be shielded in zones in a radio frequency module. Alternatively, the functional chip in an adjacent radio frequency module or a radio frequency module is used as the shielding chip, and then chip pads are arranged on the shielding chip, and the chip pads on the shielding chip and the ground pads on the substrate are electrically connected through shielding leads by wire bonding to achieve the electromagnetic shielding effect, and the packaging process is simplified, the complexity of the packaging shielding structure is reduced, and the production cycle is shortened, which is beneficial to reducing costs and improving the yield.

[0033] Compared with the traditional shielding method, the packaging structure provided by the present utility model does not have a complex internal shielding structure, and all chips or between the chips and the outside can be shielded without special process flows, that is, the electromagnetic shielding between sensitive devices in the radio frequency module or between multiple radio frequency modules is realized.

[0034] Moreover, since wire bonding is performed on the chip pads located on the shielding chip in the present utility model, the wire arc height of the shielding leads is also reduced, avoiding the problems of difficult operation and unstable wire arc caused by a relatively high wire arc height of the shielding leads. In addition, as a functional device inside the RF module, the shielding chip does not increase the package volume, meeting the development trend of miniaturization while also improving the shielding effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The drawings are used to provide a further understanding of the present application and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present application, but do not constitute a limitation to the present application. In the drawings:

[0036] Figure 1 is an exemplary diagram of the package structure provided in the embodiment of the present utility model;

[0037] Figure 2 is Figure 1 a top view of an example of the package structure shown after removing the metal shielding layer 70;

[0038] Figure 3 is Figure 1 a top view of an example of the package structure shown after removing the metal shielding layer 70;

[0039] Figure 4 is based on the Figure 1 a top view of an evolved example of the package structure shown after removing the metal shielding layer 70 in the present utility model;

[0040] Figure 5 is based on the Figure 1 a top view of an evolved example of the package structure shown after removing the metal shielding layer 70 in the present utility model;

[0041] Figure 6 is based on the Figure 1 a top view of an evolved example of the package structure shown after removing the metal shielding layer 70 in the present utility model;

[0042] Figure 7 is another exemplary diagram of the package structure provided in the embodiment of the present utility model;

[0043] Figure 8 is Figure 7 a top view of an example of the package structure shown after removing the metal shielding layer 70;

[0044] Figure 9 is based on the Figure 7 a top view of an evolved example of the package structure shown after removing the metal shielding layer 70 in the present utility model.

[0045] Among them, the reference numerals are as follows:

[0046] 10 - substrate; 11 - first surface of the substrate; 12 - second surface of the substrate; 13 - through hole; 20 - RF module; 21 - functional chip (shielding chip); 22 - RF chip; 30 - chip pad; 40 - ground pad; 50 - shielding lead; 51 - first sub - arc; 52 - second sub - arc; 211 - functional lead; 212 - functional pad; 60 - plastic encapsulation layer; 70 - metal shielding layer; 80 - dummy chip (shielding chip); D1 - first direction; D2 - second direction.

[0047] In the drawings, like parts are denoted by like reference numerals, and the drawings are not drawn to actual scale. Detailed implementation manners

[0048] The following specific embodiments are used to illustrate the implementation manners of the present utility model. Those skilled in the art can easily understand other advantages and effects of the present utility model from the content disclosed in this specification. The present utility model can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present utility model.

[0049] The terms used in the utility model are only for the purpose of describing specific embodiments and are not intended to limit the utility model. Unless otherwise defined in this application document, the technical terms or scientific terms used in the utility model shall have the ordinary meanings understood by those of ordinary skill in the field to which the utility model belongs. The terms "first", "second" and similar words used in the description and claims of the utility model do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. "Plurality" or "several" means two or more. Unless otherwise specified, words such as "upper / upper layer" and / or "lower / lower layer" are only for convenience of description and are not limited to a position or a spatial orientation. Words such as "comprising" or "including" mean that the elements or structures appearing before "comprising" or "including" cover the elements or structures listed after "comprising" or "including" and their equivalents, and do not exclude other elements or structures. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms "a", "the" and "said" used in the description and appended claims of the utility model are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the term "and / or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0050] For the convenience of unified description, the utility model defines a first direction and a second direction hereinafter, and defines directions D1 and D2 in the accompanying drawings of the specification. Among them, the first direction corresponds to D1 in the accompanying drawings of the specification (hereinafter simply referred to as the first direction D1). The first direction D1 is a direction perpendicular to the arrangement direction of a plurality of chips formed on the first surface of the substrate, and the substrate is a base material for forming the packaging structure proposed by the utility model; the second direction corresponds to D2 in the accompanying drawings of the specification (hereinafter simply referred to as the second direction D2). The second direction D2 is a direction parallel to the arrangement direction of a plurality of chips formed on the first surface of the substrate, and the second direction D2 is perpendicular to the first direction D1.

[0051] With the development of communication technology, the trend of radio frequency modularization of user equipment (UE), such as mobile phones, is very obvious. Different from the early days of 3G and 4G, in the multi-band and multi-mode era, especially after the gradual commercialization and popularization of 5G, mobile phones require a large number of components to meet the support requirements of global frequency bands. The radio frequency front-end (RF front-end) has become more complex. Due to the limited design space of the mobile phone motherboard, the trends of modularization, integration, and miniaturization have naturally emerged. The increasingly tense contradiction between the continuously increasing number of radio frequency front-end components and the available area of the printed circuit board (PCB) has promoted the gradual development of high-integration radio frequency front-end module products. Based on high-performance filters as the core components, according to the different components used, module products also include FEMiD (integrated switch, filter, and duplexer), PAMiD (integrated multi-mode and multi-band PA and FEMiD), LPAMiD (PAMiD plus LNA), DiFEM (radio frequency switch and filter), LFEM (Switch, LNA, and Filter), etc.

[0052] However, during the operation of radio frequency chips, they are prone to being affected by electrostatic breakdown, mechanical vibration, humidity, etc. The physical barrier provided by the package can increase the stability and reliability of the chips. At the same time, electromagnetic shielding and isolation can also absorb external electromagnetic interference, reduce internal electromagnetic coupling and interference, and provide heat dissipation paths and protection against physical vibration and shock for the chips. Among them, electromagnetic interference (EMI) refers to the interference phenomenon generated after electromagnetic waves act on electronic components, and there are two types: conducted interference and radiated interference. Conducted interference refers to coupling (interfering) the signals on one electrical network to another electrical network through a conductive medium. Radiated interference refers to the interference source coupling (interfering) its signals to another electrical network through space. In high-speed PCB and system design, high-frequency signal lines, pins of integrated circuits, various connectors, etc. may all become radiated interference sources with antenna characteristics, capable of emitting electromagnetic waves and affecting the normal operation of other systems or other subsystems within the same system.

[0053] In recent years, the distance between components in radio frequency front-end modules has become smaller and smaller, resulting in an increasingly serious problem of mutual interference between components. To reduce the mutual interference between components / subsystems in the packaged module, the method of partition shielding is usually adopted during the module manufacturing process to achieve electromagnetic shielding of sensitive components / subsystems.

[0054] The current encapsulation shielding structure usually forms shielding wire arcs on the ground pads around sensitive components and connects them to the conformal shielding layer to perform partition shielding, thereby effectively improving the mutual interference between components in the module. However, the wire arcs used in this shielding method have a relatively high height, resulting in difficult wire bonding operations, poor wire arc stability. At the same time, the shielding wire arcs are usually discrete spaced wire arcs, and the shielding effect is relatively poor.

[0055] To solve the above problems existing in the prior art, an embodiment of the present invention provides an encapsulation structure. The core idea of the present invention is as follows: According to the spacing between devices or chips that need to be partitioned and shielded, shielding chips, such as dummy chips, are arranged between adjacent radio frequency modules or between multiple chips that need to be partitioned and shielded in a radio frequency module. Or, the functional chips in adjacent radio frequency modules or in a radio frequency module are used as shielding chips. Then, chip pads are arranged on the shielding chips, and the shielding chips are used to form partition shielding by wire bonding, so as to achieve electromagnetic shielding between each sensitive device in the radio frequency module / multiple radio frequency modules and reduce the complexity of the encapsulation shielding structure.

[0056] The encapsulation structure proposed by the present invention will be introduced in detail below. And for the sake of simplifying the drawing, in the drawings provided by the present invention, only one radio frequency module is arranged on the substrate, and only one functional chip and one radio frequency chip are included in this radio frequency module.

[0057] Embodiment 1

[0058] Please refer to Figure 1 , Figure 1 which is an example diagram of the encapsulation structure provided in the embodiment of the present invention.

[0059] As Figure 1 shown, in the embodiment of the present invention, the encapsulation structure includes: a substrate 10, a radio frequency module 20, a chip pad 30, a ground pad 40, a shielding lead 50, a plastic encapsulation layer 60, and a metal shielding layer 70.

[0060] Specifically, the substrate 10 includes a first surface 11 and a second surface 12 which are oppositely arranged. A plurality of ground pads 40 are respectively arranged on the first surface 11 and the second surface 12 of the substrate 10, and via holes 13 located within the substrate 10 penetrate through each layer of the substrate 10 and conduct the ground pads 40 on the first surface 11 and the second surface 12 of the substrate 10 correspondingly. In addition, the via holes 13 also have the function of conducting a functional chip 21 or a dummy chip (see Embodiment 2 in detail), which serves as a shielding chip, to the ground pads 40 on the second surface 12 of the substrate 10. The radio frequency module 20 may specifically include a functional chip 21 and a filter chip 22, wherein the functional chip 21 may include one or a combination of a switch chip, an amplifier chip, a capacitor, and an inductor, but is not limited thereto. The functional chip 21 and the filter chip 22 are arranged at intervals along the second direction D2 on the first surface 11 of the substrate 10. The electrical connection manner between the functional chip 21 and the filter chip 22 and the first surface 11 of the substrate 10 may be common semiconductor packaging processes such as WB (wire bonding), FC (flip chip), or SMT (surface mount technology), but is not limited thereto. At least one chip pad 30 is arranged on the functional chip 21, and the chip pad 30 and the ground pad 40 are electrically connected through a shielding lead 50. The substrate 10, the radio frequency module 20, the chip pad 30, the ground pad 40, and the shielding lead 50 are all buried by the plastic encapsulation layer 60, and the metal shielding layer 70 is conformally covered outside the plastic encapsulation layer 60. The shielding lead 50 includes a first sub-arc 51 and a second sub-arc 52. The first sub-arc 51 includes a first end and a second end. The first end is electrically connected to the chip pad 30, and the second end passes through the plastic encapsulation layer 60 and is at the same horizontal height as its top surface. The second sub-arc 52 includes a third end and a fourth end. The third end is electrically connected to the ground pad 40 located on the first surface 11 of the substrate 10, and the fourth end passes through the plastic encapsulation layer 60 and is at the same horizontal height as its top surface, and the second end and the fourth end do not directly contact. Moreover, the second end of the first sub-arc 51 of the shielding lead 50 and the fourth end of the second sub-arc 52 are directly in contact with the plastic encapsulation layer 60 respectively.

[0061] In this embodiment, the functional chip 21 serves as a partition shielding structure for shielding different other chips (such as multiple filter chips 22 between different radio frequency modules 20), or as a partition shielding structure between multiple chips or devices in the same radio frequency module 20, but is not limited thereto. Obviously, since the functional chip 21 in the radio frequency module 20 is used as the shielding chip in this embodiment, compared with the traditional shielding method, the packaging structure provided by the present utility model has no complex internal shielding structure, and shielding between all chips or between the chips and the outside can be achieved without special process flows, and the packaging volume will not be increased, which conforms to the development trend of miniaturization and can improve the shielding effect at the same time. In addition, since wire bonding is performed on the chip pads 30 on the shielding chip (i.e., the functional chip 21) in this embodiment, the wire arc height of the shielding lead 50 is also reduced, avoiding problems such as difficult operation and unstable wire arc caused by a high wire arc height of the shielding lead 50.

[0062] It should be particularly noted that the multiple chip pads 30 or multiple ground pads 40 in the present utility model can be independently distributed, or some of them can be connected into a strip, or all of them can be connected into a whole strip. And the ground pads 40 should be located between two interfering devices or chips, such as between different radio frequency modules 20, or, for example, between different chips or devices in the same radio frequency module 20, and can be flexibly designed according to the circuit routing requirements, but is not limited thereto. For the convenience of observation, four example top views of different arrangements of the multiple chip pads 30 or multiple ground pads 40 are provided below.

[0063] Example 1, please refer to Figure 2 , Figure 2 For Figure 1 a top view of an example after removing the metal shielding layer 70 from the packaging structure shown. As Figure 2 shown, multiple chip pads 30 can be provided on the functional chip 21 serving as the shielding chip, and the multiple chip pads 30 can be arranged separately along the first direction D1 and the second direction D2 to form a chip pad array, and each of the chip pads 30 in the chip pad array is electrically connected to one of the shielding leads 50, and multiple shielding leads 50 on the same side of the functional chip 21 can be wire-bonded to the same ground pad 40, or multiple shielding leads 50 on the same side of the functional chip 21 can be wire-bonded to different ground pads 40 (not shown), but is not limited thereto.

[0064] Example 2, please refer to Figure 3 , Figure 3 For Figure 1 a top view of an example after removing the metal shielding layer 70 from the packaging structure shown. As Figure 3As shown, a plurality of chip pads 30 may be provided on the functional chip 21 serving as a shielding chip, and the plurality of chip pads 30 may be arranged separately from each other along a first direction D1 and a second direction D2 to form a chip pad array. Among them, each of the chip pads 30 located in the chip pad array is electrically connected to one of the shielding leads 50, and a plurality of the shielding leads 50 located on the same side of the functional chip 21 may be wire-bonded to different ground pads 40, and a plurality of the shielding leads 50 located on the same side of the functional chip 21 may also be wire-bonded to the same ground pad 40 (not shown), but not limited thereto.

[0065] Example 3, please refer to Figure 4 , Figure 4 This is a top view of an evolved example of the packaging structure provided in the present invention after removing the metal shielding layer 70 based on Figure 1 shown. As shown in Figure 4 a plurality of chip pads 30 may be provided on the functional chip 21 serving as a shielding chip, and the plurality of chip pads 30 are arranged separately from each other along the first direction D1, and the plurality of chip pads 30 may be electrically connected to a plurality of the shielding leads 50, and the plurality of shielding leads 50 may be respectively electrically connected to a ground pad 40, and a plurality of the shielding leads 50 located on the same side may also be wire-bonded to the same ground pad 40 (not shown), but not limited thereto.

[0066] It should be particularly noted that since the functional chip 21 serves as a shielding chip, therefore, in order to implement the functions of the functional chip 21 itself, the packaging structure in this embodiment further includes a plurality of functional leads 211 and a plurality of functional pads 212. Some of the plurality of functional pads 212 are located on the functional chip 21, and the remaining part is located on the substrate. And both ends of each of the functional leads 211 need to be electrically connected to the corresponding functional pads 212 located on the functional chip 21 and the substrate 10 respectively. Specifically, the plurality of functional pads 212 may be arranged staggeredly with some or all of the plurality of chip pads 30 or the plurality of ground pads 40 in the first direction D1, so that the projections of the functional pads 212 and the chip pads 30 or the ground pads 40 coincide in the first direction D1. And the end portions of the functional leads 211 are lower than the top surface of the plastic encapsulation layer 60. For the convenience of observation, two example top views of different arrangements of the plurality of chip pads 30, the plurality of ground pads 40 and the plurality of functional pads 212 are provided below.

[0067] Example 1, please refer to Figure 5 , Figure 5 This is a top view of an evolved example of the packaging structure provided in the present invention after removing the metal shielding layer 70 based on Figure 1A top view of an evolution example after removing the metal shielding layer 70 from the shown packaging structure. As Figure 5 shown, on the functional chip 21 serving as a shielding chip, there are provided a plurality of chip pads 30, a plurality of functional pads 212, and a plurality of ground pads 40; wherein, the plurality of functional pads 212 and the plurality of chip pads 30 can be arranged staggeredly along the first direction D1, that is, a chip pad 30 or a ground pad 40 is arranged between two adjacent functional pads 212, and each functional pad 212 located on the functional chip 21 is electrically connected to a functional pad 212 located on the substrate 10 through a functional lead 211.

[0068] Example two, please refer to Figure 6 , Figure 6 This is provided in the present utility model based on Figure 1 A top view of an evolution example after removing the metal shielding layer 70 from the shown packaging structure. As Figure 6 shown, on the functional chip 21 serving as a shielding chip, there are provided a plurality of chip pads 30, a plurality of functional pads 212, and a plurality of ground pads 40; wherein, the plurality of functional pads 212 and the plurality of chip pads 30 can be arranged staggeredly along the first direction D1, that is, the plurality of chip pads 30 or the plurality of ground pads 40 are arranged adjacent to each other and divided into groups, and one or more functional pads 212 are respectively arranged between different groups; and, each functional pad 212 located on the functional chip 21 is electrically connected to a functional pad 212 located on the substrate 10 through a functional lead 211.

[0069] It should be understood that the substrate 10 is any suitable substrate material well known in the art, for example, it can be a silicon substrate, a silicon-containing substrate (such as SiC, SiGe), or a silicon-on-insulator substrate, or a substrate composed of other suitable materials, etc., but not limited thereto. The sum of the height of the chip pad 30 and the height of the shielding lead 50 is greater than the height of the highest device in the RF module 20. Since the sum of the height of the chip pad 30 and the height of the shielding lead 50 is higher than the height of all devices or chips in the RF module 20, the highest device or chip will not be back-ground-grinded in the back thinning process, and thus the performance of the RF module will not be affected. The chip pad 30, the ground pad 40, and the via 13 can be made of the same or different conductive materials, such as one or more of the materials such as Cu, Al, Au, Ag, Sn, etc., or their alloys. The chip pad 30 and the ground pad 40 can be formed during the manufacturing process of the substrate 10, or a metal block can be pasted onto the substrate 10 by SMT or other means. The material of the encapsulation layer 60 includes but is not limited to epoxy resin.

[0070] Those of ordinary skill in the art to which this application pertains should readily understand that, to meet the requirements of actual products, there may be other forms of the packaging structure of this application and it is not limited to the foregoing. The following will further describe other embodiments or variations of the packaging structure of this application. And for simplicity of description, the following description mainly details the differences between the embodiments, and the same parts will not be repeated. In addition, the same components in the embodiments of this application are labeled with the same reference numerals for easy comparison between the embodiments.

[0071] Embodiment 2

[0072] Please refer to Figure 7 , Figure 7 , which is another example diagram of the packaging structure provided in the embodiment of the present utility model.

[0073] As Figure 7 shown, in the embodiment of the present utility model, the packaging structure includes the same components as those in the first embodiment, such as substrate 10, RF module 20, chip pad 30, ground pad 40, shielding lead 50, plastic encapsulation layer 60, and metal shielding layer 70. The same parts will not be repeated here. The main difference between the packaging structure in this embodiment and the foregoing embodiment is that it further includes a dummy chip 80, and the dummy chip 80 serves as a shielding chip, and the dummy chip is located between adjacent RF modules 20, or between the chips in the RF module 20, such as between the functional chip 21 and the RF chip 22 as shown.

[0074] Please refer to Figure 8 and Figure 9 , Figure 8 which is a top view of an example of the packaging structure shown in Figure 7 after removing the metal shielding layer 70; Figure 9 is a top view of an evolved example of the packaging structure provided in the present utility model based on Figure 7 after removing the metal shielding layer 70. As Figure 8 and Figure 9 shown, it can be seen that the multiple chip pads 30 or multiple ground pads 40 in the present utility model can be independently distributed, or some can be connected into a strip, or all can be connected into a whole strip. And the ground pad 40 should be located between two interfering devices or chips, such as between different RF modules 20, or between different chips or devices in the same RF module 20, and can be flexibly designed according to the circuit routing requirements, which is the same as the foregoing embodiment but not limited thereto.

[0075] It should be noted that the methods, processes, and materials involved in the present utility model are all prior arts.

[0076] In summary, according to the spacing between the devices or chips that need to be partitioned and shielded, a shielding chip, such as a dummy chip, is arranged between adjacent radio frequency modules or between multiple chips that need to be partitioned and shielded in a radio frequency module. Alternatively, the functional chips in adjacent radio frequency modules or in a radio frequency module are used as shielding chips. Then, chip pads are arranged on the shielding chips, and the chip pads on the shielding chips and the ground pads on the substrate are electrically connected through shielding leads by wire bonding, achieving the electromagnetic shielding effect, simplifying the packaging process, reducing the complexity of the packaging shielding structure, and shortening the production cycle, which is beneficial to reducing costs and improving the yield.

[0077] Compared with the traditional shielding method, the packaging structure provided by the present utility model has no complex internal shielding structure, and can achieve shielding between all chips or between chips and the outside without special process flows, that is, achieve electromagnetic shielding between sensitive devices in the radio frequency module or between multiple radio frequency modules.

[0078] Moreover, since wire bonding is performed on the chip pads located on the shielding chips in the present utility model, the wire arc height of the shielding leads is also reduced, avoiding the problems of difficult operation and unstable wire arc caused by a relatively high wire arc height of the shielding leads. In addition, as a functional device inside the radio frequency module, the shielding chip will not increase the packaging volume, meeting the development trend of miniaturization while also being able to improve the shielding effect.

[0079] The above description is only a description of the preferred embodiments of the present utility model, and does not limit the scope of the present utility model in any way. Any changes and modifications made by those of ordinary skill in the art of the present utility model according to the above disclosure shall fall within the protection scope of the claims.

Claims

1. A packaging structure, characterized in that: include: A substrate including a first surface and a second surface; A shielding chip is disposed on the first surface of the substrate; A chip pad is disposed on the shielding chip; A ground pad is disposed on the first surface of the substrate on one side or both sides of the shielding chip; A plastic packaging layer is disposed on the substrate and buries the shielding chip, the chip pad and the ground pad; A shielding lead is arranged in the plastic packaging layer, and the shielding lead includes: A first sub-arc includes a first end and a second end, wherein the first end is electrically connected to the chip pad, and the second end passes through the plastic packaging layer and is located at the same level as the top surface thereof; as well as, A second sub-arc includes a third end and a fourth end, wherein the third end is electrically connected to the ground pad, the fourth end passes through the plastic packaging layer and is located at the same level as the top surface thereof, and the second end is not in direct contact with the fourth end; The metal shielding layer is disposed outside the plastic packaging layer and is in direct contact with the second end of the first sub-wire arc and the fourth end of the second sub-wire arc of the shielding lead.

2. The packaging structure according to claim 1, characterized in that: A plurality of chip pads are arranged on the shielding chip, and the plurality of chip pads are arranged spaced apart from each other along a first direction; wherein each of the chip pads is electrically connected to one shielding lead.

3. The packaging structure according to claim 1, characterized in that: A plurality of chip pads are arranged on the shielding chip, and the plurality of chip pads are arranged spaced apart from each other along a first direction and a second direction to form a chip pad array, and each of the chip pads in the chip pad array is electrically connected to one of the shielding leads.

4. The packaging structure according to claim 2 or 3, characterized in that: The shielding leads electrically connected to different chip pads are all electrically connected to the same ground pad in a wire bonding manner.

5. The packaging structure according to claim 2 or 3, characterized in that: The shielding leads electrically connected to different chip pads are all electrically connected to different ground pads in a wire bonding manner.

6. The packaging structure according to claim 2 or 3, characterized in that: Also includes: The radio frequency module comprises a functional chip and a radio frequency chip which are arranged to be separated from each other along a second direction.

7. The packaging structure according to claim 6, characterized in that: The functional chip includes one or a combination of a switch chip, an amplifier chip, a capacitor and an inductor.

8. The packaging structure according to claim 7, characterized in that: The shielding chip is the functional chip; the packaging structure further includes: a plurality of functional pads, part of which is located on the functional chip and the rest of which is located on the substrate; A plurality of functional leads, two ends of each of the functional leads are electrically connected to functional pads located on the functional chip and on the substrate respectively.

9. The packaging structure according to claim 8, characterized in that: The plurality of function pads and at least a portion of the plurality of chip pads or the plurality of ground pads are staggered in the first direction.

10. The packaging structure according to claim 9, characterized in that: The projection of the functional pad and the chip pad or the ground pad in the first direction overlaps.

11. The packaging structure according to claim 7, characterized in that: The shielding chip is a dummy chip, and the dummy chip is located between adjacent RF modules, or between the functional chip and the RF chip in the RF module.

12. The packaging structure according to claim 8, characterized in that: The end of the functional lead is lower than the top surface of the plastic packaging layer.

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