USB expander

By setting the first master module and the second master module in the USB expander and communicating through the I2C protocol, the problem that the existing USB expander cannot support high-power charging and data transmission at the same time is solved, and the complete functional application of different devices is achieved.

CN222980987UActive Publication Date: 2025-06-13ANKER INNOVATIONS TECH CO LTD
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Patent Information

Application Number
CN202420227500.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-30
Publication Date
2025-06-13
Estimated Expiration
2034-01-30

AI Technical Summary

Technical Problem

Existing USB expansion devices cannot support high-power charging and data transmission at the same time, and lack complete functional applications.

Method used

A USB expander is designed with a built-in first master module and a second master module, and different devices are connected through different interfaces to achieve simultaneous data transmission and charging of different devices. The main control modules communicate through the I2C protocol to adjust the output voltage and current to ensure the continuity of charging and data transmission.

Benefits of technology

The USB expansion device realizes high-power charging and data transmission for different devices, solves the problem of single functions in the existing technology, and improves the application integrity and convenience of the device.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a USB expander, and the USB expander comprises a housing which forms an accommodation space inside, and the surface of the housing is provided with at least one first interface and at least one second interface; the first main control module is arranged in the accommodating space and is connected with external first equipment through the first interface; the second main control module is arranged in the accommodating space, is in communication connection with the first main control module and is connected with external second equipment through the second interface; the at least one first device is connected with the corresponding first main control module through the at least one first interface, the at least one second device is connected with the corresponding second main control module through the at least one second interface, and the USB expander transmits data to or charges the first device connected with the first interface through the first main control module. And data transmission or charging is carried out on second equipment connected with the second interface through the second main control module. According to the invention, different main control modules in communication connection are arranged to carry out data transmission and charging operation on different devices at the same time.
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Description

Technical Field

[0001] The present application relates to the technical field of electronic devices, and particularly to a USB expander. Background Art

[0002] With the continuous development of technology, various electronic devices have been developed and used. On the one hand, electronic devices are provided with built-in batteries or external power supplies and enabled to work through electric energy. Therefore, a major focus in the research and development of electronic devices is the charging problem of electronic devices. On the other hand, various existing electronic devices can achieve data transmission. For example, a mobile phone or a computer can be connected to an interface through a data transmission line for data transmission, or a USB flash drive can be directly inserted into the interface for data transmission.

[0003] However, due to compatibility issues, existing USB expanders can usually only achieve a single charging function or a single data transmission function, and cannot ensure both high-power charging and data transmission, resulting in a lack of complete functional applications for USB expanders. Utility Model Content

[0004] The present application provides a USB expander, which can solve the problem that existing USB expanders cannot support both high-power charging and data transmission simultaneously.

[0005] The present application provides a USB expander, which includes:

[0006] A housing, an accommodation space is formed inside the housing, and at least one first interface and at least one second interface are provided on one side surface of the housing, and the first interface and the second interface communicate with the accommodation space;

[0007] A first main control module, disposed in the accommodation space, connected to an external first device through the first interface, and the USB expander performs data transmission or charging on the first device through the first main control module;

[0008] A second main control module, disposed in the accommodation space, communicatively connected to the first main control module, connected to an external second device through the second interface, and the USB expander performs data transmission or charging on the second device through the second main control module;

[0009] Wherein, when at least one first device is connected to the corresponding first main control module through at least one first interface, and at least one second device is connected to the corresponding second main control module through at least one second interface, the USB expander performs data transmission or charging on the first device connected to the first interface through the first main control module, and the USB expander performs data transmission or charging on the second device connected to the second interface through the second main control module.

[0010] Different from the prior art, in the present application, a first main control module and a second main control module are arranged in the accommodation space inside the housing, and the first main control module is connected to an external first device through a first interface, and the second main control module is connected to an external second device through a second interface, so as to simultaneously perform data transmission and charging operations on different devices through different main control modules; at the same time, since the first main control module and the second main control module are communicatively connected to each other, when a new device accesses the USB expander through the first interface or the second interface, the first main control module or the second main control module connected to the corresponding interface can notify the other main control module to adjust the voltage magnitude and / or current magnitude output by the other main control module, preventing problems such as data transmission or charging interruption of the connected electronic device.

[0011] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and do not limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0013] Figure 1 is the first structural schematic diagram of an embodiment of the USB expander of the present application;

[0014] Figure 2 is the second structural schematic diagram of an embodiment of the USB expander of the present application;

[0015] Figure 3 is Figure 1 the first circuit structural schematic diagram of an embodiment of the first main control module in

[0016] Figure 4 is Figure 1 the second circuit structural schematic diagram of an embodiment of the first main control module in

[0017] Figure 5 is Figure 1 the third circuit structural schematic diagram of an embodiment of the first main control module in

[0018] Figure 6 is Figure 1 the first circuit structural schematic diagram of an embodiment of the second main control module in

[0019] Figure 7 is Figure 1 the second circuit structural schematic diagram of an embodiment of the second main control module in

[0020] Figure 8 is Figure 1 a schematic diagram of a third circuit structure of a second main control module in an embodiment;

[0021] Figure 9 is a schematic diagram of a third structure of a USB expander according to an embodiment of the present application;

[0022] Figure 10 is a schematic diagram of a fourth structure of a USB expander according to an embodiment of the present application. Detailed implementation manners

[0023] To enable those skilled in the art to better understand the technical solutions of the present application, the USB expander provided by the present application will be further described in detail below with reference to the accompanying drawings and specific implementation manners. It can be understood that the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0024] The terms "first", "second", etc. in the present application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include steps or units not listed, or may optionally further include other steps or units inherent to these processes, methods, products or devices.

[0025] To solve the problem that the USB expander in the prior art cannot support high-power charging and data transmission simultaneously, the present application provides a USB expander, which is provided with different main control modules that communicate with each other, and different main control modules are connected to different electronic devices through different interfaces on the USB expander to realize data transmission and charging operations for different electronic devices respectively.

[0026] Please refer to Figure 1 and Figure 2 , Figure 1 is a schematic diagram of a first structure of a USB expander according to an embodiment of the present application, Figure 2 is a schematic diagram of a second structure of a USB expander according to an embodiment of the present application. As Figure 1 shown, the USB expander 1 of this embodiment includes a housing 101, a first main control module 13, and a second main control module 14.

[0027] As Figure 1As shown in the figure, an accommodation space 102 is formed inside the housing 101. A plurality of interfaces are provided on one side surface of the housing 101, for example, it may include at least one first interface 11 and at least one second interface 12, and the first interface 11 and the second interface 12 are in communication with the accommodation space 102.

[0028] Optionally, the first interface 11 and the second interface 12 of this embodiment are TYPE-C interfaces, which can realize power charging and data transmission for the external first device connected to the first interface 11 or the external second device connected to the second interface 12.

[0029] As Figure 2 shown in the figure, the first main control module 13 is disposed in the accommodation space 102. The first main control module 13 is connected to the first device through the first interface 11, and is used to control data transmission or charging for the first device.

[0030] The second main control module 14 is disposed in the accommodation space 102 and is connected to the second device through the second interface 12, and is used to perform data transmission or charging for the second device. At the same time, the first main control module 13 and the second main control module 14 are communicatively connected. When the second device has been connected to the first main control module 13, if the first device is connected to the first main control module 13 through the first interface 11, the first main control module 13 can notify the second main control module 14 to adjust the voltage magnitude and / or current magnitude output by the second main control module 14; or, when the second main control module 14 is connected to the second device through the second interface 12, it can notify the first main control module 13 to adjust the voltage magnitude and / or current magnitude output by the first main control module 13. Specifically, the first main control module 13 and the second main control module 14 of this embodiment communicate through the I2C protocol.

[0031] Specifically, the USB expander 1 of this embodiment can realize that when the first device is connected to the first main control module 13 through the first interface 11 and the second device is connected to the second main control module 14 through the second interface 12, the USB expander 1 charges the first device through the first main control module 13. At the same time, the USB expander 1 performs data transmission on the second device through the second main control module 14, and since the first interface 11 is a TYPE-C interface, high-power charging for the first device and data transmission for the second device can be realized.

[0032] Or, the USB expander 1 of this embodiment can realize that when the first device is connected to the first main control module 13 through the first interface 11 and the second device is connected to the second main control module 14 through the second interface 12, the USB expander 1 performs data transmission on the first device through the first main control module 13. At the same time, the USB expander 1 charges the second device through the second main control module 14, and since the second interface 12 is a TYPE-C interface, high-power charging for the second device and data transmission for the first device can be realized.

[0033] Alternatively, the USB expander 1 of this embodiment can achieve that when the first device is connected to the first main control module 13 through the first interface 11, and the second device is connected to the second main control module 14 through the second interface 12, the USB expander 1 charges the first device through the first main control module 13, and at the same time, the USB expander 1 charges the second device through the second main control module 14. Since both the first interface 11 and the second interface 12 are TYPE-C interfaces, high-power charging for the first device and high-power charging for the second device can be achieved.

[0034] Alternatively, the USB expander 1 of this embodiment can achieve that when the first device is connected to the first main control module 13 through the first interface 11, and the second device is connected to the second main control module 14 through the second interface 12, the USB expander 1 performs data transmission on the first device through the first main control module 13, and at the same time, the USB expander 1 performs data transmission on the second device through the second main control module 14, so as to achieve data transmission for the second device and data transmission for the first device.

[0035] The USB expander 1 of this embodiment sets the first main control module 13 and the second main control module 14 in the accommodation space 102 of the housing 101. The first main control module 13 is connected to the first device through the first interface 11, and the second main control module 14 is connected to the second device through the second interface 12, so as to perform data transmission and charging operations on the first device through the first main control module 13 and on the first device through the second main control module 14 simultaneously.

[0036] Moreover, since the first main control module 13 and the second main control module 14 are communicatively connected to each other, when a new device is connected to the USB expander 1 through the first interface 11 or the second interface 12, one of the first main control module 13 and the second main control module 14 connected to the corresponding interface can notify the other of the first main control module 13 and the second main control module 14 to adjust the voltage magnitude and / or current magnitude output by the main control module, so as to prevent problems such as data transmission interruption or charging interruption of the already connected first device or second device.

[0037] Furthermore, as Figure 2 shown, the first main control module 13 of this embodiment includes a first base 131, a first main control chip 132, and a first voltage conversion chip 133, wherein the first main control module 13 is connected to the first interface 11 through the first base 131.

[0038] The first main control chip 132 is connected to the first base 131 and the first voltage conversion chip 133. The first voltage conversion chip 133 is further connected to the first base 131 to receive data or output voltage outward through the first base 131 and the first interface 11. Among them, the first main control chip 132 obtains the first device information through the first base 131 and the first interface 11. The first device information includes the device type of the first device and the charging power of the first device. The first main control chip 132 adjusts the voltage output by the first main control chip 132 based on the first device information, and further adjusts the voltage magnitude and / or current magnitude output from the first interface 11 to the first device. Specifically, the first voltage conversion chip 133 is connected to the first main control chip 132 and receives the first control signal generated by the first main control chip 132 based on the first device information to adjust the voltage magnitude and / or current magnitude output by the first voltage conversion chip 133.

[0039] Combined with Figure 1 - Figure 2 , further refer to Figure 3 - Figure 5 , Figure 3 is Figure 1 the schematic diagram of the first circuit structure of an embodiment of the first main control module in Figure 4 is Figure 1 the schematic diagram of the second circuit structure of an embodiment of the first main control module in Figure 5 is Figure 1 the schematic diagram of the third circuit structure of an embodiment of the first main control module in

[0040] As Figure 3 shown, the first main control module 13 of this embodiment further includes a first pin capacitor C1A, a second pin capacitor C1B, a third pin capacitor C1C, a fourth pin capacitor C1D, a fifth pin capacitor C2A, a sixth pin capacitor C2B, a seventh pin capacitor C2C, and an eighth pin capacitor C2D. Among them, the first pin capacitor C1A, the second pin capacitor C1B, the third pin capacitor C1C, the fourth pin capacitor C1D, the fifth pin capacitor C2A, the sixth pin capacitor C2B, the seventh pin capacitor C2C, and the eighth pin capacitor C2D are all voltage stabilizing capacitors, which are used to filter and stabilize the voltage.

[0041] Specifically, the first pin TX1+ of the first base 131 is connected to one end of the first pin capacitor C1A, and the other end of the first pin capacitor C1A is connected to the first transmission pin of the first interface 11; the second pin TX1- of the first base 131 is connected to one end of the second pin capacitor C1B, and the other end of the second pin capacitor C1B is connected to the second transmission pin of the first interface 11; the third pin TX2- of the first base 131 is connected to one end of the seventh pin capacitor C2C, and the other end of the seventh pin capacitor C2C is connected to the third transmission pin of the first interface 11; the fourth pin TX2+ of the first base 131 is connected to one end of the eighth pin capacitor C2D, and the other end of the eighth pin capacitor C2D is connected to the fourth transmission pin of the first interface 11; the fifth pin RX2- of the first base 131 is connected to one end of the fifth pin capacitor C2A, and the other end of the fifth pin capacitor C2A is connected to the first receiving pin of the first interface 11; the sixth pin RX2+ of the first base 131 is connected to one end of the sixth pin capacitor C2B, and the other end of the sixth pin capacitor C2B is connected to the second receiving pin of the first interface 11; the seventh pin RX1+ of the first base 131 is connected to one end of the third pin capacitor C1C, and the other end of the third pin capacitor C1C is connected to the third receiving pin of the first interface 11; the eighth pin RX1- of the first base 131 is connected to one end of the fourth pin capacitor C1D, and the other end of the fourth pin capacitor C1D is connected to the fourth receiving pin of the first interface 11.

[0042] The ninth pin GND1, tenth pin GND2, eleventh pin GND3, and twelfth pin GND4 of the first base 131 are all ground pins for grounding. Optionally, the ninth pin GND1, tenth pin GND2, eleventh pin GND3, and twelfth pin GND4 can be grounded separately or connected to the same node and grounded through this node.

[0043] The thirteenth pin VBUS1, fourteenth pin VBUS2, fifteenth pin VBUS3, and sixteenth pin VBUS4 of the first base 131 are voltage pins for connecting to the voltage output pins of the first interface 11 to output a charging voltage.

[0044] The seventeenth pin CC1 and eighteenth pin CC2 of the first base 131 are data acquisition pins for acquiring first device information, and acquiring the device type of the first device and the charging power of the first device through the first interface 11.

[0045] As Figure 4As shown, the first main control module 13 of this embodiment further includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, and a second resistor R2. Among them, the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 are all voltage stabilizing capacitors, which are used to filter and stabilize the voltage.

[0046] Specifically, the first pin VBUS-PWR of the first main control chip 132 is connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded. The second pin VBUS-MON of the first main control chip 132 is connected to one end of the second capacitor C2 and one end of the first resistor R1, and the other end of the second capacitor C2 is grounded; the first main control chip 132 outputs a voltage through the other end of the first pin VBUS-PWR or the first resistor R1. Among them, the first main control chip 132 outputs a first voltage VOUT_1 through the first pin VBUS-PWR, and the first main control chip 132 outputs a second voltage VOUT_2 through the other end of the first resistor R1.

[0047] The third pin CC1 of the first main control chip 132 is connected to one end of the third capacitor C3, and the fourth pin CC2 of the first main control chip 132 is connected to one end of the fourth capacitor C4. The other end of the third capacitor C3 is connected to the other end of the fourth capacitor C4 and is further grounded. Specifically, the first main control chip 132 of this embodiment obtains data through the third pin CC1 and the fourth pin CC2, and then obtains the device type of the first device and the charging power of the first device.

[0048] The fifth pin VDD-5V of the first main control chip 132 is connected to one end of the fifth capacitor C5 and one end of the second resistor R2. The sixth pin VDD-1P8 of the first main control chip 132 is connected to one end of the sixth capacitor C6. The other end of the fifth capacitor C5 is connected to the other end of the sixth capacitor C6 and is further grounded. The other end of the second resistor R2 receives the supply voltage VCC.

[0049] As Figure 5As shown in the figure, the first main control module 13 of this embodiment further includes a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first inductor L1, and a first energy storage capacitor CE1. Among them, the seventh capacitor C7, the eighth capacitor C8, the ninth capacitor C9, the tenth capacitor C10, the eleventh capacitor C11, the twelfth capacitor C12, the thirteenth capacitor C13, the fourteenth capacitor C14, the fifteenth capacitor C15, and the first energy storage capacitor CE1 are all voltage stabilizing capacitors, which are used to filter and stabilize the voltage.

[0050] Specifically, the first pin IN of the first voltage conversion chip 133 is connected to one end of the third resistor R3, one end of the fourth resistor R4, one end of the seventh capacitor C7, one end of the eighth capacitor C8, and one end of the ninth capacitor C9. The other end of the third resistor R3 receives the input voltage DC_IN. The other ends of the seventh capacitor C7, the eighth capacitor C8, and the ninth capacitor C9 are further grounded. Among them, the input voltage DC_IN is sent by the DC adapter connected to the USB expander 1, that is, the first voltage conversion chip 133 receives the input voltage DC_IN output by the DC adapter through the first pin IN.

[0051] The second pin EN of the first voltage conversion chip 133 is connected to the other end of the fourth resistor R4, one end of the fifth resistor R5, and one end of the tenth capacitor C10. The other end of the fifth resistor R5 is connected to the other end of the tenth capacitor C10 and is further grounded.

[0052] The third pin BST of the first voltage conversion chip 133 is connected to one end of the eleventh capacitor C11. The fourth pin SW of the first voltage conversion chip 133 is connected to the other end of the eleventh capacitor C11 and one end of the first inductor L1. The other end of the first inductor L1 is connected to one end of the thirteenth capacitor C13, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15, and one end of the first energy storage capacitor CE1. The other ends of the thirteenth capacitor C13, the fourteenth capacitor C14, the fifteenth capacitor C15, and the first energy storage capacitor CE1 are further grounded.

[0053] The fifth pin FB of the first voltage conversion chip 133 is connected to one end of the sixth resistor R6, one end of the twelfth capacitor C12, and one end of the seventh resistor R7. The other end of the sixth resistor R6 is connected to the other end of the twelfth capacitor C12 and the other end of the first inductor L1. The other end of the seventh resistor R7 is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is further grounded.

[0054] Combined with Figure 4 and Figure 5 , a first node a is formed among the fifth pin FB of the first voltage conversion chip 133, one end of the sixth resistor R6, one end of the twelfth capacitor C12, and one end of the seventh resistor R7. The first node a is connected to one end of the ninth resistor R9, and the other end of the ninth resistor R9 is connected to the seventh pin FB of the first main control chip 132.

[0055] The other end of the first inductor L1, one end of the thirteenth capacitor C13, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15, and one end of the first energy storage capacitor CE1 form a sixth node f. The sixth node f is connected to the first base 131 for outputting a charging voltage vout1.

[0056] Furthermore, as Figure 2 shown, the second main control module 14 of this embodiment includes a second base 141, a second main control chip 142, and a second voltage conversion chip 143. The second main control module 14 is connected to the second interface 12 through the second base 141.

[0057] The second main control chip 142 is connected to the second base 141 and the second voltage conversion chip 143. The second voltage conversion chip 143 is further connected to the second base 141 to receive data or output a voltage through the second base 141 and the second interface 12. Among them, the second main control chip 142 obtains second device information through the second base 141 and the second interface 12. The second device information includes the device type of the second device and the charging power of the second device. The second main control chip 142 adjusts the voltage output by the second main control chip 142 based on the second device information, and further adjusts the voltage magnitude and / or current magnitude output from the second interface 12 to the second device. Specifically, the second voltage conversion chip 143 is connected to the second main control chip 142 to receive a second control signal generated by the second main control chip 142 based on the first device information to adjust the voltage magnitude and / or current magnitude output by the second voltage conversion chip 143.

[0058] Combined with Figure 1 - Figure 2 , further referring to Figure 6 - Figure 8 , Figure 6 is Figure 1 the first circuit structure diagram of an embodiment of the second main control module in Figure 7 is Figure 1 the second circuit structure diagram of an embodiment of the second main control module in Figure 8 is Figure 1 the third circuit structure diagram of an embodiment of the second main control module in

[0059] As Figure 6As shown in the figure, the second main control module 14 of this embodiment further includes a ninth-pin capacitor C3A, a tenth-pin capacitor C3B, an eleventh-pin capacitor C3C, a twelfth-pin capacitor C3D, a thirteenth-pin capacitor C4A, a fourteenth-pin capacitor C4B, a fifteenth-pin capacitor C4C, and a sixteenth-pin capacitor C4D. Among them, the ninth-pin capacitor C3A, the tenth-pin capacitor C3B, the eleventh-pin capacitor C3C, the twelfth-pin capacitor C3D, the thirteenth-pin capacitor C4A, the fourteenth-pin capacitor C4B, the fifteenth-pin capacitor C4C, and the sixteenth-pin capacitor C4D are all voltage-regulating capacitors, which are used to filter and regulate the voltage.

[0060] Specifically, the first pin TX1+ of the second base 141 is connected to one end of the ninth-pin capacitor C3A, and the other end of the ninth-pin capacitor C3A is connected to the first transmission pin of the second interface 12; the second pin TX1- of the second base 141 is connected to one end of the tenth-pin capacitor C3B, and the other end of the tenth-pin capacitor C3B is connected to the second transmission pin of the second interface 12; the third pin TX2- of the second base 141 is connected to one end of the fifteenth-pin capacitor C4C, and the other end of the third-pin capacitor C4C is connected to the third transmission pin of the second interface 12; the fourth pin TX2+ of the second base 141 is connected to one end of the sixteenth-pin capacitor C4D, and the other end of the sixteenth-pin capacitor C4D is connected to the fourth transmission pin of the second interface 12; the fifth pin RX2- of the second base 141 is connected to one end of the thirteenth-pin capacitor C4A, and the other end of the thirteenth-pin capacitor C4A is connected to the first receiving pin of the second interface 12; the sixth pin RX2+ of the second base 141 is connected to one end of the fourteenth-pin capacitor C4B, and the other end of the fourteenth-pin capacitor C4B is connected to the second receiving pin of the second interface 12; the seventh pin RX1+ of the second base 141 is connected to one end of the eleventh-pin capacitor C3C, and the other end of the eleventh-pin capacitor C3C is connected to the third receiving pin of the second interface 12; the eighth pin RX1- of the second base 141 is connected to one end of the twelfth-pin capacitor C3D, and the other end of the twelfth-pin capacitor C3D is connected to the fourth receiving pin of the second interface 12.

[0061] The ninth pin GND1, the tenth pin GND2, the eleventh pin GND3, and the twelfth pin GND4 of the second base 141 are all grounding pins for grounding. Optionally, the ninth pin GND1, the tenth pin GND2, the eleventh pin GND3, and the twelfth pin GND4 of this embodiment are connected to the fourth node d and grounded through the fourth node.

[0062] The thirteenth pin VBUS1, fourteenth pin VBUS2, fifteenth pin VBUS3, and sixteenth pin VBUS4 of the second base 141 are voltage pins, which are used to connect to the voltage output pins of the first interface 11 to output a charging voltage. Among them, in this embodiment, the thirteenth pin VBUS1 is connected to the fourteenth pin VBUS2, and the fifteenth pin VBUS3 is connected to the sixteenth pin VBUS4.

[0063] The seventeenth pin CC1 and eighteenth pin CC2 of the second base 141 are data acquisition pins, which are used to acquire second device information, and acquire the device type of the second device and the charging power of the second device through the second interface 12.

[0064] As Figure 7 shown, the second main control module 14 of this embodiment further includes a sixteenth capacitor C16, seventeenth capacitor C17, eighteenth capacitor C18, nineteenth capacitor C19, and twentieth capacitor C20, twenty-first capacitor C21, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, fourteenth resistor R14, and first switching device Q1. Among them, the sixteenth capacitor C16, seventeenth capacitor C17, eighteenth capacitor C18, nineteenth capacitor C19, and twentieth capacitor C20, twenty-first capacitor C21 are all voltage stabilizing capacitors, which are used to filter and stabilize the voltage.

[0065] Specifically, the first pin CC1 of the second main control chip 142 is connected to one end of the sixteenth capacitor C16, the second pin CC2 of the second main control chip 142 is connected to one end of the seventeenth capacitor C17, and the other end of the sixteenth capacitor C16 is connected to the other end of the seventeenth capacitor C17, and further grounded; the second main control chip 142 acquires data through the first pin CC1 and the second pin CC2, and then acquires the device type of the second device and the charging power of the second device.

[0066] The third pin VBUS-PWR of the second main control chip 142 is connected to one end of the eighteenth capacitor C18, and the other end of the eighteenth capacitor C18 is grounded. The fourth pin VBUS-MON of the second main control chip 142 is connected to one end of the nineteenth capacitor C19, and the other end of the nineteenth capacitor C19 is connected to one end of the twentieth capacitor C20 and further grounded. The other end of the twentieth capacitor C20 is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11 and the base of the first switching device Q1. The other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12, one end of the thirteenth resistor R13, and one end of the twenty-first capacitor C21. The other end of the twelfth resistor R12 is connected to the collector of the first switching device Q1. The emitter of the first switching device Q1 is connected to the other end of the thirteenth resistor R13, the other end of the twenty-first capacitor C21, and one end of the fourteenth resistor R14, and the other end of the fourteenth resistor R14 is further grounded.

[0067] Among them, a second node b is formed among the other end of the eleventh resistor R11, one end of the twelfth resistor R12, one end of the thirteenth resistor R13, and one end of the twenty-first capacitor C21. The second main control chip 142 outputs a voltage through the third pin VBUS-PWR or the second node b. The second main control chip 142 outputs a third voltage VOUT_3 through the first pin VBUS-PWR, and the second main control chip 142 outputs a fourth voltage VOUT_4 through the second node b.

[0068] Combined with Figure 4 and Figure 7 It can be known that the first main control module 13 of this embodiment further includes a twenty-first resistor R21 and a twenty-second resistor R22. The eighth pin NC7 of the first main control chip 132 is connected to the fifth pin P2 / SDA of the second main control chip 142 through the twenty-first resistor R21, and the ninth pin NC5 of the first main control chip 132 is connected to the sixth pin AD4 of the second main control chip 142 through the twenty-second resistor R22 to realize data communication between the first main control chip 132 and the second main control chip 142.

[0069] Combined with Figure 6 and Figure 7It can be seen that the second main control module 14 further includes a twenty-third resistor R23 and a twenty-fourth resistor R24. The nineteenth pin G1, the twenty-second pin G2, the twenty-first pin G3, and the twenty-second pin G4 of the second base 141 are connected to the fifth node e. Further, the fourth node d is connected to the fifth node e. The fifth node e is connected to one end of the twenty-third resistor R23 and one end of the twenty-fourth resistor R24. The other end of the twenty-fourth resistor R24 is further grounded. One end of the twenty-fourth resistor R24 is connected to the seventh pin CS- of the second main control chip 142, and the other end of the twenty-third resistor R23 is connected to the eighth pin CS+ of the second main control chip 142. Optionally, the seventh pin CS- and the eighth pin CS+ of the second main control chip 142 in this embodiment can be connected through a capacitor.

[0070] As Figure 8 shown, the second main control module 14 of this embodiment further includes a twenty-second capacitor C22, a twenty-third capacitor C23, a twenty-fourth capacitor C24, a twenty-fifth capacitor C25, a twenty-sixth capacitor C26, a twenty-seventh capacitor C27, a twenty-eighth capacitor C28, a twenty-ninth capacitor C29, a thirtieth capacitor C30, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a second inductor L2, and a second energy storage capacitor CE2. Among them, the twenty-second capacitor C22, the twenty-third capacitor C23, the twenty-fourth capacitor C24, the twenty-fifth capacitor C25, the twenty-sixth capacitor C26, the twenty-seventh capacitor C27, the twenty-eighth capacitor C28, the twenty-ninth capacitor C29, the thirtieth capacitor C30, and the second energy storage capacitor CE2 are all voltage stabilizing capacitors, which are used for filtering and stabilizing the voltage.

[0071] Among them, the first pin IN of the second voltage conversion chip 143 is connected to one end of the fifteenth resistor R15, one end of the sixteenth resistor R16, one end of the twenty-second capacitor C22, one end of the twenty-third capacitor C23, and one end of the twenty-fourth capacitor C24. The other end of the fifteenth resistor R15 receives the input voltage DC_IN. The other ends of the twenty-second capacitor C22, the twenty-third capacitor C23, and the twenty-fourth capacitor C24 are further grounded. Among them, the input voltage DC_IN is sent by a DC adapter connected to the USB expander 1, that is, the second voltage conversion chip 143 receives the input voltage DC_IN output by the DC adapter through the first pin IN.

[0072] The second pin EN of the second voltage conversion chip 143 is connected to the other end of the sixteenth resistor R16, one end of the seventeenth resistor R17, and one end of the twenty-fifth capacitor C25. The other end of the seventeenth resistor R17 is connected to the other end of the twenty-fifth capacitor C25 and is further grounded;

[0073] The third pin BST of the second voltage conversion chip 143 is connected to one end of the twenty-sixth capacitor C26. The fourth pin SW of the second voltage conversion chip 143 is connected to the other end of the twenty-sixth capacitor C26 and one end of the second inductor L2. The other end of the second inductor L2 is connected to one end of the twenty-eighth capacitor C28, one end of the twenty-ninth capacitor C29, one end of the thirtieth capacitor C30, and one end of the second energy storage capacitor CE2. The other ends of the twenty-eighth capacitor C28, the twenty-ninth capacitor C29, the thirtieth capacitor C30, and the second energy storage capacitor CE2 are further grounded.

[0074] The fifth pin FB of the second voltage conversion chip 143 is connected to one end of the eighteenth resistor R18, one end of the twenty-seventh capacitor C27, and one end of the nineteenth resistor R19. The other end of the nineteenth resistor R19 is connected to the other end of the twenty-seventh capacitor C27 and the other end of the second inductor L2. The other end of the nineteenth resistor R19 is connected to one end of the twentieth resistor R20, and the other end of the twentieth resistor R20 is further grounded.

[0075] Combined Figure 7 and Figure 8 A third node c is formed among the fifth pin FB of the second voltage conversion chip 143, one end of the eighteenth resistor R18, one end of the twenty-seventh capacitor C27, and one end of the nineteenth resistor R19. The third node c is connected to the emitter of the first switching device Q1, the other end of the thirteenth resistor R13, the other end of the twenty-first capacitor C21, and one end of the fourteenth resistor R14.

[0076] The other end of the second inductor L2, one end of the twenty-eighth capacitor C28, one end of the twenty-ninth capacitor C29, one end of the thirtieth capacitor C30, and one end of the second energy storage capacitor CE2 form a seventh node g. The seventh node g is connected to the second base 141 for outputting the charging voltage vout2.

[0077] Specifically, the first voltage conversion chip 133 and the second voltage conversion chip 143 of this embodiment receive the input voltage DC_IN output by the same DC adapter. Since the first module 13 and the second module 14 communicate through the I2C protocol, the output charging voltages of each other are adjusted through data communication, that is, the charging voltages vout1 / vout2 are adjusted, so as to realize charging different devices with the same input voltage DC_IN.

[0078] In one embodiment, when the first device in this embodiment is a tablet and the second device is a hard disk. The tablet is connected to the USB expander 1 through the first interface 11, and the first main control module 13 outputs a voltage so that the tablet is charged at a power of 15 / 2 A. At this time, when the hard disk is connected to the USB expander 1 through the second interface 12, the second main control chip 142 of the second main control module 14 obtains the device type and charging power of the hard disk through the first pin CC1 and the second pin CC2, and communicates with the first main control chip 132 through the I2C protocol. The first main control chip 132 adjusts the power for charging the tablet based on the communication information, while ensuring that the charging or data transmission of the tablet will not be interrupted.

[0079] The present application also provides another USB expander 1, in combination with Figure 1 - Figure 8 , further referring to Figure 9 , Figure 9 is the third structural schematic diagram of an embodiment of the USB expander of the present application. As Figure 9 shown, the USB expander 1 of this embodiment includes at least one first main control module 13 and at least one second main control module 14. Each first main control module 13 includes a first base 131, a first main control chip 132, and a first voltage conversion chip 133. Each second main control module 14 includes a second base 141, a second main control chip 142, and a second voltage conversion chip 143. That is, the USB expander 1 of this embodiment includes at least one first main control chip 132 and at least one second main control chip 142.

[0080] Optionally, the specific structures of the first main control module 13 and the second main control module 14 of the present application may be as described in any embodiment of the above first main control module 13 and any embodiment of the second main control module 14, and will not be elaborated here.

[0081] Among them, in this embodiment, any one of the at least one first main control chip 132 and the at least one second main control chip 142 is defined as the main control chip, and the other main control chips are defined as the secondary control chips. The main control chip and the secondary control chips are communicatively connected. Specifically, the main control chip and the secondary control chips of this embodiment communicate through the I2C protocol.

[0082] The multiple secondary control chips include a first secondary control chip and a second secondary control chip. The first secondary control chip is connected to a first device or a second device, and the second secondary control chip is not connected to the first device or the second device. When the second secondary control chip is connected to a new first device or a new second device and obtains new first device information or new second device information, the second secondary control chip sends the new first device information or new second device information to the main control chip, and further transmits the new first device information or new second device information to the first secondary control chip through the main control chip, so that it adjusts the voltage magnitude and / or current magnitude output from the corresponding first interface 11 to the first device, or adjusts the voltage magnitude and / or current magnitude output from the corresponding second interface 12 to the second device based on the new first device information or new second device information.

[0083] For example, this embodiment includes two first main control modules 13 and two second main control modules 14. Figure 9 The first main control chip 132 in the first main control module 13 shown on the left is defined as the main control chip, and the first main control chip 132 in the second main control module 13 and the second main control chips 142 in the two second main control modules 14 are defined as secondary control chips.

[0084] At this time, the main control chip is connected to the first device, and the first second main control module 14 is connected to the second device. When the second second main control module 14 accesses a new second device, the second main control chip 142 of the second second main control module 14 obtains the new second device information, that is, the secondary control chip obtains the new second device information, and sends the new second device information to the main control chip through I2C communication. The main control chip sends the new second device information to another secondary control chip, so that it correspondingly adjusts the output voltage magnitude and / or current magnitude, that is, the second main control chip 142 of the first second main control module 14 adjusts the output voltage magnitude and / or current magnitude to the corresponding second device.

[0085] Optionally, in other embodiments, multiple first main control chips 132 and multiple second main control chips 142 can also be connected through an existing master-slave data communication method.

[0086] This application also provides another USB expander 1. Combining Figure 1 - Figure 8 , and further referring to Figure 10 , Figure 10 is the fourth structural schematic diagram of an embodiment of the USB expander of this application. As Figure 10 shown, the USB expander 1 of this embodiment includes at least one first main control module 13, at least one second main control module 14, and a signal processing chip 15.

[0087] Optionally, the specific structures of the first main control module 13 and the second main control module 14 of the present application may be as described in any embodiment of the above-mentioned first main control module 13 and any embodiment of the second main control module 14, and will not be elaborated here. That is, the USB expander 1 of this embodiment includes at least one first main control chip 132 and at least one second main control chip 142.

[0088] Specifically, the signal processing chip 15 is communicatively connected to at least one first main control chip 132 and at least one second main control chip 142. Optionally, in one embodiment, the signal processing chip 15 and at least one first main control chip 132 and at least one second main control chip 142 may communicate through the I2C protocol, where the signal processing chip 15 is the main control chip, and at least one first main control chip 132 and at least one second main control chip 142 are slave control chips; or, in another embodiment, the communication protocol used may also be UART (Universal Asychronous Receiver Transmitter), SPI (Serial Peripheral Interface), etc.

[0089] When any one of the at least one first main control chip 132 connects to a new first device and obtains new first device information, the signal processing chip 15 transmits the new first device information to the first main control chip 132 connected to the first device, and / or transmits it to the second main control chip 142 connected to the second device;

[0090] Or, when any one of the at least one second main control chip 142 connects to a new second device and obtains new second device information, the signal processing chip 15 transmits the new second device information to the first main control chip 132 connected to the first device, and / or transmits it to the second main control chip 142 connected to the second device.

[0091] For example, this embodiment includes two first main control modules 13 and two second main control modules 14. From Figure 10 the left to the right are the first first main control module 13, the first second main control module 14, the second first main control module 13, and the second second main control module 14.

[0092] At this time, the first first main control module 13 is connected to the first device, and the first second main control module 14 is connected to the second device. When the second first main control module 13 accesses a new first device, the first main control chip 132 of the second first main control module 13 obtains the information of the new first device, and transmits the information data of the new first device to the signal processing chip 15 through data communication. The signal processing chip 15 transmits the information of the new first device to the first main control chip 132 of the first first main control module 13, so that it correspondingly adjusts the voltage magnitude and / or current magnitude corresponding to the first device, and transmits the information of the new first device to the second main control chip 142 of the first second main control module 14, so that it correspondingly adjusts the voltage magnitude and / or current magnitude corresponding to the second device.

[0093] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A USB expander, characterized in that: The USB expander comprises: A housing, wherein an accommodating space is formed inside the housing, and at least one first interface and at least one second interface are provided on the surface of the housing, wherein the first interface and the second interface are connected to the accommodating space; A first main control module is arranged in the accommodating space and connected to an external first device through the first interface, and the USB expander transmits data or charges the first device through the first main control module; A second main control module is arranged in the accommodating space, is communicatively connected with the first main control module, and is connected to an external second device through the second interface. The USB expander transmits data or charges the second device through the second main control module; Among them, when at least one of the first devices is connected to the corresponding first main control module through at least one of the first interfaces, and at least one of the second devices is connected to the corresponding second main control module through at least one of the second interfaces, the USB expander transmits data or charges data to the first device connected to the first interface through the first main control module, and the USB expander transmits data or charges data to the second device connected to the second interface through the second main control module.

2. The USB expander according to claim 1, characterized in that: The first main control module includes: A first base, connected to the first interface; a first main control chip connected to the first base to obtain first device information through the first base and the first interface, wherein the first device information includes a device type of the first device and a charging power of the first device; Wherein, the first main control chip adjusts the voltage and / or current output by the first interface based on the first device information; The second main control module includes: A second base, connected to the second interface; a second main control chip connected to the second base to obtain second device information through the second base and the second interface, wherein the second device information includes a device type of the second device and a charging power of the second device; The second main control chip adjusts the voltage and / or current output by the second interface based on the second device information.

3. The USB expander according to claim 2, characterized in that: The first main control module also includes a first voltage conversion chip, which is connected to the first main control chip and the first base, and receives a first control signal generated by the first main control chip based on the first device information to adjust the output voltage and / or current.

4. The USB expander according to claim 2, characterized in that: The first main control module further includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first resistor and a second resistor. Wherein, the first pin of the first main control chip is connected to one end of the first capacitor, and the other end of the first capacitor is grounded; the second pin of the first main control chip is connected to one end of the second capacitor and one end of the first resistor, and the other end of the second capacitor is grounded; the first main control chip outputs a voltage through the first pin or the other end of the first resistor; The third pin of the first main control chip is connected to one end of the third capacitor, the fourth pin of the first main control chip is connected to one end of the fourth capacitor, the other end of the third capacitor is connected to the other end of the fourth capacitor, and is further grounded; the first main control chip obtains the device type of the first device and the charging power of the first device through the third pin of the first main control chip and the fourth pin of the first main control chip; The fifth pin of the first main control chip is connected to one end of the fifth capacitor and one end of the second resistor, the sixth pin of the first main control chip is connected to one end of the sixth capacitor, the other end of the fifth capacitor is connected to the other end of the sixth capacitor and further grounded, and the other end of the second resistor receives the supply voltage.

5. The USB expander according to claim 3, characterized in that: The first main control module also includes a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first inductor and a first energy storage capacitor; Wherein, the first pin of the first voltage conversion chip is connected to one end of the third resistor, one end of the fourth resistor, one end of the seventh capacitor, one end of the eighth capacitor and one end of the ninth capacitor, the other end of the third resistor receives the input voltage, and the other ends of the seventh capacitor, the eighth capacitor and the ninth capacitor are further grounded; The second pin of the first voltage conversion chip is connected to the other end of the fourth resistor, one end of the fifth resistor and one end of the tenth capacitor, the other end of the fifth resistor is connected to the other end of the tenth capacitor, and is further grounded; The third pin of the first voltage conversion chip is connected to one end of the eleventh capacitor, the fourth pin of the first voltage conversion chip is connected to the other end of the eleventh capacitor and one end of the first inductor, the other end of the first inductor is connected to one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor and one end of the first energy storage capacitor, and the other end of the thirteenth capacitor, the other end of the fourteenth capacitor, the other end of the fifteenth capacitor and the other end of the first energy storage capacitor are further grounded; The fifth pin of the first voltage conversion chip is connected to one end of the sixth resistor, one end of the twelfth capacitor and one end of the seventh resistor, the other end of the sixth resistor is connected to the other end of the twelfth capacitor and the other end of the first inductor, the other end of the seventh resistor is connected to one end of the eighth resistor, and the other end of the eighth resistor is further grounded; A first node is formed between the fifth pin of the first voltage conversion chip, one end of the sixth resistor, one end of the twelfth capacitor and one end of the seventh resistor, the first node is connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the seventh pin of the first main control chip; The other end of the first inductor, one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor and one end of the first energy storage capacitor form a sixth node, and the sixth node is connected to the first base for outputting a charging voltage.

6. The USB expander according to claim 2, characterized in that: The second main control module also includes a second voltage conversion chip, which is connected to the second main control chip and the second base, and receives a second control signal generated by the second main control chip based on the second device information to adjust the output voltage and / or current.

7. The USB expander according to claim 6, characterized in that: The second main control module also includes a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor and a first switch device. The first pin of the second main control chip is connected to one end of the sixteenth capacitor, the second pin of the second main control chip is connected to one end of the seventeenth capacitor, the other end of the sixteenth capacitor is connected to the other end of the seventeenth capacitor, and is further grounded; the second main control chip obtains the device type of the second device and the charging power of the second device through the first pin of the second main control chip and the second pin of the second main control chip; The third pin of the second master control chip is connected to one end of the eighteenth capacitor, and the other end of the eighteenth capacitor is grounded. The fourth pin of the second master control chip is connected to one end of the nineteenth capacitor, and the other end of the nineteenth capacitor is connected to one end of the twenty-third capacitor and further grounded. The other end of the twenty-third capacitor is connected to one end of the tenth resistor, and the other end of the tenth resistor is connected to one end of the eleventh resistor and the base of the first switching device. The other end of the eleventh resistor is connected to one end of the twelfth resistor, one end of the thirteenth resistor and one end of the twenty-first capacitor. The other end of the twelfth resistor is connected to the collector of the first switching device, and the emitter of the first switching device is connected to the other end of the thirteenth resistor, the other end of the twenty-first capacitor and one end of the fourteenth resistor. The other end of the fourteenth resistor is further grounded. A second node is formed between the other end of the eleventh resistor, one end of the twelfth resistor, one end of the thirteenth resistor and one end of the twenty-first capacitor, and the second main control chip outputs voltage through the third pin or the second node.

8. The USB expander according to claim 7, characterized in that: The second main control module also includes a twenty-second capacitor, a twenty-third capacitor, a twenty-fourth capacitor, a twenty-fifth capacitor, a twenty-sixth capacitor, a twenty-seventh capacitor, a twenty-eighth capacitor, a twenty-ninth capacitor, a thirtieth capacitor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a second inductor and a second energy storage capacitor; Wherein, the first pin of the second voltage conversion chip is connected to one end of the fifteenth resistor, one end of the sixteenth resistor, one end of the twenty-second capacitor, one end of the twenty-third capacitor and one end of the twenty-fourth capacitor, the other end of the fifteenth resistor receives the input voltage, and the other ends of the twenty-second capacitor, the other ends of the twenty-third capacitor and the other ends of the twenty-fourth capacitor are further grounded; The second pin of the second voltage conversion chip is connected to the other end of the sixteenth resistor, one end of the seventeenth resistor and one end of the twenty-fifth capacitor, the other end of the seventeenth resistor is connected to the other end of the twenty-fifth capacitor, and is further grounded; The third pin of the second voltage conversion chip is connected to one end of the twenty-sixth capacitor, the fourth pin of the second voltage conversion chip is connected to the other end of the twenty-sixth capacitor and one end of the second inductor, the other end of the second inductor is connected to one end of the twenty-eighth capacitor, one end of the twenty-ninth capacitor, one end of the thirtieth capacitor and one end of the second energy storage capacitor, and the other end of the twenty-eighth capacitor, the other end of the twenty-ninth capacitor, the other end of the thirtieth capacitor and the other end of the second energy storage capacitor are further grounded; The fifth pin of the second voltage conversion chip is connected to one end of the eighteenth resistor, one end of the twenty-seventh capacitor and one end of the nineteenth resistor, the other end of the nineteenth resistor is connected to the other end of the twenty-seventh capacitor and the other end of the second inductor, the other end of the nineteenth resistor is connected to one end of the twenty-tenth resistor, and the other end of the twenty-tenth resistor is further grounded; A third node is formed between the fifth pin of the second voltage conversion chip, one end of the eighteenth resistor, one end of the twenty-seventh capacitor and one end of the nineteenth resistor, and the third node is connected to the emitter of the first switching device, the other end of the thirteenth resistor, the other end of the twenty-first capacitor and one end of the fourteenth resistor; A seventh node is formed between the other end of the second inductor, one end of the twenty-eighth capacitor, one end of the twenty-ninth capacitor, one end of the thirtieth capacitor and one end of the second energy storage capacitor, and the seventh node is connected to the second base for outputting a charging voltage.

9. The USB expander according to claim 2, characterized in that: The first main control module also includes a twenty-first resistor and a twenty-second resistor. The eighth pin of the first main control chip is connected to the fifth pin of the second main control chip through the twenty-first resistor, and the ninth pin of the first main control chip is connected to the sixth pin of the second main control chip through the twenty-second resistor to realize data communication between the first main control chip and the second main control chip.

10. The USB expander according to claim 2, characterized in that: The USB expander includes at least one of the first main control chip and at least one of the second main control chip, wherein one of the at least one of the first main control chip and the at least one of the second main control chip is a main control chip, and the remaining first main control chips and the second main control chips are sub-control chips, and the main control chip is communicatively connected with at least one of the sub-control chips.

11. The USB expander according to claim 10, characterized in that: At least one of the sub-control chips includes a first sub-control chip and a second sub-control chip, the first sub-control chip is connected to the first device or the second device, when the second sub-control chip obtains new first device information or new second device information, the new first device information or the new second device information is transmitted to the first sub-control chip through the main control chip.

12. The USB expander according to claim 2, characterized in that: The USB expander further includes a signal processing chip, and the signal processing chip is communicatively connected with at least one of the first main control chip and at least one of the second main control chip. When any of the at least one first main control chip is connected to a new first device and obtains new first device information, the signal processing chip transmits the new first device information to the first main control chip connected to the first device, and / or to the second main control chip connected to the second device; Alternatively, when any of at least one of the second main control chips is connected to a new second device and obtains new second device information, the signal processing chip transmits the new second device information to the first main control chip connected to the first device, and / or to the second main control chip connected to the second device.