Front edge blanking time control circuit and switching power supply using same

Abstract

The utility model discloses a leading edge blanking time control circuit and a switching power supply using the same. The switching power supply is sampled to obtain a first preset parameter, or the first preset parameter and a second preset parameter; timing is started when it is detected that the first preset parameter reaches a first parameter threshold value, or timing is started when it is detected that the second preset parameter reaches a second parameter threshold value after it is detected that the first preset parameter reaches the first parameter threshold value, and a first ending moment is obtained after timing is conducted for the first time; timing for a second time after the driving voltage is generated to obtain a second end moment; taking the earlier arrival moment in the two ending moments as the ending moment of the leading edge blanking time; wherein the first preset parameter represents the change rate of the drain-source voltage of the first switch tube, and the second preset parameter represents the size of the drain-source voltage of the first switch tube. Through the setting, the proper leading edge blanking time can be set for the first switch tube, the first switch tube is prevented from being turned off by mistake, and the application range of the first switch tube is expanded.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and particularly to a front edge blanking time control circuit and a switching power supply applying the same. Background Art

[0002] With the rapid development of electronic systems, people's demand for high-power density and high-efficiency switching power supply converters is increasing. Flyback switching power supplies, forward switching power supplies, double-clamped ZVS converters, etc. have been widely studied and applied due to their excellent characteristics such as high efficiency, full-range soft switching, and adaptation to high switching frequencies.

[0003] Figure 1a And Figure 1b respectively show a schematic circuit diagram and a working waveform diagram of a traditional flyback switching power supply. As Figure 1a shown, the flyback switching power supply 10 includes a rectifier bridge BD, a transformer T, and a load. The rectifier bridge BD rectifies the AC power supply AC and provides the input voltage Vin to the transformer T. The main power switch Q1 is connected to the primary winding Np, and the diode D1 is connected to the secondary winding Ns. The control circuit 20 is connected to the control terminal of the switch Q1 and controls the on and off of the switch Q1 through the drive voltage Gate. On the primary side, a diode D0, a capacitor C0, and a resistor R0 are also connected between the drain and the input terminal of the switch Q1; the source of the switch Q1 is grounded through the sampling resistor Rcs. On the secondary side, a capacitor C2 and a load resistor RL are connected between the output terminal and the ground terminal. The control circuit 20 includes a DRV pin connected to the control terminal of the switch Q1 through a resistor R2; a CS pin connected to the sampling resistor Rcs through a filter (capacitor C3 and resistor R1); a GND pin connected to the ground terminal; and an FB pin connected to the secondary side through a coupling isolation structure and a feedback circuit 30. The flyback switching power supply is usually peak current mode control, and the voltage Vcs on the sampling resistor Rcs represents the current flowing through the switch Q1. In the control circuit 20, the sampled voltage Vcs is compared with the reference voltage Vref by a comparator COMP to turn off the switch Q1. However, since a current spike will be generated during the conduction period of the switch Q1, in order to prevent this current spike from accidentally turning off the switch Q1, a LEB (leading edge blanking) time is set, and within this LEB time, the switch Q1 is not turned off.

[0004] As Figure 1bAs shown, at time t0, the switching transistor Q1 is turned off to supply power to the load. At time t1, the driving voltage Gate is generated and starts to increase from zero. During the time period from t2 to t3, the driving voltage remains basically unchanged (Miller plateau stage), but the drain-source voltage Vds of the switching transistor Q1 drops rapidly. At time t3, the drain-source voltage Vds approaches zero; at time t4, the driving voltage Gate reaches the maximum. Usually, a short period of time after time t1 is selected as the LEB time. However, for switching transistors with a slow turn-on speed, the LEB time may end before the peak current is generated, resulting in mis-turn-off. Prolonging the LEB time may also increase the minimum conduction time of the system, thus bringing a series of problems. Therefore, the selection of the LEB time of the current switching power supply still needs to be improved. Summary of the Invention

[0005] In order to solve the above technical problems, the present application provides a front-edge blanking time control circuit and a switching power supply using the same, and sets a suitable front-edge blanking time for the first switching transistor to solve the problems in the prior art.

[0006] According to one aspect of the present invention, there is provided a front-edge blanking time control circuit applied to a switching power supply. The switching power supply includes a first switching transistor, and the control end of the first switching transistor receives a driving voltage. The control circuit includes:

[0007] A sampling circuit for sampling the switching power supply to obtain a first preset parameter, or obtaining a first preset parameter and a second preset parameter;

[0008] A front-edge blanking circuit connected to the sampling circuit. After the driving voltage is generated, when it is detected that the first preset parameter reaches a first parameter threshold, timing starts, and after timing for a first time, a first end time is obtained; or after it is detected that the first preset parameter reaches the first parameter threshold, when it is detected that the second preset parameter reaches a second parameter threshold, timing starts, and after timing for a first time, a first end time is obtained; and after the driving voltage is generated, after timing for a second time, a second end time is obtained; the earlier-arriving time among the first end time and the second end time is used as the end time of the front-edge blanking time.

[0009] Wherein, during the time period from when the first switching transistor starts to conduct to before the end time of the front-edge blanking time arrives, the control circuit keeps the first switching transistor conducting; the first preset parameter represents the change rate of the drain-source voltage of the first switching transistor; the second preset parameter represents the magnitude of the drain-source voltage of the first switching transistor.

[0010] Optionally, when the second preset parameter reaches the second parameter threshold, it means that the drain-source voltage of the first switching transistor approaches zero.

[0011] Optionally, a comparison circuit is connected to the sampling circuit. After the end of the leading-edge blanking time, the comparison circuit compares a signal characterizing the current flowing through the first switching transistor with a third parameter threshold, and generates a protection signal when the signal characterizing the current flowing through the first switching transistor reaches the third parameter threshold;

[0012] A drive circuit is connected to the comparison circuit and the control terminal of the first switching transistor, and controls the first switching transistor to turn off when receiving the protection signal.

[0013] Optionally, the switching power supply is a flyback switching power supply, and the switching power supply further includes a primary winding and an auxiliary winding. The primary winding and the first switching transistor are connected in a branch between the input voltage and the ground terminal;

[0014] The first preset parameter is the change rate of the current flowing through the auxiliary winding;

[0015] The second preset parameter is the same as the first preset parameter; or the second preset parameter is the magnitude of the current flowing through the auxiliary winding. At this time, the second parameter threshold is a preset value or the value of the current flowing through the auxiliary winding detected after the first switching transistor is fully turned on in the previous switching cycle.

[0016] Optionally, the switching power supply further includes a first resistor and a second resistor connected in series between the two ends of the auxiliary winding. The control circuit further includes,

[0017] A second switching transistor is connected between the common node of the first resistor and the second resistor and the ground terminal. The control terminal of the second switching transistor receives the same driving voltage as the first switching transistor. The sampling circuit samples from the common node to obtain the first preset parameter, or obtains the first preset parameter and the second preset parameter.

[0018] Optionally, the switching power supply is a PFC switching power supply, including a primary winding. The primary winding and the first switching transistor are connected in a branch between the input terminal of the switching power supply and the ground terminal;

[0019] The control circuit further includes a capacitor and a third resistor connected in series between the common node of the first switching transistor and the primary winding and the ground terminal. The control circuit samples from the common node of the capacitor and the third resistor to obtain the first preset parameter, or the first preset parameter and the second preset parameter.

[0020] Optionally, the switching power supply is a PFC switching power supply, including a primary winding, and the primary winding and the first switching transistor are connected in a branch between the input terminal and the ground terminal of the switching power supply;

[0021] The control circuit further includes a fourth resistor and a third resistor connected in series between the common node of the first switching transistor and the primary winding and the ground terminal, and the control circuit samples from the common node of the fourth resistor and the third resistor to obtain the first preset parameter, or the first preset parameter and the second preset parameter.

[0022] Optionally, within the second time period, the driving voltage increases from zero voltage to a fourth parameter threshold, the fourth parameter threshold being the maximum value of the driving voltage, and the generation time of the driving voltage is the time when the driving voltage starts to increase from zero voltage.

[0023] Optionally, the first time period is less than the second time period.

[0024] The present invention further provides a switching power supply, including an AC power supply and a rectifier bridge, and the rectifier bridge rectifies the alternating current provided by the AC power supply into an input voltage; the switching power supply further includes: the control circuit described above, and the control circuit is connected to the control terminal of the first switching transistor and outputs the driving voltage to control the on-state of the first switching transistor.

[0025] The beneficial effects of the present utility model at least include:

[0026] For the leading-edge blanking time control circuit and the switching power supply applying the same provided by the present utility model, the second time period is timed starting from the generation time of the driving voltage, and the second end time is obtained when the timing ends; when the first preset parameter reaches the first parameter threshold, the first time period is timed starting from that moment, and the first end time is obtained when the timing ends; or after detecting that the first preset parameter reaches the first parameter threshold, when it is detected that the second preset parameter reaches the second parameter threshold, the timing starts, and the first end time is obtained after timing for the first time period; the earlier-arriving one of the first end time and the second end time is taken as the end time of the LEB time. After the driving voltage is generated, the first switching transistor remains in the on-state after being turned on before the end time of the leading-edge blanking time, thereby avoiding the mis-turn-off of the first switching transistor caused by current spikes. Moreover, by taking the earlier-arriving one of the first end time and the second end time as the end time of the LEB time, appropriate leading-edge blanking times can be set respectively in different application scenarios; it avoids the mis-turn-off of the first switching transistor caused by too short a leading-edge blanking time set in the prior art, and also avoids a series of problems caused by too long a leading-edge blanking time resulting in an increase in the minimum on-time of the system, thus expanding its application range.

[0027] It should be noted that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present utility model. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1a and Figure 1b respectively show a schematic circuit diagram and a working waveform diagram of a traditional flyback switching power supply;

[0029] Figure 2 shows a schematic circuit diagram of a front edge blanking time control circuit according to the first embodiment of the present utility model and a switching power supply applying the same;

[0030] Figure 3 and Figure 4 respectively show Figure 2 schematic working waveform diagrams of various signals of the switching power supply under high input voltage and low input voltage according to

[0031] Figure 5 shows a schematic circuit diagram of a front edge blanking time control circuit according to the second embodiment of the present utility model and a switching power supply applying the same;

[0032] Figure 6 shows a schematic circuit diagram of a front edge blanking time control circuit according to the third embodiment of the present utility model and a switching power supply applying the same;

[0033] Figure 7 shows a working waveform diagram of various signals according to the fourth embodiment of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0034] For ease of understanding the present utility model, the present utility model will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present utility model are shown in the drawings. However, the present utility model can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure content of the present utility model more thorough and comprehensive.

[0035] Figure 2 shows a schematic circuit diagram of a front edge blanking time control circuit according to the first embodiment of the present utility model and a switching power supply applying the same. As Figure 2As shown, the switching power supply of this embodiment is, for example, a flyback switching power supply. The flyback switching power supply 100 includes a main circuit and a control circuit 200. The main circuit includes a rectifier bridge BD, a transformer T, a first switching transistor Q1, and an auxiliary winding Naux. The primary winding Np and the secondary winding Ns of the transformer T are mutually coupled with the auxiliary winding Naux. The control terminal (gate) of the first switching transistor Q1 is connected to the primary control circuit 200 to receive a driving voltage Gate. The AC power supply AC provides a DC input voltage Vin to the primary winding Np of the transformer T after passing through a power filter EMI and the rectifier bridge BD. The connection point of the rectifier bridge BD and the primary winding Np is the input terminal. On the primary side, the primary winding Np, the first switching transistor Q1, and a sampling resistor Rcs are connected between the input terminal and the ground terminal. The source of the first switching transistor Q1 is grounded through the resistor Rcs, and the drain is connected to the primary winding Np. A diode D0 and a capacitor C0 are also connected between the drain of the first switching transistor Q1 on the primary side and the input power supply Vin. A resistor R0 is connected in parallel across both ends of the capacitor C0. The diode D0, the capacitor C0, and the resistor R0 form an RCD absorption circuit. Of course, other methods can also be used to set up a current absorption circuit. A filter capacitor C1 is also connected between the rectifier bridge BD and the ground terminal. On the secondary side, the secondary winding Ns is grounded through a diode D1 and a filter capacitor C2. A series-connected first resistor Rup and a second resistor Rdown are connected across both ends of the auxiliary winding Naux. One end of the second resistor Rdown is connected to the first resistor Rup, and the other end is grounded.

[0036] Further, the control circuit 200 includes multiple pins to establish connections with the main circuit of the switching power supply. The control circuit 200 generally includes pins such as a DRV pin, a VS pin, a CS pin, a GND pin, and an FB pin. The VS pin is connected to the connection point of the first resistor Rup and the second resistor Rdown to sample the voltage or current on the auxiliary winding Naux; the DRV pin is connected to the control terminal (gate) of the first switching transistor Q1 through a resistor R2, and a driving voltage Gate is provided from the DRV pin to control the conduction and cutoff of the first switching transistor Q1; the GND pin is connected to the connection point of the resistor Rcs and the ground terminal; the FB pin detects the output voltage through a feedback circuit and an isolation coupling circuit. The isolation coupling circuit includes a capacitor C4; the CS pin is connected to the common node of the sampling resistor Rcs and the source of the first switching transistor Q1 through a resistor R1. A capacitor C3 is also connected at the connection point of the CS pin and the resistor R1, and the other end of the capacitor C3 is grounded. The capacitor C3 and the resistor R1 form a filter. When the first switching transistor Q1 is conducting, the current flowing through the sampling resistor Rcs can sample the voltage across both ends of the sampling resistor Rcs through this CS pin. The CS pin determines the current magnitude of the first switching transistor Q1 based on the voltage Vcs across the sampling resistor Rcs, that is, the magnitude of the voltage across both ends of the sampling resistor Rcs represents the magnitude of the current on the first switching transistor Q1.

[0037] The control circuit 200 of this embodiment is connected to the control electrode of the first switching transistor Q1 and is used to control the conduction and cutoff of the first switching transistor Q1. The first switching transistor Q1 is, for example, an NMOS. The control circuit 200 includes: a second switching transistor Q2, a sampling circuit 201, a front-edge blanking circuit 202, a comparison circuit 203, and a driving circuit 204. The sampling circuit 201 is used to sample the switching power supply to obtain a first preset parameter, where the first preset parameter characterizes the change rate of the drain-source voltage Vds across the first switching transistor Q1. As one of the embodiments, the change rate of the current flowing through the auxiliary winding can be used to characterize the first preset parameter. At this time, the sampling circuit 201 is connected to the VS pin and samples through the first path L1. The sampling circuit may include a corresponding processing module to obtain the change rate of the current in the auxiliary winding through sampling the VS pin, and then outputs the result obtained after sampling processing along the first path L1 to the front-edge blanking circuit 202. The front-edge blanking circuit 202 is connected to the sampling circuit 201. The front-edge blanking circuit 202 may internally include a timing module and a comparison module (not shown in the figure). The comparison module is used to compare the magnitude of the first preset parameter sampled by the sampling circuit 201 with a first parameter threshold. The timing module starts timing when the sampling circuit 201 detects that the first preset parameter reaches the first parameter threshold, and obtains a first end time after timing for a first period of time; and starts from the generation time of the driving voltage, and obtains a second end time after timing for a second period of time; and takes the earlier-arriving time among the first end time and the second end time as the end time of the LEB time. The comparison circuit 203 is connected to the sampling circuit 201. The sampling circuit 201 starts sampling the voltage Vcs across the sampling resistor Rcs from the end time. The sampling circuit 201 is also connected to the CS pin, obtains the voltage Vcs across the sampling resistor Rcs from the second path L2, and outputs it to the comparison circuit 203 along the second path L2. The comparison circuit 203 compares the voltage Vcs across the sampling resistor with a third parameter threshold, and generates a protection signal Vpro when the voltage Vcs across the sampling resistor reaches the third parameter threshold. The driving circuit 204 is connected to the comparison circuit 203 and the control terminal of the first switching transistor Q1, and outputs a driving signal Vdr to control the first switching transistor Q1 to turn off when receiving the protection signal Vpro. In the control circuit 200, the front-edge blanking circuit 202 controls the sampling circuit 201 to start sampling the voltage Vcs across the sampling resistor only after the end time, so the driving circuit 204 will output the driving signal Vdr at least after the end time. Therefore, within the time period from when the first switching transistor Q1 starts to conduct until the LEB end time arrives, the control circuit 200 keeps the first switching transistor Q1 conducting. In other embodiments, the front-edge blanking circuit 202 may be connected to the comparison circuit 203 to control the working state of the comparison circuit 203.The sampling circuit 201 always samples the voltage Vcs across the sampling resistor. However, the front-edge blanking circuit 202 outputs a control signal to the comparison circuit 203 only when the end moment of LEB arrives, causing the comparison circuit 203 to start working. Even if the voltage Vcs across the sampling resistor exceeds the third parameter threshold when the current spike occurs, the comparison circuit 203 will not output the protection signal Vpro. Thus, it can also ensure that the control circuit 200 keeps the first switching transistor Q1 conducting during the period from when the first switching transistor Q1 starts to conduct until the end moment of LEB arrives.

[0038] Further, in the control circuit 200, the drain of the second switching transistor Q2 is connected to the connection point (i.e., the VS pin) of the first resistor Rup and the second resistor Rdown connected in series to the auxiliary winding Naux. The source of the second switching transistor Q2 is grounded, and the control electrode receives the same driving voltage as the first switching transistor Q1. The driving voltages of the first switching transistor Q1 and the second switching transistor Q2 are both output from the DRV pin of the control circuit 200, and the conduction states of the first switching transistor Q1 and the second switching transistor Q2 are the same. Then, when the first switching transistor Q1 on the primary side conducts under the control of the driving voltage Gate, the second switching transistor Q2 also conducts. Since the auxiliary winding Naux is coupled to the primary winding Np, the voltage Vaux across the auxiliary winding follows the voltage of the primary winding Np. The source of the second switching transistor Q2 is grounded, and the drain is connected to the same-named end of the auxiliary winding through the first resistor Rup. When the second switching transistor Q2 conducts, it can be considered that the direction of the current Iup is from the second switching transistor Q2 to the first resistor Rup. Taking this as the positive direction of the current, then, the voltage at the connection point VS pin of the first resistor Rup and the second resistor Rdown is clamped at a low voltage or approximately 0V. Taking the VS pin as the sampling point, the current Iup flowing through the auxiliary winding can be sampled. The magnitude Iup of the current flowing through the auxiliary winding can characterize the magnitude of the drain-source voltage across the first switching transistor. Therefore, the change rate of the current Iup flowing through the auxiliary winding can characterize the change rate of the drain-source voltage Vds across the first switching transistor.

[0039] Figure 3 and Figure 4 respectively show a schematic working waveform diagram of each signal of the switching power supply according to Figure 2 at high input voltage and low input voltage.

[0040] Figure 3 and Figure 4 The waveform diagrams shown are the waveform diagrams of each signal of the switching power supply when the first preset parameter is the change rate of the current Iup flowing through the auxiliary winding, mainly including the driving voltage Gate of the first switching transistor Q1, the drain-source voltage Vds of the first switching transistor Q1, the voltage Vcs across the sampling resistor, and the waveform of the current Iup flowing through the auxiliary winding.

[0041] Combined with Figure 2 and Figure 3 , at time t0, the first switching transistor Q1 starts to turn off, and the drain-source voltage Vds rises. At time t1, the driving voltage Gate starts to increase from zero, and the second time T2 is counted from t1. During the time period from t1 to t2, the driving voltage Gate gradually rises, and the change of the drain-source voltage Vds is relatively gentle. During the time period from t2 to t3, the driving voltage Gate remains basically unchanged, which is the Miller plateau time. However, the drain-source voltage Vds of the switching transistor Q1 drops rapidly during the Miller plateau time, and the current Iup flowing through the auxiliary winding rises rapidly. During a short period of time after the starting moment of the Miller plateau time, the rate of the drain-source voltage Vds is very large, and the first time T1 is counted when it is detected that the first preset parameter reaches the first parameter threshold. At time t3, the drain-source voltage Vds drops to zero or close to zero. Among them, during the time period from t1 to t3, when the driving voltage Gate reaches the conduction threshold voltage Vth of the first switching transistor Q1, the first switching transistor Q1 starts to conduct. During the conduction of the first switching transistor Q1, a current spike will be generated, and the sampling voltage Vcs across the sampling resistor Rcs appears as a spike. In the subsequent time period, when the spike subsides, the sampling voltage Vcs across the sampling resistor rises steadily. During the time period from t3 to t4, the driving voltage Gate continues to rise. At time t4, the driving voltage Gate reaches the maximum. During the time period from t4 to t7, the driving voltage Gate, the drain-source voltage Vds, and the current Iup flowing through the auxiliary winding all reach a stable state. Exemplarily, the time t5 after time t4 is used as the end moment of the first time T1, that is, the first end moment, and the time t6 is used as the end moment of the second time T2, that is, the second end moment. The first end moment arrives first, so the first end moment is used as the end moment of the LEB time. Among them Figure 3 The settings of the first time T1 and the second time T2 in

[0042] are only for illustration, and their specific magnitudes can be set according to the actual situation. Figure 4 In

[0043] Of course, the above working waveform diagrams of the switching power supply and the signal are only examples given by the flyback converter, and are not intended to limit the present invention. For switching power supplies with other topologies or applications that require detecting the current of the switching transistor, the same settings as above can also be performed to set an appropriate LEB time.

[0044] Figure 5 Fig. shows a schematic circuit diagram of a front edge blanking time control circuit according to a second embodiment of the present invention and a switching power supply applying the same.

[0045] As Figure 5 shown, the switching power supply of this embodiment is a PFC switching power supply. The PFC switching power supply 300 includes an AC power supply AC, a rectifier bridge BD, a primary winding Np, a first switching transistor Q1, a diode D1, and a control circuit 400. The rectifier bridge BD rectifies the alternating current generated by the AC power supply AC into direct current and provides it as an input voltage Vin to the primary winding Np from the input terminal. The primary winding Np, the first switching transistor Q1, and the sampling resistor Rcs are sequentially connected between the input terminal and the ground terminal. The source of the first switching transistor Q1 is connected to the sampling resistor Rcs, the drain is connected to the anode of the diode D1, and the control terminal (gate) is connected to the control circuit 400. The cathode of the diode D1 is connected to the output terminal and grounded through a series of a resistor R1 and a resistor R2. A capacitor C1 is connected between the input terminal and the ground terminal, and a capacitor C3 is connected between the output terminal and the ground terminal. The control circuit 400 includes a plurality of pins, such as a ZCD pin, a CS pin, a GATE pin, a GND pin, a VCC pin, and an FB pin. The CS pin is connected to the common node of the sampling resistor Rcs and the first switching transistor Q1 for sampling the voltage Vcs across the sampling resistor Rcs. The VCC pin is connected to a power supply to receive a power supply voltage VCC, and a capacitor C2 is connected between the power supply terminal and the ground terminal. The GND pin is connected to the ground terminal, and the FB pin is connected to the common node of the first resistor R1 and the second resistor R2 to receive a feedback signal of the output voltage. The GATE pin is connected to the gate of the first switching transistor Q1 to provide a driving voltage Gate thereto. The PFC switching power supply 300 further includes a series of a capacitor C4 and a resistor R3 connected between the common node of the first switching transistor Q1 and the primary winding Np and the ground terminal. The capacitor C4 and the resistor R3 are connected to the drain of the first switching transistor Q1, and the common node of the capacitor C4 and the resistor R3 is connected to the control circuit 400 through the ZCD pin. The control circuit 400 samples from the common node of the capacitor C4 and the resistor R3 to obtain a first preset parameter, and at this time, the first preset parameter is the change rate of the drain voltage Vd of the first switching transistor Q1.

[0046] The control circuit 400 includes a sampling circuit 401, a front-edge blanking circuit 402, a comparison circuit 403, and a driving circuit 404. The sampling circuit 401 is used to sample the switching power supply to obtain a first preset parameter, and the first preset parameter characterizes the change rate of the drain-source voltage Vds across the first switching transistor Q1. When the first preset parameter is the change rate of the drain voltage of the first switching transistor Q1, the sampling circuit 401 is connected to the ZCD pin, samples through the second path L2, and processes and outputs the sampling result along the second path L2 to the front-edge blanking circuit 402. The front-edge blanking circuit 402 may internally include a timing module and a comparison module (not shown in the figure), and its function is the same as that of the front-edge blanking circuit 202 in the first embodiment, which will not be described in detail here. The sampling circuit 401 is also used to sample the voltage Vcs across the sampling resistor Rcs starting from the end moment. The sampling circuit 401 is connected to the CS pin, obtains the voltage Vcs across the sampling resistor Rcs from the third path L3, and outputs it along the third path L3 to the comparison circuit 403. The comparison circuit 403 and the driving circuit 404 have the same functions and connection manners as the comparison circuit 203 and the driving circuit 204 in the first embodiment, which will not be elaborated here. Thus, within the time period after the first switching transistor Q1 starts to conduct and before the end moment arrives, the control circuit 400 keeps the first switching transistor Q1 conducting. That is, the control circuit of the PFC switching power supply can also perform the same settings as above to set an appropriate LEB time.

[0047] Further, in this embodiment, the sampling circuit 401 is also used for the function of zero-crossing detection via the ZCD pin through the first path L1. That is, in this embodiment, zero-current detection and LEB time setting multiplex the ZCD pin. In other embodiments, the ZCD pin and the CS pin can also be multiplexed, which is not limited here.

[0048] Figure 6 The schematic circuit diagram of a front-edge blanking time control circuit according to the third embodiment of the present invention and a switching power supply using the same is shown.

[0049] As Figure 6 shown, it is another form of PFC switching power supply. The PFC switching power supply 500 includes a main circuit and a control circuit 400. The main circuit is the same as that in the second embodiment, and both include an AC power supply AC, a rectifier bridge BD, a first switching transistor Q1, a diode D1, and a sampling resistor Rcs. Its topological structure is exactly the same as that in the second embodiment, which will not be described in detail here. The control circuit 400 includes a sampling circuit 401, a front-edge blanking circuit 402, a comparison circuit 403, and a driving circuit 404. The connection and working principle of the circuit are the same as those in the second embodiment, which will not be elaborated here.

[0050] The difference between this embodiment and the second embodiment is only that in this embodiment, a resistor R4 and a resistor R3 are connected in series between the common node of the first switching transistor Q1 and the primary winding Np and the ground terminal, that is, only the capacitor C4 in the second embodiment is replaced with a resistor R4, but the principle of setting the LEB time is the same. In this embodiment, the drain voltage of the first switching transistor Q1 is divided by the resistors R3 and R4, and the first preset parameter can be conveniently obtained by sampling from the common node of the resistors R3 and R4.

[0051] As the fourth embodiment of the present utility model, a circuit diagram identical to that of Figure 2 , 5 -6 can be adopted, but the difference from Figure 2 , 5 -6 lies in the different specific functions of the sampling circuit and the front edge blanking circuit in the control circuit. In this embodiment, after the sampling circuit samples and processes at the VS pin to obtain the first preset parameter, when the first preset parameter reaches the first parameter threshold, the timing module in the front edge blanking circuit does not start timing, but starts timing only when it detects that the second preset parameter reaches the second parameter threshold, and the first end time is obtained after timing for the first time; similarly, after the driving voltage is generated, the second end time is obtained after timing for the second time, and the earlier-arriving time among the first end time and the second end time is used as the end time of the front edge blanking time. That is, the starting moment of timing for the first time in this embodiment is different from that of the embodiments described above. Among them, the second preset parameter represents the magnitude of the drain-source voltage of the first switching transistor. When the second preset parameter reaches the second parameter threshold, it means that the drain-source voltage of the first switching transistor is close to zero. In addition, the first parameter threshold and the second parameter threshold can be set according to actual applications.

[0052] Further, when adopting the flyback switching power supply structure shown in Figure 2 , the second preset parameter can be the same as the first preset parameter, that is, the change rate of the current flowing through the auxiliary winding is adopted as the first preset parameter. At this time, the first parameter threshold is greater than the second parameter threshold; or the second preset parameter can be set as the magnitude of the current flowing through the auxiliary winding (the magnitude of this current can also be represented by a voltage value). At this time, the second parameter threshold can be a preset value or the value of the current flowing through the auxiliary winding detected when the first switching transistor is fully turned on in the previous switching cycle. Figure 7Shown is a schematic diagram of a working waveform of a switching power supply in this embodiment. As shown in this figure, when it is detected at time t2 that the first preset parameter reaches the first parameter threshold, the first time T1 is not started. It is not until time t3 when it is detected that the second preset parameter reaches the second parameter threshold that the first time T1 starts. The timing of the second time T2 is the same as described above, and the earlier arrival time of the first time T1 and the second time T2 is used as the end time of the LEB time. Among them, in this figure, the second preset parameter is the current flowing through the auxiliary winding (which can also be represented by directly sampling the voltage at the VS pin), and the second parameter threshold is taken as Iup_on (which can also be converted to voltage), which is the value after the first switching transistor Q1 is fully turned on. It can be a preset value or the value detected in the previous switching cycle. As another embodiment, the second preset parameter can also be the same as the first preset parameter, that is, both are the change rate of the current flowing through the auxiliary winding, and the corresponding second parameter threshold can be set accordingly.

[0053] Further, when using Figures 5 - 6 the PFC type switching power supply shown in, the second preset parameter is the same as the first preset parameter, except that the value of the second parameter threshold is less than the first parameter threshold.

[0054] In summary, for the leading edge blanking time control circuit and the switching power supply applying the same provided by the present invention, the second time is timed starting from the generation time of the driving voltage, and the second end time is obtained after the timing ends; when the first preset parameter reaches the first parameter threshold, the first time is timed, and the first end time is obtained after the timing ends; or after detecting that the first preset parameter reaches the first parameter threshold, when it is detected that the second preset parameter reaches the second parameter threshold, the timing starts, and the first end time is obtained after timing the first time; the earlier arrival of the first end time and the second end time is used as the end time of the LEB time. After the driving voltage is generated, the first switching transistor remains in the on state after being turned on before the end time of the leading edge blanking time, thereby avoiding the mis-turn-off of the first switching transistor caused by current spikes. Moreover, using the earlier arrival of the first end time and the second end time as the end time of the LEB time, appropriate leading edge blanking times can be set respectively in different application scenarios; it avoids the mis-turn-off of the first switching transistor caused by the too short leading edge blanking time set in the prior art, and also avoids a series of problems caused by the too long leading edge blanking time resulting in the increase of the minimum conduction time of the system, expanding its application range.

[0055] It should be noted that the numerical values in this article are only for illustrative purposes. In other embodiments of the present invention, other numerical values can also be used to implement this solution, and specific settings should be made reasonably according to the actual situation. The present invention does not limit this.

[0056] Finally, it should be noted that: Obviously, the above embodiments are merely examples given to clearly illustrate the present utility model, rather than limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or alterations can be made based on the above description. It is not necessary and impossible to enumerate all implementation manners here. And the obvious changes or alterations derived therefrom are still within the protection scope of the present utility model.

[0057] It should also be understood that the terms and expressions used herein are for descriptive purposes only, and one or more embodiments of this specification should not be limited to these terms and expressions. Using these terms and expressions does not mean excluding any equivalent features of the illustration and description (or parts thereof), and it should be recognized that various modifications that may exist should also be included within the scope of the claims. Other modifications, variations, and substitutions may also exist. Accordingly, the claims should be regarded as covering all such equivalents.

Claims

1. A leading edge blanking time control circuit, applied to a switching power supply, the switching power supply comprising a first switching tube, the control end of the first switching tube receiving a driving voltage, characterized in that: The control circuit comprises: A sampling circuit, which samples the switching power supply to obtain a first preset parameter, or obtains the first preset parameter and a second preset parameter; A leading edge blanking circuit is connected to the sampling circuit, and the leading edge blanking circuit includes a comparison module and a timing module. The comparison module compares the first preset parameter sampled by the sampling circuit with the first parameter threshold; The timing module starts timing when the comparison module detects that the first preset parameter reaches a first parameter threshold, and obtains a signal representing a first end time after timing for a first time, or the timing module starts timing when the comparison module detects that the second preset parameter reaches a second parameter threshold after the comparison module detects that the first preset parameter reaches the first parameter threshold, and obtains a signal representing the first end time after timing for the first time; and The timing module also starts timing from the moment the driving voltage is generated, and obtains a signal representing a second end time after timing a second time; The timing module further outputs the earlier generated signal of the signal representing the first end time and the signal representing the second end time as a signal representing the end time of the leading edge blanking time. Among them, the control circuit keeps the first switch tube turned on during the time period from when the first switch tube starts to turn on to before the signal representing the end moment of the leading edge blanking time is generated; the first preset parameter represents the rate of change of the drain-source voltage of the first switch tube; and the second preset parameter represents the magnitude of the drain-source voltage of the first switch tube.

2. The leading edge blanking time control circuit according to claim 1, further comprising: When the second preset parameter reaches the second parameter threshold, it indicates that the drain-source voltage of the first switch tube is close to zero.

3. The leading edge blanking time control circuit according to claim 1, further comprising: a comparison circuit connected to the sampling circuit, wherein after the signal representing the end time of the leading edge blanking time is generated, the comparison circuit compares the signal representing the current flowing through the first switch tube with a third parameter threshold, and generates a protection signal when the signal representing the current flowing through the first switch tube reaches the third parameter threshold; The driving circuit is connected to the comparison circuit and the control end of the first switch tube, and controls the first switch tube to be turned off when receiving the protection signal.

4. The leading edge blanking time control circuit according to claim 1, wherein: The switching power supply is a flyback switching power supply, and the switching power supply further comprises a primary winding and an auxiliary winding, and the primary winding and the first switching tube are connected to a branch between an input voltage and a ground terminal; The first preset parameter is a rate of change of the current flowing through the auxiliary winding; The second preset parameter is the same as the first preset parameter; or the second preset parameter is the magnitude of the current flowing through the auxiliary winding. In this case, the second parameter threshold is a preset value or the value of the current flowing through the auxiliary winding detected after the first switch tube is fully turned on in the previous switching cycle.

5. The leading edge blanking time control circuit according to claim 4, wherein: The switching power supply further includes a first resistor and a second resistor connected in series between the two ends of the auxiliary winding, and the control circuit further includes, A second switch tube is connected between a common node of the first resistor and the second resistor and a ground terminal, a control terminal of the second switch tube receives a driving voltage that is the same as that of the first switch tube, and the sampling circuit samples from the common node to obtain the first preset parameter, or obtains the first preset parameter and the second preset parameter.

6. The leading edge blanking time control circuit according to claim 1, wherein: The switching power supply is a PFC switching power supply, comprising a primary winding, wherein the primary winding and the first switching tube are connected to a branch between an input terminal and a ground terminal of the switching power supply; The control circuit also includes a capacitor and a third resistor connected in series between a common node of the first switch tube and the primary winding and a ground terminal. The control circuit samples from the common node of the capacitor and the third resistor to obtain the first preset parameter, or the first preset parameter and the second preset parameter.

7. The leading edge blanking time control circuit according to claim 1, wherein: The switching power supply is a PFC switching power supply, comprising a primary winding, wherein the primary winding and the first switching tube are connected to a branch between an input terminal and a ground terminal of the switching power supply; The control circuit also includes a fourth resistor and a third resistor connected in series between a common node of the first switch tube and the primary winding and a ground terminal. The control circuit samples from a common node of the fourth resistor and the third resistor to obtain the first preset parameter, or the first preset parameter and the second preset parameter.

8. The leading edge blanking time control circuit according to claim 1, wherein: During the second time, the driving voltage increases from zero voltage to a fourth parameter threshold, the fourth parameter threshold is the maximum value of the driving voltage, and the driving voltage is generated at a time when the driving voltage increases from zero voltage.

9. The leading edge blanking time control circuit according to claim 1, wherein: The first time is less than the second time.

10. A switching power supply, comprising an AC power supply and a rectifier bridge, wherein the rectifier bridge rectifies the AC power provided by the AC power supply into an input voltage; characterized in that: The switching power supply further comprises: a leading edge blanking time control circuit according to any one of claims 1 to 9, wherein the control circuit is connected to the control end of the first switching tube and outputs the driving voltage to control the conduction state of the first switching tube.

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