Signal receiving circuit and electronic equipment

Abstract

The present application provides a signal receiving circuit and an electronic device, the signal receiving circuit comprising: a receiving module configured to receive an external signal and divide the external signal into a first signal and a second signal; the first demodulation module is connected with the receiving module and is used for receiving and demodulating the first signal so as to determine whether the first signal is a useful signal; the second demodulation module is connected with the receiving module to receive the second signal; the control module is connected with the first and second demodulation modules; the first demodulation module is configured to wake up the control module when the first signal is determined to be a useful signal, further wake up the second demodulation module and control the first demodulation module to be powered off, so that the second demodulation module is switched from a sleep state to a working state and demodulates a second signal; wherein the power consumption of the first demodulation module is lower than that of the second demodulation module in the working state. By means of the mode, low-power-consumption operation is achieved by means of different structures, power consumption and different working conditions of the two demodulation modules, and the standby time of equipment is prolonged.

Description

Technical Field

[0001] This application mainly relates to the field of communication technologies, and particularly to a signal receiving circuit and an electronic device. Background Art

[0002] Currently, the long battery life of walkie-talkies is a core requirement of users today. Especially for users who need to work for a long time or stay in outdoor or wild environments, the requirement for the battery life of walkie-talkies is getting higher and higher. Therefore, without changing the user experience, how to increase the battery life of walkie-talkies is the key research direction. Since the capacity of the battery is directly related to the battery life of the product, when the battery capacity is fixed, reducing power consumption in other directions becomes the key factor affecting the battery life of the product. Summary of the Utility Model

[0003] The main purpose of this application is to provide a signal receiving circuit and an electronic device to solve the problems of high power consumption and low battery life in existing walkie-talkies.

[0004] To solve the above problems, this application provides a signal receiving circuit and an electronic device. The signal receiving circuit includes: a receiving module configured to receive an external signal and divide the external signal into a first signal and a second signal; a first demodulation module connected to the first output end of the receiving module for receiving the first signal and demodulating the first signal to determine whether the first signal is a useful signal; a second demodulation module connected to the second output end of the receiving module to receive the second signal; a control module connected to the first demodulation module and the second demodulation module; the first demodulation module is configured to wake up the control module when it determines that the first signal is a useful signal, and the control module wakes up the second demodulation module and controls the first demodulation module to power off, so that the second demodulation module switches from the sleep state to the working state to demodulate the second signal; wherein, the power consumption of the first demodulation module is lower than the power consumption of the second demodulation module in the working state.

[0005] In one embodiment, the receiving module includes: an antenna; a power distribution unit, the input end of the power distribution unit is connected to the antenna, the first output end of the power distribution unit is connected to the first demodulation module, and the second output end of the power distribution unit is connected to the second demodulation module.

[0006] In one embodiment, the receiving module further includes: a first filtering unit, the first end of the first filtering unit is connected to the antenna; a first amplifying unit, the input end of the first amplifying unit is connected to the second end of the first filtering unit, and the output end of the first amplifying unit is connected to the input end of the power distribution unit; a limiting unit, the first end of the limiting unit is connected to the input end of the first amplifying unit, and the second end of the limiting unit is grounded.

[0007] In one embodiment, the first demodulation module includes: a second amplification unit, the input end of the second amplification unit is connected to the receiving module; a first mixer, the first input end of the first mixer is connected to the output end of the second amplification unit; a first oscillation unit, the output end of the first oscillation unit is connected to the second input end of the first mixer; a first analog-to-digital conversion unit, the input end of the first analog-to-digital conversion unit is connected to the output end of the first mixer; a second filtering unit, the input end of the second filtering unit is connected to the output end of the first analog-to-digital conversion unit; a demodulation unit, the input end of the demodulation unit is connected to the output end of the second filtering unit; a digital-to-analog conversion unit, the input end of the digital-to-analog conversion unit is connected to the demodulation unit, and the output end of the digital-to-analog conversion unit is connected to the control module.

[0008] In one embodiment, the first oscillation unit includes: a voltage-controlled oscillator, the output end of the voltage-controlled oscillator is connected to the second input end of the first mixer; a first phase-locked loop, the first phase-locked loop is connected to the input end of the voltage-controlled oscillator.

[0009] In one embodiment, the second demodulation module includes: a second mixer, the first input end of the second mixer is connected to the receiving module; a second oscillation unit, the input end of the second oscillation unit is connected to the control module, and the output end of the second oscillation unit is connected to the second input end of the second mixer; a programmable gain amplifier, the input end of the programmable gain amplifier is connected to the output end of the second mixer; an anti-aliasing filter, the input end of the anti-aliasing filter is connected to the output end of the programmable gain amplifier; a second analog-to-digital conversion unit, the input end of the second analog-to-digital conversion unit is connected to the output end of the anti-aliasing filter; a digital filter, the input end of the digital filter is connected to the output end of the second analog-to-digital conversion unit, and the output end of the digital filter is connected to the control module.

[0010] In one embodiment, the second oscillation unit further includes: a local oscillator, the output end of the local oscillator is connected to the second input end of the second mixer; a buffer amplifier, the output end of the buffer amplifier is connected to the input end of the local oscillator; a second phase-locked loop, the output end of the second phase-locked loop is connected to the input end of the buffer amplifier, and the input end of the second phase-locked loop is connected to the control module.

[0011] In one embodiment, the control module includes: a baseband chip, the baseband chip is connected to the first demodulation module and the second demodulation module; a codec, the codec is connected to the baseband chip.

[0012] In one embodiment, the baseband chip integrates a digital signal processor, the digital signal processor is connected to the second demodulation module, and the digital signal processor is used to wake up the second demodulation module when the first signal is a useful signal and control the first demodulation module to power off.

[0013] To solve the above problems, the present application also provides an electronic device, which includes: a signal receiving circuit; the signal receiving circuit is the signal receiving circuit described in any one of the above embodiments.

[0014] By the above method, the power consumption of the first demodulation module is lower than that of the second demodulation module, and according to the different received signals, different operating conditions are set to reduce the power consumption of the device, thereby achieving the effect of increasing the standby operation time of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings. Among them:

[0016] Figure 1 is a schematic structural diagram of an embodiment of the signal receiving circuit provided by the present application;

[0017] Figure 2 is a schematic structural diagram of an embodiment of the receiving module provided by the present application;

[0018] Figure 3 is a schematic structural diagram of a second embodiment of the receiving module provided by the present application;

[0019] Figure 4 is a schematic structural diagram of an embodiment of the first filtering unit provided by the present application;

[0020] Figure 5 is a schematic structural diagram of an embodiment of the first demodulation module provided by the present application;

[0021] Figure 6 is a schematic structural diagram of an embodiment of the second demodulation module provided by the present application;

[0022] Figure 7 is a schematic structural diagram of an embodiment of the control module provided by the present application;

[0023] Figure 8 is a schematic structural diagram of a second embodiment of the signal receiving circuit provided by the present application;

[0024] Figure 9 is a schematic structural diagram of an embodiment of the electronic device provided by the present application.

[0025] Reference Signs:

[0026] Signal receiving circuit 100; electronic device 200; receiving module 10; first demodulation module 20; second demodulation module 30; control module 40; antenna 11; power distribution unit 12; first filtering unit 13; first amplification unit 14; limiting unit 15; low-pass filter 13a; high-pass filter 13b; second amplification unit 21; first mixer 22; first oscillation unit 23; first analog-to-digital conversion unit 24; second filtering unit 25; demodulation unit 26; digital-to-analog conversion unit 27; voltage-controlled oscillator 23a; first phase-locked loop 23b; second mixer 31; second oscillation unit 32; programmable gain amplifier 33; anti-aliasing filter 34; second analog-to-digital conversion unit 35; digital filter 36; local oscillator 32a; buffer amplifier 32b; second phase-locked loop 32c; baseband chip 41; codec 42; audio power amplifier 110; speaker 120. Detailed implementation manners

[0027] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application, rather than limiting the present application. In addition, it should be noted that, for the convenience of description, only some structures related to the present application are shown in the drawings, rather than all structures. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0028] The terms "first", "second", etc. in the present application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products or devices.

[0029] Referring to "embodiments" herein means that a specific feature, structure or characteristic described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0030] With the increasing development of walkie-talkies, in order to meet more usage scenarios and requirements, higher demands need to be put forward for the battery life of walkie-talkies. Generally, in existing technical solutions, the battery life of walkie-talkie devices is improved by increasing the power saving ratio. For example, the power saving ratio is increased from 1:2 to 1:4, 1:8 or higher. However, due to the increase in the power saving ratio, problems such as slow call response or broken words may occur during subsequent use, which greatly affects the user experience. Therefore, this application proposes a signal receiving circuit and an electronic device to solve the above problems and improve the battery life of walkie-talkie devices.

[0031] Refer to Figure 1 as shown Figure 1 FIG. is a schematic structural diagram of an embodiment of the signal receiving circuit provided in this application; wherein, the signal receiving circuit 100 includes: a receiving module 10, a first demodulation module 20, a second demodulation module 30, and a control module 40. Specifically, the receiving module 10 is configured to receive an external signal and divide the external signal into a first signal and a second signal; the first demodulation module 20 is connected to the first output end of the receiving module 10, and is used to receive the first signal and demodulate the first signal to determine whether the first signal is a useful signal; the second demodulation module 30 is connected to the second output end of the receiving module 10 to receive the second signal; the control module 40 is connected to the first demodulation module 20 and the second demodulation module 30; the first demodulation module 20 is configured to wake up the control module 40 when it is determined that the first signal is a useful signal, and the control module 40 wakes up the second demodulation module 30 and controls the first demodulation module 20 to power off, so that the second demodulation module 30 switches from the sleep state to the working state, thereby demodulating the second signal; wherein, the power consumption of the first demodulation module 20 is lower than the power consumption of the second demodulation module 30 in the working state.

[0032] It can be understood that corresponding to the above embodiment, the signal receiving circuit 100 has two working conditions, namely, the signal receiving state and the signal detection state; generally, the signal receiving circuit 100 operates in the signal detection state to detect external radio frequency signals. When a required target signal is detected in the external radio frequency signals, the signal receiving circuit 100 is set to the signal receiving state to complete the normal reception of the target signal.

[0033] In the signal detection state:

[0034] Such as Figure 1As shown in the figure, the signal receiving circuit 100 receives an external radio frequency signal through the receiving module 10, processes the signal, and transmits the signal in two paths. At this time, the second demodulation module 30 is in a sleep state. The receiving module 10 divides the external signal into a first signal and a second signal. The first signal is transmitted to the first demodulation module 20, and the first demodulation module 20 performs demodulation processing to confirm whether the first signal is a useful signal, and then transmits it to the control module 40. When the control module 40 detects that the first signal is a useful signal (i.e., the target signal), it wakes up the second demodulation module 30 and powers off the first demodulation module 20 to complete the signal receiving work using the second demodulation module 30. For example, if the channel setting is 400M and there is an interference signal of 400.01M in the environment, the useful signal can be judged by demodulating the first signal, and it is judged as a non-useful signal. At this time, the second demodulation module 30 continues to sleep.

[0035] In the signal receiving state:

[0036] After the first demodulation module 20 completes the demodulation of the first signal and determines that the first signal is a useful signal, it wakes up the control module 40, wakes up the second demodulation module 30 through the control module 40. At the same time, the control module 40 performs a power-off process on the first demodulation module 20. The awakened second demodulation module 30 enters the working state to complete the subsequent signal receiving work.

[0037] In summary, by using two different demodulation units to complete the signal detection and receiving work in different states, the signal demodulation can be completed through the paths of both demodulation units to avoid additional power consumption caused by the detection of non-useful signals in the environment. Among them, since the walkie-talkie device is in a state of detecting external signals for a long time, when the power consumption of the first demodulation module 20 is lower than that of the second demodulation module 30, the second demodulation module 30 is only awakened for signal receiving processing when a useful signal is detected, which can greatly reduce the power consumption of the device during standby, thereby increasing the standby time of the device.

[0038] Optionally, in an embodiment, as Figure 2 shown, Figure 2 is a schematic structural diagram of an embodiment of the receiving module provided by the present application. Among them, the receiving module 10 includes: an antenna 11 and a power distribution unit 12; the input end of the power distribution unit 12 is connected to the antenna 11, the first output end of the power distribution unit 12 is connected to the first demodulation module 20, and the second output end of the power distribution unit 12 is connected to the second demodulation module 30.

[0039] It can be understood that when the antenna 11 receives an external radio frequency signal, the power distribution unit 12 processes the external radio frequency signal and divides it into a first signal output to the first demodulation module 20 and a second signal output to the second demodulation module 30.

[0040] Optionally, in one embodiment, as Figure 3 shown, Figure 3 is a schematic structural diagram of the second embodiment of the receiving module provided by the present application; the receiving module 10 further includes: a first filtering unit 13, a first amplifying unit 14, and a limiting unit 15. The first end of the first filtering unit 13 is connected to the antenna 11; the input end of the first amplifying unit 14 is connected to the second end of the first filtering unit 13, and the output end of the first amplifying unit 14 is connected to the input end of the power distribution unit 12; the first end of the limiting unit 15 is connected to the input end of the first amplifying unit 14, and the second end of the limiting unit 15 is grounded.

[0041] Among them, the first filtering unit 13 is used to filter external radio frequency signals. In one embodiment, as Figure 4 shown, Figure 4 is a schematic structural diagram of an embodiment of the first filtering unit provided by the present application; the first filtering unit 13 may include: a low-pass filter 13a and a high-pass filter 13b. Among them, the input end of the low-pass filter 13a is connected to the antenna 11; the input end of the high-pass filter 13b is connected to the output end of the low-pass filter 13a, and the output end of the high-pass filter 13b is connected to the input end of the first amplifying unit 14 and the first end of the limiting unit 15.

[0042] Optionally, in one embodiment, as Figure 5 shown, Figure 5 is a schematic structural diagram of an embodiment of the first demodulation module provided by the present application; the first demodulation module 20 includes: a second amplifying unit 21, a first mixer 22, a first oscillation unit 23, a first analog-to-digital conversion unit 24, a second filtering unit 25, a demodulation unit 26, and a digital-to-analog conversion unit 27; specifically, the input end of the second amplifying unit 21 is connected to the receiving module 10; the first input end of the first mixer 22 is connected to the output end of the second amplifying unit 21; the output end of the first oscillation unit 23 is connected to the second input end of the first mixer 22; the input end of the first analog-to-digital conversion unit 24 is connected to the output end of the first mixer 22; the input end of the second filtering unit 25 is connected to the output end of the first analog-to-digital conversion unit 24; the input end of the demodulation unit 26 is connected to the output end of the second filtering unit 25; the input end of the digital-to-analog conversion unit 27 is connected to the demodulation unit 26, and the output end of the digital-to-analog conversion unit 27 is connected to the control module 40.

[0043] Optionally, in one embodiment, as Figure 5 shown, the first oscillation unit 23 includes: a voltage-controlled oscillator 23a and a first phase-locked loop 23b. The output end of the voltage-controlled oscillator 23a is connected to the second input end of the first mixer 22; the first phase-locked loop 23b is connected to the input end of the voltage-controlled oscillator 23a.

[0044] Optionally, in one embodiment, as Figure 6 shown, Figure 6 is a schematic structural diagram of an embodiment of a second demodulation module provided by the present application; specifically, the second demodulation module 30 includes: a second mixer 31, a second oscillation unit 32, a programmable gain amplifier 33, an anti-aliasing filter 34, a second analog-to-digital conversion unit 35, and a digital filter 36; a first input end of the second mixer 31 is connected to the receiving module 10; an input end of the second oscillation unit 32 is connected to the control module 40, and an output end of the second oscillation unit 32 is connected to a second input end of the second mixer 31; an input end of the programmable gain amplifier 33 is connected to an output end of the second mixer 31; an input end of the anti-aliasing filter 34 is connected to an output end of the programmable gain amplifier 33; an input end of the second analog-to-digital conversion unit 35 is connected to an output end of the anti-aliasing filter 34; an input end of the digital filter 36 is connected to an output end of the second analog-to-digital conversion unit 35, and an output end of the digital filter 36 is connected to the control module 40.

[0045] Optionally, in one embodiment, as Figure 6 shown, the second oscillation unit 32 further includes: a local oscillator 32a, an output end of the local oscillator 32a is connected to a second input end of the second mixer 31; a buffer amplifier 32b, an output end of the buffer amplifier 32b is connected to an input end of the local oscillator 32a; a second phase-locked loop 32c, an output end of the second phase-locked loop 32c is connected to an input end of the buffer amplifier 32b, and an input end of the second phase-locked loop 32c is connected to the control module 40.

[0046] Optionally, in one embodiment, as Figure 7 shown, Figure 7 is a schematic structural diagram of an embodiment of the control module provided by the present application; the control module 40 includes: a baseband chip 41 and a codec 42, the baseband chip 41 is connected to the first demodulation module 20 and the second demodulation module 30; the codec 42 is connected to the baseband chip 41.

[0047] Optionally, in one embodiment, the baseband chip 41 is integrated with a digital signal processor which is connected to the second demodulation module 30. The digital signal processor is used to wake up the second demodulation module 30 when the first signal is a useful signal and control the first demodulation module 20 to power off. It can be understood that the digital signal processor can be a DSP chip. Here, DSP (Digital Signal Processing) refers to digital signal processing technology, and a DSP chip refers to a chip that can implement digital signal processing technology. When a useful signal is detected after demodulation by the first demodulation module 20, the DSP chip and the second demodulation module 30 are woken up simultaneously, and the first demodulation module 20 is powered off. For example, taking the demodulation chips AK2401 and BK4802 as an example, where BK4802 is a low-power demodulation chip; after receiving a radio frequency signal, the signal is transmitted to a power splitter circuit, and at the same time, the two processed signals are connected and transmitted to the demodulation chips AK2401 and BK4802; during the signal monitoring stage, the demodulation chip AK2401, which is the demodulation chip for receiving and processing, and the DSP chip are in a sleep state, and the demodulation chip BK4802 monitors the signal. When a useful signal is detected, the demodulation chip AK2401 and the DSP chip are woken up to receive and process the transmitted signal, and at the same time, the demodulation chip BK4802 is powered off; when no useful signal is detected, only the low-power demodulation chip BK4802 works all the time, and the demodulation chip AK2401 and the DSP chip are in a sleep state to reduce power consumption.

[0048] For the power-saving effect generated by the above example, as shown in the following table, through the calculation method of 5590, taking a battery capacity of 2400 mAh as an example, only calculating the power saved in the receiving part, this solution can extend the standby time by 1.5 - 1.8 h. If combined with the power saved in the DSP chip part, this solution can extend the standby time by 2.7 - 3.2 h (this calculation is only for example, different models and different battery capacities will affect the above results).

[0049]

[0050] Refer to Figure 8 as shown Figure 8 is a schematic structural diagram of the second embodiment of the signal receiving circuit provided by the present application; in this embodiment, as Figure 8 shown, through the front-end receiving module 10 (i.e., Figure 8The antenna, low-pass filter, high-pass filter, limiter, amplifier, and LC power divider included therein), the LC power divider therein divides an external signal into a first signal and a second signal, and the low-power demodulation IC (i.e., the first demodulation module 20) therein receives the first signal and demodulates the first signal to determine whether the first signal is a useful signal; the demodulation IC (i.e., the second demodulation module 30) receives the second signal and is controlled by the backend BBIC and DSP chip (i.e., the control module 40). Specifically, in the signal monitoring stage, as Figure 8 shown, in the path of the demodulation IC below, the DSP chip is in a sleep state, and the signal monitoring is implemented by the low-power demodulation IC above. When a useful signal is detected, the demodulation IC and DSP chip below are awakened to normally receive the signal, and at the same time, the low-power demodulation IC used for monitoring above is powered off; when no useful signal is detected, only the low-power demodulation IC above works all the time, thus reducing the standby power consumption of the device. Among them, as Figure 8 shown, the circuit also includes: CIDEC (codec), audio power amplifier, speaker, and MIC (microphone), which can implement the functions of converting and outputting audio signals and inputting.

[0051] To solve the above problems, the present application also provides an electronic device 200. Refer to Figure 9 shown, Figure 9 is a schematic structural diagram of an embodiment of the electronic device provided by the present application; the electronic device 200 includes: a signal receiving circuit 100; specifically, the signal receiving circuit 100 is the signal receiving circuit 100 described in any one of the above embodiments.

[0052] The signal receiving circuit 100 provided by the present application includes: a receiving module 10, a first demodulation module 20, a second demodulation module 30, and a control module 40. Specifically, the receiving module 10 is configured to receive an external signal and divide the external signal into a first signal and a second signal; the first demodulation module 20 is connected to the first output end of the receiving module 10, and is used to receive the first signal and demodulate the first signal to determine whether the first signal is a useful signal; the second demodulation module 30 is connected to the second output end of the receiving module 10 to receive the second signal; the control module 40 is connected to the first demodulation module 20 and the second demodulation module 30; the first demodulation module 20 is configured to wake up the control module 40 when it is determined that the first signal is a useful signal, and the control module 40 wakes up the second demodulation module 30 and controls the first demodulation module 20 to power off, so that the second demodulation module 30 switches from the sleep state to the working state, thereby demodulating the second signal; among them, the power consumption of the first demodulation module 20 is lower than the power consumption of the second demodulation module 30 in the working state.

[0053] In summary, through the above method, by using the different power consumptions and different operating modes of two different demodulation modules, the functions of detecting external signals by the walkie-talkie at different times under different working conditions, receiving and processing the useful signals after detecting the useful signals are realized, so as to optimize the power consumption of the walkie-talkie, extend the standby time of the walkie-talkie, and meet the long-term use requirements.

[0054] The embodiments of the present application have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A signal receiving circuit, characterized in that: The signal receiving circuit comprises: A receiving module, wherein the receiving module is configured to receive an external signal and divide the external signal into a first signal and a second signal; A first demodulation module, connected to the first output end of the receiving module, configured to receive the first signal and demodulate the first signal to determine whether the first signal is a useful signal; A second demodulation module, connected to the second output end of the receiving module to receive the second signal; A control module, connected to the first demodulation module and the second demodulation module; The first demodulation module is configured to wake up the control module when determining that the first signal is a useful signal, and the control module wakes up the second demodulation module and controls the first demodulation module to be powered off, so that the second demodulation module switches from a sleep state to a working state, thereby demodulating the second signal; The power consumption of the first demodulation module is lower than the power consumption of the second demodulation module in a working state.

2. The signal receiving circuit according to claim 1, characterized in that: The receiving module comprises: antenna; A power distribution unit, wherein an input end of the power distribution unit is connected to the antenna, a first output end of the power distribution unit is connected to the first demodulation module, and a second output end of the power distribution unit is connected to the second demodulation module.

3. The signal receiving circuit according to claim 2, characterized in that: The receiving module also includes: a first filtering unit, wherein a first end of the first filtering unit is connected to the antenna; a first amplifying unit, wherein an input end of the first amplifying unit is connected to the second end of the first filtering unit, and an output end of the first amplifying unit is connected to an input end of the power distribution unit; A limiting unit, wherein a first end of the limiting unit is connected to an input end of the first amplifying unit, and a second end of the limiting unit is grounded.

4. The signal receiving circuit according to claim 1, characterized in that: The first demodulation module comprises: A second amplifying unit, wherein an input end of the second amplifying unit is connected to the receiving module; A first mixer, wherein a first input end of the first mixer is connected to an output end of the second amplifying unit; A first oscillating unit, wherein an output end of the first oscillating unit is connected to a second input end of the first mixer; A first analog-to-digital conversion unit, wherein an input end of the first analog-to-digital conversion unit is connected to an output end of the first mixer; a second filtering unit, wherein an input end of the second filtering unit is connected to an output end of the first analog-to-digital conversion unit; A demodulation unit, wherein an input end of the demodulation unit is connected to an output end of the second filtering unit; A digital-to-analog conversion unit, wherein the input end of the digital-to-analog conversion unit is connected to the demodulation unit, and the output end of the digital-to-analog conversion unit is connected to the control module.

5. The signal receiving circuit according to claim 4, characterized in that: The first oscillation unit comprises: A voltage-controlled oscillator, wherein an output end of the voltage-controlled oscillator is connected to a second input end of the first mixer; A first phase-locked loop, wherein the first phase-locked loop is connected to an input end of the voltage-controlled oscillator.

6. The signal receiving circuit according to claim 1, characterized in that: The second demodulation module comprises: A second mixer, wherein a first input end of the second mixer is connected to the receiving module; A second oscillating unit, wherein an input end of the second oscillating unit is connected to the control module, and an output end of the second oscillating unit is connected to a second input end of the second mixer; A programmable gain amplifier, wherein an input end of the programmable gain amplifier is connected to an output end of the second mixer; an anti-aliasing filter, wherein an input end of the anti-aliasing filter is connected to an output end of the programmable gain amplifier; A second analog-to-digital conversion unit, wherein an input end of the second analog-to-digital conversion unit is connected to an output end of the anti-aliasing filter; A digital filter, wherein the input end of the digital filter is connected to the output end of the second analog-to-digital conversion unit, and the output end of the digital filter is connected to the control module.

7. The signal receiving circuit according to claim 6, characterized in that: The second oscillation unit further comprises: a local oscillator, wherein an output end of the local oscillator is connected to a second input end of the second mixer; a buffer amplifier, wherein an output end of the buffer amplifier is connected to an input end of the local oscillator; A second phase-locked loop, wherein the output end of the second phase-locked loop is connected to the input end of the buffer amplifier, and the input end of the second phase-locked loop is connected to the control module.

8. The signal receiving circuit according to claim 1, characterized in that: The control module comprises: A baseband chip, wherein the baseband chip is connected to the first demodulation module and the second demodulation module; A codec is connected to the baseband chip.

9. The signal receiving circuit according to claim 8, characterized in that: The baseband chip is integrated with a digital signal processor, the digital signal processor is connected to the second demodulation module, and the digital signal processor is used to wake up the second demodulation module and control the first demodulation module to be powered off when the first signal is a useful signal.

10. An electronic device, characterized in that: The electronic device comprises the signal receiving circuit as claimed in any one of claims 1 to 9.

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