Function processing module based on 5G wireless

Abstract

The utility model discloses a 5G wireless-based function processing module, and relates to the technical field of communication circuits, the 5G wireless-based function processing module comprises a single-chip microcomputer module, an amplification module, a signal receiving module and a communication module, the single-chip microcomputer module is in control connection with the amplification module, the single-chip microcomputer module is in communication connection with the signal receiving module, the input of the amplification module is Vrefin, and the output of the amplification module is Vrefin. The output of the amplification module is Vrefout, the input end and the output end of the amplification module are connected with the input end and the output end of the signal receiving module in parallel, and the communication module is in signal connection with the single-chip microcomputer module. The problem that in the prior art, a 5G module is built to be high is solved, and the beneficial effects of being high in economical efficiency and saving energy are achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of communication circuits, and specifically to a functional processing module based on 5G wireless. Background Art

[0002] The fifth-generation mobile communication technology, abbreviated as 5G, is a new generation of broadband mobile communication technology with the characteristics of high speed, low latency, and large connection. 5G communication facilities are the network infrastructure for realizing the interconnection of humans, machines, and things.

[0003] 5G technology meets the application requirements of the intelligent transformation of power plants for wireless networks, can meet the device interconnection and remote interaction in industrial environments, and has obvious advantages. On the one hand, it can reduce the cable cost between devices, use the high-reliability network for continuous coverage, meet the various differential service requirements of the company, realize information sharing anytime and anywhere, and promote safe and high-quality production. On the other hand, it helps to realize the intelligent diagnosis and remote maintenance of the company's "5G + smart power plant", and helps to upgrade the maintenance mode. 5G technology can be applied to aspects such as remote identification, diagnosis, maintenance of equipment, and automatic identification and repair of problems, greatly improving the production operation efficiency and reducing costs. In the existing technology, 5G modules have problems such as high construction cost, high power consumption, and high maintenance cost. Summary of the Invention

[0004] The present invention proposes a functional processing module based on 5G wireless. This application solves the problem of high construction cost of 5G modules in the existing technology and has the characteristics of strong economy and energy saving.

[0005] The technical solution of the present invention is as follows:

[0006] A functional processing module based on 5G wireless includes a single-chip microcomputer module, an amplification module, a signal receiving module, and a communication module. The single-chip microcomputer module is controlled to connect the amplification module. The single-chip microcomputer module is communicatively connected to the signal receiving module. The input of the amplification module is Vrefin, and the output of the amplification module is Vrefout. The input and output ends of the amplification module and the input and output ends of the signal receiving module are connected in parallel. The communication module is signal-connected to the single-chip microcomputer module.

[0007] As a further optimization of this solution, it further includes a storage module. The storage module includes a memory U2. The A0 - A2 pins of the memory U2 are grounded. The VSS pin of the memory U2 is grounded. The VCC pin of the memory U2 is connected to a first voltage source. The WP pin of the memory U2 is connected to the P0.4 pin of the single-chip microcomputer module through a resistor R14. The SCL pin of the memory U2 is connected to the P0.1 pin of the single-chip microcomputer module through a resistor R15.

[0008] As a further optimization of this solution, the amplification module includes comparators U5 - U8. The first interface of the amplification module is connected to the P1.0 pin of the single - chip microcomputer module, and the second interface of the amplification module is connected to the P1.1 pin of the single - chip microcomputer module. The inverting terminal of comparator U5 serves as the first interface, the non - inverting terminal of comparator U5 serves as the input terminal Vrefin of the amplification module, the output of comparator U5 is connected to the non - inverting terminal of comparator U6, the inverting terminal of comparator U6 is connected to the inverting terminal of comparator U5 through resistor R19, the non - inverting terminal of comparator U5 is connected to the inverting terminal of comparator U8, the non - inverting terminal of comparator U8 serves as the second interface, the non - inverting terminal of comparator U8 is connected to the non - inverting terminal of comparator U7 through resistor R21, the output of comparator U8 is connected to the inverting terminal of comparator U7, and the outputs of comparator U7 and comparator U6 together serve as the output terminal of the amplification module.

[0009] As a further optimization of this solution, the signal receiving module includes an attenuator U4. The V1_16dB pin of the attenuator U4 is connected to the P2.2 pin of the single - chip microcomputer module through resistor R7, the V2_8dB pin of the attenuator U4 is connected to the P2.3 pin of the single - chip microcomputer module through resistor R8, the V3_4dB pin of the attenuator U4 is connected to the P2.4 pin of the single - chip microcomputer module through resistor R9, the V4_2dB pin of the attenuator U4 is connected to the P2.5 pin of the single - chip microcomputer module through resistor R10, the V5_1dB pin of the attenuator U4 is connected to the P2.6 pin of the single - chip microcomputer module through resistor R11, the V6_0.5dB pin of the attenuator U4 is connected to the P2.7 pin of the single - chip microcomputer module through resistor R12. The EGND pin and N / C pin of the attenuator U4 are grounded. The RF2 pin of the attenuator U4 serves as the input terminal of the signal receiving module, the RF1 pin of the attenuator U4 serves as the output terminal of the signal receiving module, the VDD pin of the attenuator U4 is connected to the second voltage source, and the ACG1 - 6 of the attenuator U4 are grounded through capacitors respectively.

[0010] As a further optimization of this solution, the communication module includes a USB interface module. The GND pin of the USB interface module is grounded, the D + pin of the USB interface module is connected to the D + pin of the single - chip microcomputer module through resistor R1, the D - pin of the USB interface module is connected to the D - pin of the single - chip microcomputer module through resistor R2, and the VCC pin of the USB interface module is connected to the VBUS pin of the single - chip microcomputer module through resistor R3.

[0011] As a further optimization of this solution, D+ of the USB interface module is grounded through resistor R4, D- of the USB interface module is grounded through the pin of resistor R2, and the VCC pin of the USB interface module is grounded through resistor R6.

[0012] As a further optimization of this solution, the communication module further includes an information interaction module. The information interaction module includes driver U3. The RE# pin and the DE pin of driver U3 are connected in parallel and then connected to the P3.6 pin of the single-chip microcomputer module. The RO pin of driver U3 is connected to the P3.5 pin of the single-chip microcomputer module. The DI pin of driver U3 is connected to the P3.4 pin of the single-chip microcomputer module. The VCC pin of driver U3 is connected to the second voltage source. The A pin of driver U3 is used as the 485A output, and the B pin of driver U3 is used as the 485B output.

[0013] As a further optimization of this solution, it further includes a test port. The test port includes interface CN1. The 1 pin of interface CN1 is connected to the RST / C2CK pin of the single-chip microcomputer module. The 2 pin of interface CN1 is connected to the C2D pin of the single-chip microcomputer module. The 3 pin of interface CN1 is connected to the GND pin of the single-chip microcomputer module. The 4 pin of interface CN1 is connected to the VDD pin of the single-chip microcomputer module.

[0014] The working principle and beneficial effects of the present invention are as follows:

[0015] In this application, the main control module includes a single-chip microcomputer module. The single-chip microcomputer is adapted to the 5G communication function. The amplification module is used to adjust the received radio frequency signal and condition the radio frequency signal to the intensity range that can be processed by the subsequent system. The signal receiving module is externally connected to the antenna. The signal receiving module also collects the input and output power of the radio frequency signal and, according to the actual input and output results, converts it into a digital signal through a multi-bit half-subtractive electrical output and inputs it to the single-chip microcomputer. The single-chip microcomputer can control the amplification module through the first interaction port and the second interaction port, so as to feedback the acquisition result to the output of the amplification module. Description of the Drawings

[0016] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.

[0017] Figure 1 This is the circuit schematic diagram of this application. Specific Embodiments

[0018] Next, in combination with the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0019] As described in the specification appendix Figure 1 A function processing module based on 5G wireless includes a single-chip microcomputer module, an amplification module, a signal receiving module, and a communication module. The single-chip microcomputer module is controllably connected to the amplification module. The single-chip microcomputer module is communicatively connected to the signal receiving module. The input of the amplification module is Vrefin, and the output of the amplification module is Vrefout. The input and output terminals of the amplification module and the input and output terminals of the signal receiving module are connected in parallel. The communication module is signal-connected to the single-chip microcomputer module. The amplification module is used to adjust the received radio frequency signal and condition the radio frequency signal to an intensity range that can be processed by the subsequent system. The external of the signal receiving module is connected to an antenna. The signal receiving module also collects the input and output power of the radio frequency signal and, according to the actual input and output results, converts it into a digital signal through a multi-bit half-subtractive electrical output and inputs it to the single-chip microcomputer. The single-chip microcomputer can control the amplification module through the first interaction port and the second interaction port, so as to feedback the acquisition result to the output of the amplification module. The communication module includes a USB module and an information interaction module.

[0020] As described in the specification appendix Figure 1 As shown, it further includes a storage module. The storage module includes a memory U2. The A0-A2 pins of the memory U2 are grounded. The VSS pin of the memory U2 is grounded. The VCC pin of the memory U2 is connected to the first voltage source. The WP pin of the memory U2 is connected to the P0.4 pin of the single-chip microcomputer module through a resistor R14. The SCL pin of the memory U2 is connected to the P0.1 pin of the single-chip microcomputer module through a resistor R15. The storage module is used to store data and delay data.

[0021] As described in the specification appendix Figure 1As shown, the amplification module includes comparators U5 - U8. The first interface of the amplification module is connected to the P1.0 pin of the single - chip microcomputer module, and the second interface of the amplification module is connected to the P1.1 pin of the single - chip microcomputer module. The inverting terminal of comparator U5 serves as the first interface, the non - inverting terminal of comparator U5 serves as the input terminal Vrefin of the amplification module. The output of comparator U5 is connected to the non - inverting terminal of comparator U6. The inverting terminal of comparator U6 is connected to the inverting terminal of comparator U5 through resistor R19. The non - inverting terminal of comparator U5 is connected to the inverting terminal of comparator U8. The non - inverting terminal of comparator U8 serves as the second interface. The non - inverting terminal of comparator U8 is connected to the non - inverting terminal of comparator U7 through resistor R21. The output of comparator U8 is connected to the inverting terminal of comparator U7. The outputs of comparator U7 and comparator U6 together serve as the output terminal of the amplification module.

[0022] The amplification module includes two amplification circuits. The non - inverting terminal and the inverting terminal of these two amplification circuits are connected. The inverting terminal of one path serves as the first interface and is connected to the single - chip microcomputer, and the non - inverting terminal of the other path serves as the second interface and is connected to the single - chip microcomputer. Thus, the single - chip microcomputer adjusts the amplification factor of the amplifier by adjusting the voltages of the two non - inverting and inverting inputs.

[0023] The signal receiving module includes an attenuator U4. The V1_16dB pin of the attenuator U4 is connected to the P2.2 pin of the single - chip microcomputer module through resistor R7. The V2_8dB pin of the attenuator U4 is connected to the P2.3 pin of the single - chip microcomputer module through resistor R8. The V3_4dB pin of the attenuator U4 is connected to the P2.4 pin of the single - chip microcomputer module through resistor R9. The V4_2dB pin of the attenuator U4 is connected to the P2.5 pin of the single - chip microcomputer module through resistor R10. The V5_1dB pin of the attenuator U4 is connected to the P2.6 pin of the single - chip microcomputer module through resistor R11. The V6_0.5dB pin of the attenuator U4 is connected to the P2.7 pin of the single - chip microcomputer module through resistor R12. The EGND pin and N / C pin of the attenuator U4 are grounded. The RF2 pin of the attenuator U4 serves as the input terminal of the signal receiving module, and the RF1 pin of the attenuator U4 serves as the output terminal of the signal receiving module. The VDD pin of the attenuator U4 is connected to the second voltage source. The ACG1 - 6 of the attenuator U4 are grounded through capacitors respectively. This attenuator is a 6 - bit attenuator, and the attenuator is used to change the magnification of the input signal to the output signal, and transfer the data in digital signal form to the single - chip microcomputer through the V1 - V6 pins.

[0024] The communication module includes a USB interface module. The GND pin of the USB interface module is grounded. The D+ pin of the USB interface module is connected to the D+ pin of the single-chip microcomputer module through a resistor R1. The D- pin of the USB interface module is connected to the D- pin of the single-chip microcomputer module through a resistor R2. The VCC pin of the USB interface module is connected to the VBUS pin of the single-chip microcomputer module through a resistor R3. The D+ of the USB interface module is grounded through a resistor R4. The D- of the USB interface module is grounded through a resistor R2 pin. The VCC pin of the USB interface module is grounded through a resistor R6.

[0025] Among them, the USB interface module can be used to connect external devices, increasing the expansion function of this application.

[0026] The communication module also includes an information interaction module. The information interaction module includes a driver U3. The RE# pin and the DE pin of the driver U3 are connected in parallel and then connected to the P3.6 pin of the single-chip microcomputer module. The RO pin of the driver U3 is connected to the P3.5 pin of the single-chip microcomputer module. The DI pin of the driver U3 is connected to the P3.4 pin of the single-chip microcomputer module. The VCC pin of the driver U3 is connected to a second voltage source. The A pin of the driver U3 is used as the 485A output. The B pin of the driver U3 is used as the 485B output. This module realizes the normal information interaction function of this application.

[0027] It also includes a test port. The test port includes an interface CN1. The 1 pin of the interface CN1 is connected to the RST / C2CK pin of the single-chip microcomputer module. The 2 pin of the interface CN1 is connected to the C2D pin of the single-chip microcomputer module. The 3 pin of the interface CN1 is connected to the GND pin of the single-chip microcomputer module. The 4 pin of the interface CN1 is connected to the VDD pin of the single-chip microcomputer module. The test port is used to adjust and maintain this module.

[0028] In each embodiment of the present invention, each functional unit may be integrated into a processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of a software functional unit. If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium. Based on such an understanding, to implement all or part of the processes in the above-mentioned embodiment methods of the present invention, it may also be completed by a computer program instructing relevant hardware. The computer program may be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above-mentioned various method embodiments may be implemented. Among them, the computer program includes computer program code, and the computer program code may be in the form of source code, object code, executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.

[0029] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A 5G wireless-based functional processing module, characterized in that: It includes a single-chip microcomputer module, an amplifying module, a signal receiving module and a communication module. The single-chip microcomputer module controls the connection to the amplifying module. The single-chip microcomputer module is connected to the signal receiving module for communication. The input of the amplifying module is Vrefin, and the output of the amplifying module is Vrefout. The input and output ends of the amplifying module are connected in parallel with the input and output ends of the signal receiving module. The communication module is connected to the single-chip microcomputer module by signal.

2. A 5G wireless-based functional processing module according to claim 1, characterized in that: It also includes a storage module, which includes a memory U2, wherein the A0-A2 pins of the memory U2 are grounded, the VSS pin of the memory U2 is grounded, the VCC pin of the memory U2 is connected to a first voltage source, the WP pin of the memory U2 is connected to the P0.4 pin of the microcontroller module via a resistor R14, and the SCL pin of the memory U2 is connected to the P0.1 pin of the microcontroller module via a resistor R15.

3. A 5G wireless-based functional processing module according to claim 1, characterized in that: The amplification module includes comparators U5-U8, the first interactive port of the amplification module is connected to the P1.0 pin of the single-chip module, the second interactive port of the amplification module is connected to the P1.1 pin of the single-chip module, the inverting end of the comparator U5 serves as the first interactive port, the non-inverting end of the comparator U5 serves as the input end Vrefin of the amplification module, the output of the comparator U5 is connected to the non-inverting end of the comparator U6, the inverting end of the comparator U6 is connected to the inverting end of the comparator U5 through a resistor R19, the non-inverting end of the comparator U5 is connected to the inverting end of the comparator U8, the non-inverting end of the comparator U8 serves as the second interactive port, the non-inverting end of the comparator U8 is connected to the non-inverting end of the comparator U7 through a resistor R21, the output of the comparator U8 is connected to the inverting end of the comparator U7, and the output of the comparator U7 and the output of the comparator U6 serve together as the output end of the amplification module.

4. The 5G wireless-based functional processing module according to claim 1, characterized in that: The signal receiving module includes an attenuator U4, a V1_16dB pin of the attenuator U4 is connected to the P2.2 pin of the single-chip module through a resistor R7, a V2_8dB pin of the attenuator U4 is connected to the P2.3 pin of the single-chip module through a resistor R8, a V3_4dB pin of the attenuator U4 is connected to the P2.4 pin of the single-chip module through a resistor R9, a V4_2dB pin of the attenuator U4 is connected to the P2.5 pin of the single-chip module through a resistor R10, and a V5_1dB pin of the attenuator U4 is connected to the P2.6 pin of the single-chip module through a resistor R11. The pin is connected to the P2.6 pin of the single-chip microcomputer module through a resistor R11, the V6_0.5dB pin of the attenuator U4 is connected to the P2.7 pin of the single-chip microcomputer module through a resistor R12, the EGND pin and the N / C pin of the attenuator U4 are grounded, the RF2 pin of the attenuator U4 serves as the input end of the signal receiving module, the RF1 pin of the attenuator U4 serves as the output end of the signal receiving module, the VDD pin of the attenuator U4 is connected to a second voltage source, and the ACG1-6 of the attenuator U4 are grounded respectively through capacitors.

5. The 5G wireless-based functional processing module according to claim 1, characterized in that: The communication module includes a USB interface module, a GND pin of the USB interface module is grounded, a D+ pin of the USB interface module is connected to the D+ pin of the microcontroller module via a resistor R1, a D- pin of the USB interface module is connected to the D- pin of the microcontroller module via a resistor R2, and a VCC pin of the USB interface module is connected to the VBUS pin of the microcontroller module via a resistor R3.

6. A 5G wireless-based functional processing module according to claim 5, characterized in that: The D+ of the USB interface module is grounded through a resistor R4, the D- of the USB interface module is grounded through a resistor R2 pin, and the VCC pin of the USB interface module is grounded through a resistor R6.

7. The 5G wireless-based functional processing module according to claim 1, characterized in that: The communication module also includes an information interaction module, which includes a driver U3. The RE# pin and DE pin of the driver U3 are connected in parallel and then connected to the P3.6 pin of the single-chip microcomputer module. The RO pin of the driver U3 is connected to the P3.5 pin of the single-chip microcomputer module. The DI pin of the driver U3 is connected to the P3.4 pin of the single-chip microcomputer module. The VCC pin of the driver U3 is connected to a second voltage source. The A pin of the driver U3 is used as a 485A output, and the B pin of the driver U3 is used as a 485B output.

8. The 5G wireless-based functional processing module according to claim 1, characterized in that: It also includes a test port, which includes an interface CN1, pin 1 of the interface CN1 is connected to the RST / C2CK pin of the microcontroller module, pin 2 of the interface CN1 is connected to the C2D pin of the microcontroller module, pin 3 of the interface CN1 is connected to the GND pin of the microcontroller module, and pin 4 of the interface CN1 is connected to the VDD pin of the microcontroller module.

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