High-temperature test control system for chip
The heating rod and K-type thermocouple in the test seat are controlled by the management control module, and the precise control of the heating temperature of the chip is achieved, which solves the problems of wasted space and difficult design in the existing technology, and improves the efficiency and convenience of high-temperature testing of the chip.
Patent Information
- Application Number
- CN202421726811.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-22
- Publication Date
- 2025-06-20
- Estimated Expiration
- 2034-07-22
AI Technical Summary
The existing chip high-temperature testing methods have problems such as wasting space and high design difficulty, and are inconvenient to test.
A high-temperature test control system is designed to control the temperature information collected by the heating rod and K-type thermocouple in the test seat through the management control module to achieve accurate control of the heating temperature of the chip.
It realizes the efficiency and convenience of chip aging testing, saves on-board space and design costs, and reduces the difficulty of testing.
Smart Images
Figure CN223006266U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of chip high-temperature test control, in particular to a high-temperature test control system for chips. Background Technique
[0002] The high-temperature test of chips is an essential electrical performance parameter for a newly developed chip during the burn-in stage.
[0003] When the failure mode of the newly developed chip is a bathtub curve, it is necessary to conduct burn-in tests on the newly developed chips to screen out those barely qualified or defective chips. Therefore, it is particularly important to have a batch and efficient burn-in test environment for chips.
[0004] In the prior art, there are mainly two methods for the high-temperature burn-in test of chips: one method is to add a heating cover around each burn-in test socket to heat the chip to the required ambient temperature, such as 105°C or 155°C. This requires a large space to be reserved around the burn-in test socket when designing the burn-in test board to prevent the heating cover, which is very wasteful of the board space; another method is to place the entire burn-in test board in a special incubator for high-temperature burn-in tests. This not only requires a high temperature for the incubator but also very high requirements for the heat-resistant components of the burn-in test board, increasing the design difficulty. In either method, the test is extremely inconvenient.
[0005] Therefore, there is an urgent need for a convenient and efficient chip high-temperature test control method. Content of the Utility Model
[0006] Aiming at the problems existing in the above two methods, the utility model aims to propose a high-temperature test control system for chips. By controlling multiple heating rods in the test socket and detecting the temperature information collected by multiple K-type thermocouples through the management control module, the burn-in heating temperature of the chips required by the user can be achieved, so as to better conduct burn-in tests on the chips, with extremely high efficiency; at the same time, the use of heating covers and heat-resistant components is eliminated, which not only saves the board space but also reduces the design difficulty and cost, greatly improving the use convenience.
[0007] The technical solution adopted is as follows:
[0008] A high-temperature test control system for a chip, the system comprising: a chip burn-in test board, a host computer 105, and a control circuit mounted on the chip burn-in test board. The control circuit includes a power module 101, a DC-DC converter 102, a plurality of test sockets, a plurality of digital conversion chips, a management control module BMC 103, and a serial port 104. Each test socket is connected to a corresponding digital conversion chip. Each test socket is internally provided with a corresponding heating rod and a temperature acquisition probe; the input end of the DC-DC converter 102 is connected to the power module 101, the power supply end of each test socket is connected to each power voltage output end corresponding to the DC-DC converter 102, the heating rod in each test socket is directly connected to the management control module BMC 103, each temperature acquisition probe is connected to a corresponding digital conversion chip, each digital conversion chip is connected to the management control module BMC 103 through an SPI interface, and the management control module BMC 103 is interconnected with the host computer 105 through the serial port 104.
[0009] Preferably, each temperature acquisition probe uses a K-type thermocouple, and the serial port 104 is a UART serial port. The K-type thermocouple can transmit the collected temperature to the corresponding digital conversion chip on the burn-in test board. The K-type thermocouple is inexpensive, has good linearity, high sensitivity, and can collect accurate temperature values; the UART serial port is a universal asynchronous transceiver, which can realize full-duplex data interaction and has strong applicability.
[0010] Preferably, each digital conversion chip uses a MAX6675, and at the same time, each MAX6675 shares an SPI bus. The MAX6675 is internally provided with a 12-bit digital-to-analog converter, has a cold-junction compensation and correction function, and the resolution can reach 0.25 °C. Multiple MAX6675 sharing the SPI bus can save costs and is also convenient for synchronous operation.
[0011] Preferably, the chip burn-in test board includes a panel, a guide sleeve, at least two lugs, a power connector, and a plurality of connectors. The guide sleeve fixes the power connector and the plurality of connectors on the panel. At least two lugs support the bottom of the panel. The control circuit is installed on the top of the panel, and the power connector is connected to the power module 101. The lugs can effectively support the panel, and the guide sleeve can enhance the connection between the panel and the connectors.
[0012] Preferably, the management control module BMC uses a STM32 series single-chip microcomputer. The STM32 series single-chip microcomputer has characteristics such as high performance, low power consumption, and strong applicability.
[0013] Compared with the prior art, the beneficial effects of this application are:
[0014] This application controls multiple heating rods in the test socket and detects the temperature information collected by multiple K-type thermocouples through a management control module to achieve the chip aging heating temperature required by the user, so as to better perform chip aging tests. At the same time, in a general laboratory environment, this application can control the heating of the heating rods in the test socket at any time and place by simply programming the command code to reach the required aging temperature. Coupled with the used K-type thermocouple temperature sensor, it can be reported to the serial port software of the host computer in real time through the serial port UART of the management control module BMC, saving the use of a heating cover and high-temperature-resistant components, not only saving board space, but also reducing the design difficulty and cost, and greatly improving the usability of chips that require aging tests. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a schematic structural diagram of a high-temperature test control system for chips.
[0016] Figure 2 It is a flowchart of the operation of a high-temperature test control system for chips. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0017] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.
[0018] As Figure 1 shown, it is a schematic structural diagram of a high-temperature test control system for chips. The system includes a chip aging test board, a host computer 105, and a control circuit installed on the chip aging test board. The user can perform high-temperature test control on the control circuit on the aging test board through the host computer 105, with simple and efficient operation.
[0019] In this embodiment, the chip burn-in test board includes a panel, a bushing, at least two lugs, a power connector, and a plurality of connectors. The bushing fixes the power connector and the plurality of connectors on the panel. At least two lugs are used to support the bottom of the panel. A control circuit is installed on the top of the panel. The power connector is connected to the power module 101 to supply power to the control circuit. The power module 101 mainly receives the external power connected by the power connector and then adjusts the input of the external power to the input applicable to the control circuit. The remaining connectors enable the panel to support the connection of the control circuit to other external power supplies or additional external devices. The lugs can effectively support the panel, and the number is at least two. The two lugs can be located at both ends of the bottom of the panel respectively, or the four lugs can be located at the four symmetric ends of the bottom of the panel respectively. The bushing can enhance the connection between the panel and the connectors, strengthen the fixation, and facilitate accurate testing.
[0020] In this embodiment, the control circuit includes a power module 101, a DC-DC converter 102, a plurality of test sockets, a plurality of digital conversion chips, a management control module BMC 103, and a serial port 104. The DC-DC converter 102 can also be expressed as the DC / DC converter 102. Each test socket is connected to a corresponding digital conversion chip, and each test socket is internally provided with a corresponding heating rod and a temperature acquisition probe. The input end of the DC-DC converter 102 is connected to the power module 101. The power supply end of each test socket is connected to each power voltage output end corresponding to the DC-DC converter 102. The heating rod in each test socket is directly connected to the management control module BMC 103. Each temperature acquisition probe is connected to the corresponding digital conversion chip. Each digital conversion chip is connected to the management control module BMC 103 through the spi interface. The management control module BMC 103 is interconnected with the host computer 105 through the serial port 104. For example, the test sockets 11, 12...1 n 、...n1、n2、...n n are respectively connected to the digital conversions 11, 12...1 n 、...n1、n2、...n n respectively, and are also respectively connected to the power supplies 11, 12...1 n 、...n1、n2、...n n of the DC-DC converter 102.
[0021] In this embodiment, each temperature acquisition probe uses a K-type thermocouple, and the serial port 104 is a UART serial port. The K-type thermocouple can transmit the collected temperature to the corresponding digital conversion chip on the burn-in test board. The K-type thermocouple is inexpensive, has good linearity, high sensitivity, and can collect accurate temperature values. The UART serial port is a universal asynchronous receiver / transmitter that can achieve full-duplex data interaction, is suitable for various different data transmission requirements, and is simple and easy to use.
[0022] In this embodiment, each digital conversion chip uses MAX6675, and each MAX6675 shares one SPI bus. MAX6675 has a built-in 12-bit digital-to-analog converter, with cold-junction compensation and calibration functions, and a resolution of up to 0.25 °C. Sharing the SPI bus by multiple MAX6675s can save costs and facilitate synchronous operations. Each MAX6675 can digitize the temperature data collected by the corresponding K-type thermocouple, and then connect to the management control module BMC through its own SPI interface. The specific SPI interface used is the SPI bus, which can transmit the chip select signal CS, enabling the management control module BMC to select multiple test sockets to be tested and obtain the real-time temperature of the test sockets in real time, which is efficient and convenient.
[0023] In this embodiment, the management control module BMC uses a STM32 series single-chip microcomputer. The STM32 series single-chip microcomputer is a 32-bit microcontroller based on the ARM Cortex-M core, with rich functions, and also has characteristics such as high performance, low power consumption, and strong applicability. The management control module BMC can receive the signal input from serial port 104, and then send out the heat_en enable signal combined with the chip select signal CS to heat the corresponding multiple test sockets and receive the signals from the corresponding digital conversion chips, and analyze the temperature and other situations of the test.
[0024] As Figure 2 shown, it is a flowchart of the operation of a high-temperature test control system for chips. Combining Figure 1 and Figure 2 to give a specific application example when a user conducts a test:
[0025] A. First, the user issues an instruction to the management control module BMC 103 through the serial port UART 104 of the upper computer 105 to set the required chip burn-in temperature value.
[0026] B. Then, after the management control module BMC 103 recognizes the set temperature value sent by the user, it starts to send the heater_en enable signal to the 9 heating rods of the 3*3 test sockets to heat them all. At the same time, the 9 K-type thermocouples transmit the collected temperature values to the corresponding 9 digital conversion chips MAX6675.
[0027] C. Next, the management control module BMC 103 pulls down the chip select signal CS in the SPI bus to report the temperature data.
[0028] D. The user compares the reported temperature data with the set chip burn-in temperature value. If the reported temperature data is greater than or equal to the set chip burn-in temperature value by the user, the heating is stopped, and the user can perform the chip burn-in test; otherwise, the heating rod is continuously enabled for heating until the reported temperature data is greater than or equal to the set chip burn-in temperature value by the user, and then the user performs the burn-in test.
[0029] In summary, the present application controls multiple heating rods in the test socket and detects the temperature information collected by multiple K-type thermocouples through the management control module to achieve the chip burn-in heating temperature required by the user, so as to better perform the chip burn-in test; in addition, the use of the heating cover and high-temperature resistant components is also eliminated, which not only saves the board space but also reduces the design difficulty and cost, greatly improving the usability of the chips that require burn-in testing.
[0030] For those skilled in the art, it is obvious that the present application is not limited to the details of the above exemplary embodiments, and can be implemented in other specific forms without departing from the spirit or basic characteristics of the present application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present application is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application. Any reference signs in the claims should not be regarded as limiting the claimed rights.
[0031] In addition, it should be understood that although this specification is described according to the embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
Claims
1. A high temperature test control system for a chip, characterized in that: include: A chip aging test board, a host computer (105) and a control circuit installed on the chip aging test board, the control circuit comprising a power module (101), a DC-DC converter (102), a plurality of test sockets, a plurality of digital conversion chips, a management control module BMC (103) and a serial port (104), each test socket is connected to a corresponding digital conversion chip, and each test socket has a corresponding built-in heating rod and a temperature acquisition probe; The input end of the DC-DC converter (102) is connected to the power module (101), the power supply end of each test socket is connected to each power supply voltage output end corresponding to the DC-DC converter (102), the heating rod in each test socket is directly connected to the management control module BMC (103), each temperature acquisition probe is connected to each corresponding digital conversion chip, each digital conversion chip is connected to the management control module BMC (103) via an SPI interface, and the management control module BMC (103) is interconnected with the host computer (105) via a serial port (104).
2. A high temperature test control system for a chip according to claim 1, characterized in that: Each temperature acquisition probe uses a K-type thermocouple, and the serial port (104) is a UART serial port.
3. A high temperature test control system for a chip according to claim 1, characterized in that: Each digital conversion chip uses MAX6675, and each MAX6675 shares a spi bus.
4. A high temperature test control system for a chip according to claim 1, characterized in that: The chip aging test board comprises a panel, a guide sleeve, at least two ears, a power connector and a plurality of connectors. The guide sleeve fixes the power connector and the plurality of connectors on the panel. The at least two ears support the bottom of the panel. The control circuit is installed on the top of the panel. The power connector is connected to a power module (101).
5. A high temperature test control system for a chip according to claim 1, characterized in that: The management control module BMC adopts STM32 series microcontroller.