Internal interconnection type switch chip and Hall switch

Abstract

The utility model relates to the technical field of electronic circuits, and particularly discloses an internal interconnection type switch chip and a Hall switch, which comprise two Hall circuits, a detection switching circuit electrically connected with the two Hall circuits, and a packaging body for packaging the two Hall circuits and the detection switching circuit, wherein the detection switching circuit is used for detecting the output parameters of the two Hall circuits, interrupting the power supply of the over-limit Hall circuit when the output parameter of one Hall circuit exceeds the limit, and switching to supply power to the other Hall circuit. The internal interconnection type switch chip and the Hall switch provided by the utility model can effectively solve the problems that when the conventional Hall switch is redundant and standby, the occupied space is relatively high, the cost is relatively high, and the signal output stability is relatively poor.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, and particularly relates to an internally interconnected switch chip and a Hall switch. Background Art

[0002] A Hall switch generally includes a magnet for generating a magnetic field, a pressing structure for driving the magnet to move up and down, and a switch chip located below the magnet for detecting changes in the magnetic field.

[0003] Generally, the magnet is far from the switch chip, and the magnetic field intensity detected by the switch chip is weak; when the pressing structure is pressed, the magnet is close to the switch chip, and the magnetic field intensity detected by the switch chip is strong. According to the strength of the magnetic field, the switch chip outputs different electrical signals, thereby realizing switch control.

[0004] In some key devices, in order to reduce the risk of the failure of the electronic control function caused by the failure of the Hall switch, two Hall switches are often set in the electronic control system. One is normally connected to the electronic control circuit, and the other is in a standby state. When the Hall switch normally connected to the electronic control circuit fails, it immediately switches to the other standby Hall switch.

[0005] However, using multiple Hall switches will cause the following problems:

[0006] ① Each Hall switch includes an independent magnet, a pressing structure, and a switch chip, which not only increases the material cost, but also greatly increases the space occupation, and is not conducive to the miniaturization design of the product;

[0007] ② Each Hall switch has an internal magnet, and the switch chip is easily interfered by the magnets inside other Hall switches in adjacent positions, and the signal output stability is poor.

[0008] Therefore, it is necessary to improve the existing Hall switch to solve the problems that when it is redundantly backed up, it not only occupies a large amount of space and has a high cost, but also has poor signal output stability.

[0009] The above information disclosed in this background section is only included to enhance the understanding of the background of the present disclosure, and thus may include information that does not form the prior art already known to those of ordinary skill in the art. Summary of the Utility Model

[0010] An object of the utility model is to provide an internally interconnected switch chip and a Hall switch, which can effectively solve the problems that when the existing Hall switch is redundantly backed up, it not only occupies a large amount of space and has a high cost, but also has poor signal output stability.

[0011] To achieve the above object, the utility model provides an internally interconnected switch chip and a Hall switch, which include two Hall circuits, a detection and switching circuit electrically connecting the two Hall circuits, and a package body encapsulating the two Hall circuits and the detection and switching circuit;

[0012] Wherein, the detection and switching circuit is used to detect the output parameters of the two Hall circuits, and when the output parameter of one of the Hall circuits exceeds the limit, interrupt the power supply of the Hall circuit with the exceeded limit and switch to supply power to the other Hall circuit.

[0013] Optionally, the Hall circuit includes a power input terminal, a ground terminal, and an output terminal group.

[0014] Optionally, the detection and switching circuit includes:

[0015] A parameter acquisition circuit, which is electrically connected to the output terminal groups of the two Hall circuits and is used to acquire the output parameters of the two Hall circuits;

[0016] A power supply switching circuit, which is respectively electrically connected to the power input terminals of the two Hall circuits and is electrically connected to the parameter acquisition circuit, and is used to receive the output parameters and control the on-off of the power supply of the two power input terminals.

[0017] Optionally, the output terminal group includes a first output terminal and a second output terminal; wherein, the first output terminal and the second output terminal are of a complementary output structure with opposite high and low levels;

[0018] The parameter acquisition circuit is electrically connected to the first output terminal and the second output terminal of each Hall circuit.

[0019] Optionally, a signal processing module, a Hall sensor, and a digital signal processor are provided between the power input terminal and the output terminal group.

[0020] Optionally, the signal processing module includes a voltage stabilization and correction circuit, an oscillation circuit, and a dynamic elimination circuit.

[0021] Optionally, electrostatic discharge protection circuits are provided between the power input terminal, the first output terminal, and the second output terminal and the ground terminal.

[0022] Optionally, the output parameters include current parameters and / or voltage parameters;

[0023] The parameter acquisition circuit includes a current acquisition circuit and / or a voltage acquisition circuit.

[0024] On the other hand, a Hall switch is provided, which includes a magnet for generating a magnetic field, a pressing structure for driving the magnet to move up and down, and a switch chip located below the magnet for detecting changes in the magnetic field.

[0025] Optionally, the pressing structure includes a pressing rod slidably arranged up and down, and a compression spring for driving the pressing rod to slide upward.

[0026] The beneficial effects of the present utility model are as follows: An internally interconnected switch chip and a Hall switch are provided. The detection switching circuit is electrically connected to two Hall circuits at the same time. Generally, the detection switching circuit supplies power to one of the Hall circuits. Only the powered Hall circuit can work normally and output signals externally.

[0027] During the power supply process, the detection switching circuit continuously detects the output parameters of the powered Hall circuit. When the output parameters of the powered Hall circuit exceed the limit, the detection switching circuit interrupts the power supply to the over-limit Hall circuit and instead supplies power to the other Hall circuit, and outputs signals through the other Hall circuit, thereby realizing the one-open-one-backup function.

[0028] On the one hand, integrating two Hall circuits in one package body, only one magnet and a pressing structure need to be configured to achieve one-open-one-backup, so space can be saved and costs can be reduced. On the other hand, because only one magnet needs to be configured, the problem that the internally interconnected switch chip is interfered by the magnets in other switches, resulting in poor signal output stability, can be avoided.

[0029] Therefore, the internally interconnected switch chip and the Hall switch provided by the present utility model can effectively solve the problems that the existing Hall switches not only occupy space and have high costs when in redundant standby, but also have poor signal output stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0031] Figure 1 It is a schematic structural diagram of the Hall switch provided for the embodiment;

[0032] Figure 2 It is the internal circuit diagram of the internally interconnected switch chip provided for the embodiment.

[0033] In the figure:

[0034] 100. Magnet; 200. Pressing structure; 200a. Pressing rod; 200b. Spring; 300. Internally interconnected switch chip;

[0035] 1. Encapsulation body;

[0036] 2. Hall circuit; Vs. Power input terminal; GND. Grounding terminal; OUT1. First output terminal; OUT2. Second output terminal; Sensor. Hall sensor; DC. Digital signal processor; Regulator. Voltage stabilizing and correction circuit; OSC. Oscillation circuit; DOC. Dynamic cancellation circuit; ESD. Electrostatic discharge protection circuit;

[0037] 3. Detection and switching circuit; 301. Parameter acquisition circuit; 302. Power supply switching circuit. Detailed implementation manner

[0038] In the present utility model, referring to "embodiment" means that the specific features, structures or characteristics described in combination with the embodiment can be included in at least one embodiment of the present utility model. The term "embodiment" appearing at various positions in the specification does not necessarily refer to the same embodiment, nor is it particularly limited to the independence or relevance between other embodiments. In principle, in the present utility model, as long as there is no technical contradiction or conflict, the technical features mentioned in each embodiment can be combined in any way to form corresponding implementable technical solutions.

[0039] Unless otherwise defined, the meanings of the technical terms used herein are the same as those generally understood by those skilled in the technical field to which the present utility model belongs; the use of the relevant terms herein is only for describing specific embodiments and is not intended to limit the present utility model.

[0040] In the description of the present utility model, the term "and / or" is an expression used to describe the logical relationship between objects, indicating that there can be three relationships, for example, A and / or B, which means: there is A, there is B, and there is both A and B at the same time. In addition, the character " / " in this article generally represents an "or" logical relationship between the associated objects before and after.

[0041] In the present utility model, terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual quantity, primary-secondary or order relationship between these entities or operations.

[0042] Without further limitations, in the present utility model, the terms "including", "comprising", "having" or other similar expressions used in the statements are intended to cover non-exclusive inclusion. These expressions do not exclude the possibility that there may be additional elements in the process, method or product including the said elements, so that in a process, method or product including a series of elements, it can not only include those defined elements, but also include other elements not explicitly listed, or elements inherent in such process, method or product.

[0043] Similar to the understanding in the "Examination Guidelines", in the present utility model, expressions such as "greater than", "less than", "exceeding" are understood not to include the present number; expressions such as "above", "below", "within" are understood to include the present number. In addition, in the description of the embodiments of the present utility model, the meaning of "a plurality of" is two or more (including two), and similar expressions related to "many" are also understood in this way, such as "multiple groups", "multiple times", etc., unless otherwise specifically defined.

[0044] In the description of the embodiments of the present utility model, the space-related expressions used, such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "perpendicular", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the specific embodiment or the drawings, and is only for the convenience of describing the specific embodiments of the present utility model or for the reader's understanding, rather than indicating or implying that the device or component referred to must have a specific position, a specific orientation, or be constructed or operated in a specific orientation, and thus should not be construed as a limitation to the embodiments of the present utility model.

[0045] Unless otherwise clearly specified or limited, in the description of the embodiments of the present utility model, the terms "installed", "connected", "joined", "fixed", "set", etc. should be understood in a broad sense. For example, the said "connection" can be a fixed connection, a detachable connection, or an integral setting; it can be a mechanical connection, an electrical connection, or a communication connection; it can be directly connected, or indirectly connected through an intermediate medium; it can be the communication inside two elements or the interaction relationship between two elements. For those skilled in the art to which the present utility model pertains, the specific meanings of the above terms in the embodiments of the present utility model can be understood according to specific circumstances.

[0046] The present utility model provides an internally interconnected switch chip and a Hall switch, which are applicable to the application scenarios of providing variable electrical signals according to magnetic field signals, and can effectively solve the problems that when the existing Hall switches are redundantly reserved, they not only occupy a large space and have a high cost, but also have poor signal output stability.

[0047] See Figure 1 Figure 1 , the Hall switch provided in this embodiment includes a magnet 100 for generating a magnetic field, a pressing structure 200 for driving the magnet 100 to move up and down, and a switch chip located below the magnet 100 for detecting changes in the magnetic field.

[0048]

[0048] Among them, the pressing structure 200 includes a pressing rod 200a that slides up and down, and a compression spring 200b for driving the pressing rod 200a to slide upward and reset. The magnet 100 is installed at the bottom of the pressing rod 200a. Pressing the pressing rod 200a downward can make the magnet 100 move downward closer to the internal interconnection switch chip 300; after releasing the hand, the spring 200b drives the pressing rod 200a to drive the magnet 100 to move upward and reset, away from the internal interconnection switch chip 300.

[0049] See Figure 2 Figure 2 , the internal interconnection switch chip 300 includes two Hall circuits 2, a detection and switching circuit 3 electrically connecting the two Hall circuits 2, and a package 1 encapsulating the two Hall circuits 2 and the detection and switching circuit 3.

[0050]

[0050] Among them, the detection and switching circuit 3 is used to detect the output parameters of the two Hall circuits 2. When the output parameter of one of the Hall circuits 2 exceeds the limit, the power supply of the over-limit Hall circuit 2 is interrupted, and the power supply is switched to the other Hall circuit 2.

[0051]

[0051] The internal interconnection switch chip 300 and the Hall switch provided in this embodiment, the detection and switching circuit 3 is electrically connected to the two Hall circuits 2 at the same time. Generally, the detection and switching circuit 3 supplies power to one of the Hall circuits 2, and only the powered Hall circuit 2 can work normally and output signals externally;

[0052]

[0052] During the power supply process, the detection and switching circuit 3 continuously detects the output parameters of the powered Hall circuit 2. When the output parameter of the powered Hall circuit 2 exceeds the limit (for example, the output parameter is too high or too low resulting in exceeding the preset range and lasting for a long time), it can be considered that the Hall circuit 2 is abnormal. The detection and switching circuit 3 can immediately interrupt the power supply to the over-limit Hall circuit 2 and switch to supply power to the other Hall circuit 2, and output signals through the other Hall circuit 2, thereby realizing the one-open-one-backup function.

[0053] On the one hand, integrating two Hall circuits 2 into one package 1 only requires configuring one magnet 100 and a pressing structure 200 to achieve one active and one standby, thus saving space and reducing costs. On the other hand, since only one magnet 100 needs to be configured, it can avoid the problem that the internal interconnected switch chip 300 is interfered by the magnets 100 in other switches, resulting in poor signal output stability.

[0054] Therefore, the internal interconnected switch chip 300 and Hall switch provided by the present utility model can effectively solve the problems that the existing Hall switches not only occupy a large amount of space and have high costs during redundant standby, but also have poor signal output stability.

[0055] The Hall circuit 2 includes a power input terminal Vs, a ground terminal GND, and an output terminal group; a signal processing module, a Hall sensor Sensor, and a digital signal processor DC are provided between the power input terminal Vs and the output terminal group. Among them, the signal processing module includes a voltage regulation and correction circuit Regulator, an oscillation circuit OSC, and a dynamic cancellation circuit DOC connected in series in sequence.

[0056] The settings of the signal processing module, Hall sensor Sensor, and digital signal processor DC can improve the signal processing ability of the chip, enhance the accuracy and controllability of the output, and ensure the precise processing and control of the sensor signal. Further, the series configuration of the voltage regulation and correction circuit Regulator, oscillation circuit OSC, and dynamic cancellation circuit DOC can optimize the signal quality, reduce noise and drift, and improve the performance of the overall system. Ensure the stability and clarity of the signal in high-speed data transmission.

[0057] The digital signal processor DC is used to perform complementary output control on the first output terminal OUT1 and the second output terminal OUT2, so that the first output terminal OUT1 and the second output terminal OUT2 have a complementary output structure with opposite high and low levels. The complementary output structure can provide opposite logic state outputs, enabling the internal interconnected switch chip 300 to achieve more flexible logic control.

[0058] For example, when the magnet 100 is far from the internal interconnected switch chip 300, the output signal of the first output terminal OUT1 is high level, and the output signal of the second output terminal OUT2 is low level;

[0059] When the magnet 100 is close to the internal interconnected switch chip 300, the output signal of the first output terminal OUT1 is low level, and the output signal of the second output terminal OUT2 is high level.

[0060] Optionally, an electrostatic discharge protection circuit (ESD) is provided between each of the power input terminal Vs, the first output terminal OUT1, and the second output terminal OUT2 and the ground terminal GND.

[0061] The provision of the electrostatic discharge protection circuit (ESD) can protect the chip from electrostatic damage, improving the reliability and lifespan of the chip. Especially in an environment vulnerable to electrostatic interference, this design can prevent the internal interconnected switch chip 300 from being damaged due to electrostatic discharge.

[0062] In this embodiment, the detection and switching circuit 3 includes a parameter acquisition circuit 301 and a power supply switching circuit 302.

[0063] The parameter acquisition circuit 301 is electrically connected to the output terminal groups of the two Hall circuits 2 for acquiring the output parameters of the two Hall circuits 2; the power supply switching circuit 302 is electrically connected to the power input terminals Vs of the two Hall circuits 2 respectively and to the parameter acquisition circuit 301, for receiving the output parameters and controlling the power supply on / off of the two power input terminals Vs.

[0064] Among them, the output parameters include current parameters and / or voltage parameters. Correspondingly, the parameter acquisition circuit 301 includes a current acquisition circuit and / or a voltage acquisition circuit.

[0065] The parameter acquisition circuit 301 is electrically connected to the first output terminal OUT1 and the second output terminal OUT2 of each Hall circuit 2, so as to synchronously detect the current values and / or voltage values of both the first output terminal OUT1 and the second output terminal OUT2. As long as an abnormality in current and / or voltage occurs in one of the two output terminals, it can be determined that the Hall circuit 2 where the output terminal is located is abnormal. At this time, the power supply to the power input terminal Vs of the abnormal Hall circuit 2 can be stopped, and instead, the power supply is switched to the power input terminal Vs of another standby Hall circuit 2.

[0066] In summary, the internal interconnected switch chip 300 and Hall switch provided in this embodiment have the following beneficial effects:

[0067] ① By providing two Hall circuits 2 and a detection and switching circuit 3 electrically connecting the two Hall circuits 2 within a single package 1, not only can the one-open-one-standby function be achieved, saving space and reducing costs, but also the signal output stability can be improved;

[0068] ② The detection and switching circuit 3 is electrically connected to the two Hall circuits 2 simultaneously and continuously detects the output parameters of the powered Hall circuit 2, ensuring the stability and reliability of the signal output and avoiding the impact on the operation of the overall system due to the failure of a single Hall circuit 2;

[0069] ③ The Hall circuit 2 includes two output terminals with a complementary output structure, which can provide flexible logic control to ensure the accuracy and controllability of the output signal;

[0070] ④ An electrostatic discharge protection circuit ESD is provided to protect the internal interconnection switch chip 300 from electrostatic damage and improve the reliability and lifespan of the internal interconnection switch chip 300.

[0071] Finally, it should be noted that although the above embodiments have been described in the text and drawings of the specification of this application, the patent protection scope of this application cannot be limited thereby. Any technical solutions obtained by equivalent structure or equivalent process substitution or modification based on the substantial concept of this application and using the content recorded in the text and drawings of the specification of this application, as well as directly or indirectly implementing the technical solutions of the above embodiments in other related technical fields, etc., are all included in the patent protection scope of this application.

Claims

1. An internal interconnection switch chip, characterized in that: Comprising two Hall circuits (2), a detection switching circuit (3) electrically connected to the two Hall circuits (2), and a packaging body (1) encapsulating the two Hall circuits (2) and the detection switching circuit (3); The detection switching circuit (3) is used to detect the output parameters of the two Hall circuits (2). When the output parameter of one of the Hall circuits (2) exceeds a limit, the power supply of the Hall circuit (2) that exceeds the limit is interrupted, and the power supply is switched to the other Hall circuit (2).

2. The internal interconnection switch chip according to claim 1, characterized in that: The Hall circuit (2) comprises a power input terminal (Vs), a ground terminal (GND), and an output terminal group.

3. The internal interconnection switch chip according to claim 2, characterized in that: The detection switching circuit (3) comprises: A parameter acquisition circuit (301), the parameter acquisition circuit (301) being electrically connected to the output terminal group of the two Hall circuits (2) and being used for acquiring output parameters of the two Hall circuits (2); A power supply switching circuit (302), the power supply switching circuit (302) is electrically connected to the power supply input terminals (Vs) of the two Hall circuits (2) and to the parameter acquisition circuit (301), and is used to receive the output parameters and control the on and off of the power supply of the two power supply input terminals (Vs).

4. The internal interconnection switch chip according to claim 3, characterized in that: The output terminal group comprises a first output terminal (OUT1) and a second output terminal (OUT2); wherein the first output terminal (OUT1) and the second output terminal (OUT2) are complementary output structures with opposite high and low levels; The parameter acquisition circuit (301) is electrically connected to the first output terminal (OUT1) and the second output terminal (OUT2) of each of the Hall circuits (2).

5. The internal interconnection switch chip according to claim 4, characterized in that: A signal processing module, a Hall sensor (Sensor), and a digital signal processor (DC) are provided between the power input terminal (Vs) and the output terminal group.

6. The internal interconnection switch chip according to claim 5, characterized in that: The signal processing module includes a voltage regulator correction circuit (Regulator), an oscillation circuit (OSC), and a dynamic cancellation circuit (DOC).

7. The internal interconnection switch chip according to claim 4, characterized in that: An electrostatic discharge protection circuit (ESD) is provided between the power input terminal (Vs), the first output terminal (OUT1), the second output terminal (OUT2) and the ground terminal (GND).

8. The internal interconnection switch chip according to claim 3, characterized in that: The output parameters include current parameters and / or voltage parameters; The parameter acquisition circuit (301) comprises a current acquisition circuit and / or a voltage acquisition circuit.

9. A Hall switch, characterized in that: It comprises a magnet (100) for generating a magnetic field, a pressing structure (200) for driving the magnet (100) to move up and down, and a switch chip according to any one of claims 1 to 8, located below the magnet (100) and used for detecting changes in the magnetic field.

10. The Hall switch according to claim 9, characterized in that: The pressing structure (200) comprises a pressing rod (200a) arranged to slide up and down, and a compression spring (200b) driving the pressing rod (200a) to slide upward.

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