Universal testing device for digital-analog mixed signal semiconductor device
By designing a general-purpose test device with multiple modules, users can customize allocating signals to any pin, solving the problem that existing test devices need to be replaced and achieving efficient and low-cost digital-to-analog mixed signal device testing.
Patent Information
- Application Number
- CN202421880696.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-05
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-08-05
AI Technical Summary
The existing digital-to-analog conversion chips and analog-to-digital conversion chip testing devices require replacement of devices when testing different chips, resulting in high time consumption and design and production costs.
Design a general testing device for digital-to-analog mixed signal semiconductor devices, including PCB circuit board, test socket, dial switch, analog signal module, signal processing module, signal relay, switching power supply module and filter circuit module. Users can customly allocate VCC, GND, VREF, analog signal module, and digital signals to any pin to realize general testing.
The general testing of digital-to-analog mixed signal devices is realized, which reduces the design and production cost of the test device, improves the testing efficiency, and reduces the cost of each device under test to produce the test device.
Smart Images
Figure CN223022318U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductor device testing, and particularly to a general testing device for digital-analog hybrid signal semiconductor devices. Background Art
[0002] All semiconductor devices need to be subjected to electrical performance testing before leaving the factory or before being installed and used to ensure that the functions and performances of the devices meet the requirements and improve the reliability of subsequent installation and use. Digital-to-analog conversion chips and analog-to-digital conversion chips involve the input and output of analog signal modules and digital signals simultaneously in the same chip, and the analog signal modules and digital signals of different chips are input and output by different device pins.
[0003] Therefore, if different digital-to-analog conversion chips and analog-to-digital conversion chips need to be tested, a testing device needs to be designed and manufactured according to the pin definitions of the chips each time, and the testing device also needs to be replaced during each electrical performance test, which is very time-consuming and costly in terms of the manufacturing cost of the testing device.
[0004] The inventor found the following problems in the prior art during the implementation of the present utility model: 1. When the existing testing device tests different chips, the testing device needs to be replaced each time, which is very time-consuming; 2. When designing a dedicated testing device, the testing device needs to be designed and manufactured according to the pin definition of the chip each time, and the design and manufacturing cost of the testing device is also relatively high when testing different chips. Summary of the Utility Model
[0005] The purpose of the present utility model is to provide a general testing device for digital-analog hybrid signal semiconductor devices to solve the problems of relatively high design and manufacturing cost of the testing device and being very time-consuming as mentioned in the above background art. To achieve the above purpose, the present utility model provides the following technical solution: A general testing device for digital-analog hybrid signal semiconductor devices, including a PCB circuit board, a testing socket, a DIP switch, an analog signal module, a signal processing module circuit, a signal relay, a switching power supply module, and a filter circuit module are respectively arranged at the front end of the PCB circuit board, and an anti-static rubber ring is installed on the outer wall of the PCB circuit board.
[0006] Further preferably, a plurality of screw holes are opened at the front end of the PCB circuit board.
[0007] Further preferably, the testing socket adopts a press-fit DIP40 socket.
[0008] Further preferably, there are three groups of DIP switches in total, one end of which is connected to the pins of the device under test, and the other end is connected to three resources of VCC, GND, and VREF.
[0009] Further preferably, the analog signal module is the excitation signal and output signal of a digital-analog hybrid signal semiconductor device.
[0010] Further preferably, the signal processing module adopts a signal processing module circuit composed of a low-noise amplifier.
[0011] Further preferably, each path on the PCB circuit board is provided with a signal relay.
[0012] Further preferably, the switching power supply module adopts a low-noise power supply.
[0013] Compared with the prior art, the beneficial effects of the present utility model are as follows:
[0014] In the present utility model, the user can freely assign VCC, GND, VREF, the analog signal module, and the digital signal in the ATE test equipment to any pin of the digital-analog hybrid signal device, and freely combine them, so as to realize the general test of the digital-analog hybrid signal device, without being limited to the situation that VCC, GND or other pins are located at different PINs, which requires redesigning the test device. This greatly improves the universality, improves the test efficiency, and can reduce the cost of manufacturing a test device for each device under test.
[0015] In the present utility model, several screw holes on the PCB circuit board improve the applicability of the PCB circuit board installation. At the same time, the anti-static rubber ring on the outer wall of the PCB circuit board can protect the PCB circuit board and avoid damage to the PCB circuit board caused by bumps. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is the PCB design diagram of the present utility model;
[0017] Figure 2 It is the design block diagram of the present utility model;
[0018] Figure 3 It is the usage structure diagram of the present utility model;
[0019] In the figure: 1. PCB circuit board; 2. Test socket; 3. DIP switch; 4. Analog signal module; 5. Signal processing module; 6. Signal relay; 7. Switching power supply module; 8. Filter circuit module; 9. Anti-static rubber ring. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0020] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0021] Please refer to Figures 1 to 3 , the present invention provides a technical solution: a general test device for a digital-analog mixed-signal semiconductor device, including a PCB circuit board 1. At the front end of the PCB circuit board 1, there are respectively a test socket 2, a DIP switch 3, an analog signal module 4, a signal processing module circuit 5, a signal relay 6, a switching power supply module 7, and a filter circuit module 8. An anti-static rubber ring 9 is installed on the outer wall of the PCB circuit board 1.
[0022] In this embodiment, as Figure 1 shown, a plurality of screw holes are provided at the front end of the PCB circuit board 1; through the plurality of screw holes on the PCB circuit board 1, it is convenient to install the PCB circuit board 1 with the test device.
[0023] In this embodiment, as Figure 1 shown, the test socket 2 adopts a press-fit DIP40 socket; the device under test is placed in the socket. When the package of the device under test is not a DIP package, a socket suitable for the package of the device under test is used to be transferred to a DIP package, and then placed in the DIP40 test socket. The adopted press-fit DIP40 socket can be taken and placed at any time during testing without soldering, ensuring the applicability of different devices.
[0024] In this embodiment, as Figure 1 shown, the DIP switch 3 is provided with a total of three groups, and one end is connected to the pin of the device under test, and the other end is connected to three resources: VCC, GND, and VREF; with three groups of DIP switches 3, when the device under test needs to apply VCC to PIN1, the corresponding DIP switch 3 is closed. When it is necessary to apply GND to PIN2, the corresponding DIP switch 3 is closed. The rest that do not require VCC, GND, and VREF resources are kept open. Each pin of the DIP switch 3 can be switched and closed, ensuring that each pin of the device under test can be customized as VCC, GND, and VREF inputs, ensuring versatility.
[0025] In this embodiment, as Figure 1As shown, the analog signal module 4 is the excitation signal and output signal of the digital-analog mixed signal semiconductor device; the analog signal module 4 is connected to the universal test device from the test motherboard of the ATE test equipment through the SMA connector, and the universal test device then uses a low-impedance analog signal module multiplexer to divide the analog signal module 4 into multiple channels to be distributed to each signal processing module circuit of the next level.
[0026] In this embodiment, Figure 1 As shown, the signal processing module 5 adopts a signal processing module circuit based on a low-noise amplifier; the signal processing module circuit processes the analog signal module output by the analog signal module multiplexer to reduce the noise interference received by the analog signal module in the circuit and improve the signal quality. After the analog signal module processing modules of each channel are completed, they are input into the signal relays 6 of each channel.
[0027] In this embodiment, Figure 1 As shown, each circuit on the PCB circuit board 1 is provided with a signal relay 6; the signal relay 6 is used to select whether the digital signal or the analog signal module 4 is input to the device under test. Each circuit has a signal relay 6, so that each pin of the device under test can be customized as an analog signal module 4 pin or a digital signal pin, ensuring universality.
[0028] In this embodiment, Figure 1 As shown, the switching power supply module 7 adopts a low-noise power supply; the low-noise power supply provides power for the components of the analog signal module multiplexer, low-noise amplifier, and signal relay 6 in the universal test device, thereby minimizing the noise brought to the circuit by the power supply.
[0029] The use method and advantages of the utility model: When the universal test device for digital-analog mixed signal semiconductor devices is used, the working process is as follows:
[0030] like Figure 1 , Figure 2 and Figure 3 As shown, firstly, the universal test device is connected to the test motherboard of the ATE test equipment, and the test resources of the ATE test equipment are transferred to the universal test device. Then the device under test is placed in the universal test device, and the VCC, GND, VREF, digital signal, and analog signal modules required by the device under test need to be combined on the pins of the chip under test according to the actual situation of the device under test.
[0031] The foregoing has shown and described the basic principles, main features and advantages of the present utility model. Those skilled in the art should understand that the present utility model is not limited by the above embodiments. The above embodiments and the descriptions in the specification are only preferred examples of the present utility model and are not used to limit the present utility model. Without departing from the spirit and scope of the present utility model, the present utility model will have various changes and improvements, and these changes and improvements all fall within the scope of the present utility model claimed. The scope of protection claimed by the present utility model is defined by the appended claims and their equivalents.
Claims
1. A universal testing device for digital-analog mixed-signal semiconductor devices, comprising a PCB circuit board (1), characterized in that: A test socket (2), a dial switch (3), an analog signal module (4), a signal processing module (5), a signal relay (6), a switch power module (7) and a filter circuit module (8) are respectively arranged at the front end of the PCB circuit board (1), and an antistatic rubber ring (9) is installed on the outer wall of the PCB circuit board (1).
2. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: A plurality of screw holes are provided at the front end of the PCB circuit board (1).
3. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: The test socket (2) adopts a compression-type DIP40 socket.
4. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: The dip switches (3) are provided with three groups in total, one end of which is connected to the pin of the device under test, and the other end of which is connected to three resources: VCC, GND and VREF.
5. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: The analog signal module (4) is an excitation signal and an output signal of a digital-analog mixed signal semiconductor device.
6. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: The signal processing module (5) adopts a signal processing module circuit based on a low noise amplifier.
7. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: Each circuit on the PCB circuit board (1) is provided with a signal relay (6).
8. The universal testing device for digital-analog mixed-signal semiconductor devices according to claim 1, characterized in that: The switching power supply module (7) adopts a low-noise power supply.