Rotary transformer ratio configuration circuit based on upper computer

Abstract

The utility model discloses a rotary transformer ratio configuration circuit based on an upper computer, which comprises a COS matching circuit and an SIN matching circuit, the COS matching circuit comprises a common mode inductor L13, a digital potentiometer U24A, a digital potentiometer U24B and a comparator U28C, the second potential end of the digital potentiometer U24A is connected with the output end of the comparator U28C and then serves as the output end of the COS matching circuit, and the second potential end of the digital potentiometer U24B serves as the output end of the SIN matching circuit. The intermediate potential end of the digital potentiometer U24A is connected to the anti-phase end of the comparator U28C, and the intermediate potential end of the digital potentiometer U24B is connected to the in-phase end of the comparator U28C; the SIN matching circuit comprises a common mode inductor L14, a digital potentiometer U30A, a digital potentiometer U30B and a comparator U31C, the second potential end of the digital potentiometer U30A is connected with the output end of the comparator U31C and then serves as the output end of the SIN matching circuit, the middle potential end of the digital potentiometer U30A is connected to the anti-phase end of the comparator U31C, and the middle potential end of the digital potentiometer U30B is connected to the in-phase end of the comparator U31C. Parameters of a resolver matching device are easy to adjust, and a hardware circuit does not need to be changed.

Description

Technical Field

[0001] The utility model relates to a resolver, in particular to a resolver ratio configuration circuit based on a host computer. Background Art

[0002] At present, there are many types of resolvers on the market, and the ratios are also different, usually in the range of 0.2 to 0.5. In the prior art, when a motor controller matches different resolvers, it is necessary to manually change the component parameters on the PCB board to achieve this, which is prone to situations such as missed changes and incorrect changes, resulting in mismatches in on-site applications. Finally, it is necessary to return to the factory to modify the parameters, and flexible application cannot be achieved. Summary of the Utility Model

[0003] The technical problem to be solved by the utility model is to provide a resolver ratio configuration circuit that is easy to adjust the parameters of resolver matching devices and does not require changing the hardware circuit of the PCB board in view of the deficiencies of the prior art.

[0004] To solve the above technical problems, the utility model adopts the following technical solutions.

[0005] A resolver ratio configuration circuit based on a host computer, which includes a COS matching circuit and a SIN matching circuit, wherein: the COS matching circuit includes a common-mode inductor L13, a digital potentiometer U24A, a digital potentiometer U24B, and a comparator U28C. The first input terminal and the second input terminal of the common-mode inductor L13 are respectively used to access the COS-IN signal and the COS+IN signal. The signal at the first output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24A. The second potential terminal of the digital potentiometer U24A is connected to the output terminal of the comparator U28C and serves as the output terminal of the COS matching circuit. The middle potential terminal of the digital potentiometer U24A is connected to the inverting terminal of the comparator U28C. The signal at the second output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24B. The second potential terminal of the digital potentiometer U24B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U24B is connected to the non-inverting terminal of the comparator U28C. The SIN matching circuit includes a common-mode inductor L14, a digital potentiometer U30A, a digital potentiometer U30B, and a comparator U31C. The first input terminal and the second input terminal of the common-mode inductor L14 are respectively used to access the SIN-IN signal and the SIN+IN signal. The signal at the first output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30A. The second potential terminal of the digital potentiometer U30A is connected to the output terminal of the comparator U31C and serves as the output terminal of the SIN matching circuit. The middle potential terminal of the digital potentiometer U30A is connected to the inverting terminal of the comparator U31C. The signal at the second output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30B. The second potential terminal of the digital potentiometer U30B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U30B is connected to the non-inverting terminal of the comparator U31C.

[0006] Preferably, a resistor R162 and a resistor R174 connected in series in sequence are connected between the first output terminal and the second output terminal of the common-mode inductor L13. The connection point of the resistor R162 and the resistor R174 is connected to the 1.65V voltage terminal.

[0007] Preferably, a resistor R189 and a resistor R194 connected in series in sequence are connected between the first output terminal and the second output terminal of the common-mode inductor L14. The connection point of the resistor R189 and the resistor R194 is connected to the 1.65V voltage terminal.

[0008] Preferably, a capacitor C189 and a capacitor C202 are connected in series between the first potential terminal of the digital potentiometer U24A and the first potential terminal of the digital potentiometer U24B, and the connection point of the capacitor C189 and the capacitor C202 is grounded.

[0009] Preferably, a capacitor C206 and a capacitor C210 are connected in series between the first potential terminal of the digital potentiometer U30A and the first potential terminal of the digital potentiometer U30B, and the connection point of the capacitor C206 and the capacitor C210 is grounded.

[0010] In the resolver ratio configuration circuit based on the host computer disclosed by the present utility model, a COS matching circuit and a SIN matching circuit are used to process the COS signal and the SIN signal respectively. In practical applications, the resistance values of the digital potentiometer U24A, the digital potentiometer U24B, the digital potentiometer U30A, and the digital potentiometer U30B are adjusted online through instructions, so as to adjust the amplitudes of the SIN and COS feedback signals to the receiving end. During the entire adjustment process, there is no need to change any hardware circuits, nor to change the PCB components, thereby achieving the purpose of easily matching the resolver and better meeting the application requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a schematic diagram of the resolver ratio configuration circuit based on the host computer of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0012] The present utility model will be described in more detail below with reference to the drawings and embodiments.

[0013] The present utility model discloses a resolver ratio configuration circuit based on a host computer. Please refer to Figure 1 , which includes a COS matching circuit and a SIN matching circuit, wherein:

[0014] The COS matching circuit includes a common-mode inductor L13, a digital potentiometer U24A, a digital potentiometer U24B, and a comparator U28C. The first input terminal and the second input terminal of the common-mode inductor L13 are respectively used for accessing the COS-IN signal and the COS+IN signal. The signal at the first output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24A. The second potential terminal of the digital potentiometer U24A is connected to the output terminal of the comparator U28C and serves as the output terminal of the COS matching circuit. The middle potential terminal of the digital potentiometer U24A is connected to the inverting terminal of the comparator U28C. The signal at the second output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24B. The second potential terminal of the digital potentiometer U24B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U24B is connected to the non-inverting terminal of the comparator U28C;

[0015] The SIN matching circuit includes a common-mode inductor L14, a digital potentiometer U30A, a digital potentiometer U30B, and a comparator U31C. The first input terminal and the second input terminal of the common-mode inductor L14 are respectively used for accessing the SIN-IN signal and the SIN+IN signal. The signal at the first output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30A. The second potential terminal of the digital potentiometer U30A is connected to the output terminal of the comparator U31C and serves as the output terminal of the SIN matching circuit. The middle potential terminal of the digital potentiometer U30A is connected to the inverting terminal of the comparator U31C. The signal at the second output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30B. The second potential terminal of the digital potentiometer U30B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U30B is connected to the non-inverting terminal of the comparator U31C.

[0016] In the above circuit, the COS matching circuit and the SIN matching circuit are respectively used to process the COS signal and the SIN signal. In practical applications, the resistance values of the digital potentiometers U24A, U24B, U30A, and U30B are adjusted online through instructions, so as to adjust the amplitudes of the SIN and COS feedback signals to the receiving end. During the entire adjustment process, there is no need to change any hardware circuits, nor to change the PCB components, thereby achieving the purpose of easily matching the resolver and better meeting the application requirements.

[0017] As a preferred embodiment, a resistor R162 and a resistor R174 are connected in series between the first output terminal and the second output terminal of the common-mode inductor L13, and the connection point of the resistor R162 and the resistor R174 is connected to the 1.65V voltage terminal. Further, a resistor R189 and a resistor R194 are connected in series between the first output terminal and the second output terminal of the common-mode inductor L14, and the connection point of the resistor R189 and the resistor R194 is connected to the 1.65V voltage terminal.

[0018] In practical applications of this embodiment, the excitation signal output by the controller is 7V RMS, that is, a sine wave with an amplitude of 10V, which is also the requirement for the input excitation signal of the resolver; at the same time, the turns ratio of the resolver is usually 0.2 - 0.5, so the SIN and COS feedback signals are 7*(0.2 - 0.5) = 1.4 - 3.5V RMS (sine wave with an amplitude of 2 - 5V). The receiving range of the SIN and COS feedback signals of the soft decoding dsp and the hard decoding chip is limited, so it is necessary to modulate the SIN and COS feedback signals of 1.4 - 3.5V RMS to a reasonable range.

[0019] On this basis, a capacitor C189 and a capacitor C202 are connected in series between the first potential terminal of the digital potentiometer U24A and the first potential terminal of the digital potentiometer U24B, and the connection point of the capacitor C189 and the capacitor C202 is grounded.

[0020] Correspondingly, a capacitor C206 and a capacitor C210 are connected in series between the first potential terminal of the digital potentiometer U30A and the first potential terminal of the digital potentiometer U30B, and the connection point of the capacitor C206 and the capacitor C210 is grounded.

[0021] Regarding the preferred signals of each device in this embodiment, please refer to Figure 1 , the common-mode inductor L13 and the common-mode inductor L14 are preferably 744227S type common-mode inductors. The comparator U28C and the comparator U31 are preferably CTLV4314 type comparators.

[0022] The above is only a preferred embodiment of the present invention and does not limit the present invention. Any modifications, equivalent replacements, or improvements made within the technical scope of the present invention shall be included within the scope protected by the present invention.

Claims

1. A resolver ratio configuration circuit based on a host computer, characterized in that: It includes COS matching circuit and SIN matching circuit, where: The COS matching circuit includes a common-mode inductor L13, a digital potentiometer U24A, a digital potentiometer U24B and a comparator U28C. The first input terminal and the second input terminal of the common-mode inductor L13 are respectively used to access the COS-IN signal and the COS+IN signal. The signal of the first output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24A. The second potential terminal of the digital potentiometer U24A is connected to the output terminal of the comparator U28C and serves as the output terminal of the COS matching circuit. The middle potential terminal of the digital potentiometer U24A is connected to the inverting terminal of the comparator U28C. The signal of the second output terminal of the common-mode inductor L13 is transmitted to the first potential terminal of the digital potentiometer U24B. The second potential terminal of the digital potentiometer U24B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U24B is connected to the non-inverting terminal of the comparator U28C. The SIN matching circuit includes a common-mode inductor L14, a digital potentiometer U30A, a digital potentiometer U30B and a comparator U31C. The first input terminal and the second input terminal of the common-mode inductor L14 are respectively used to access the SIN-IN signal and the SIN+IN signal. The signal of the first output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30A. The second potential terminal of the digital potentiometer U30A is connected to the output terminal of the comparator U31C and serves as the output terminal of the SIN matching circuit. The middle potential terminal of the digital potentiometer U30A is connected to the inverting terminal of the comparator U31C. The signal of the second output terminal of the common-mode inductor L14 is transmitted to the first potential terminal of the digital potentiometer U30B. The second potential terminal of the digital potentiometer U30B is used to connect to the 1.65V voltage terminal. The middle potential terminal of the digital potentiometer U30B is connected to the non-inverting terminal of the comparator U31C.

2. The resolver ratio configuration circuit based on the host computer according to claim 1, characterized in that: A resistor R162 and a resistor R174 connected in series are connected between the first output terminal and the second output terminal of the common mode inductor L13 , and a connection point between the resistor R162 and the resistor R174 is connected to the 1.65V voltage terminal.

3. The resolver ratio configuration circuit based on the host computer according to claim 1, characterized in that: A resistor R189 and a resistor R194 connected in series are connected between the first output terminal and the second output terminal of the common mode inductor L14, and a connection point between the resistor R189 and the resistor R194 is connected to the 1.65V voltage terminal.

4. The resolver ratio configuration circuit based on the host computer according to claim 1, characterized in that: A capacitor C189 and a capacitor C202 connected in series are connected between the first potential end of the digital potentiometer U24A and the first potential end of the digital potentiometer U24B, and a connection point between the capacitor C189 and the capacitor C202 is grounded.

5. The resolver ratio configuration circuit based on the host computer according to claim 1, characterized in that: A capacitor C206 and a capacitor C210 connected in series are connected between the first potential end of the digital potentiometer U30A and the first potential end of the digital potentiometer U30B, and a connection point between the capacitor C206 and the capacitor C210 is grounded.

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