Single-pole multi-throw switch circuit with positive voltage controlling negative voltage power supply

Abstract

The utility model relates to a single-pole multi-throw switch circuit with positive voltage controlling negative voltage power supply. The single-pole multi-throw switch circuit comprises N switch branches and N logic conversion circuits, the switch branch circuit is composed of an impedance matching module, a grounding isolation module and a main circuit conduction module. Wherein the main circuit conduction module is connected in series on a main circuit through a switch field-effect tube, the grounding isolation module is grounded and connected in parallel on the main circuit through the switch field-effect tube, and the main circuit conduction module is connected in series on the main circuit after the switch field-effect tube is connected in parallel with an impedance matching resistor; the logic conversion circuit is a TTL inverter which is controlled by positive voltage and powered by negative voltage. The logic conversion circuit outputs a first control signal and a second control signal which have opposite levels. According to the utility model, the usability and the assembly convenience of the product are improved.

Description

Technical Field

[0001] The utility model relates to the field of radio frequency integrated circuits, and particularly to a single-pole multi-throw switch circuit with positive voltage control and negative voltage power supply. Background Art

[0002] In the modern communication field, the requirements for radio frequency devices such as wide frequency band, multi-channel, miniaturization, fast response speed, low loss, and high isolation degree are increasing day by day. Most of the current radio frequency switches on the market are still mostly single-pole single-throw or single-pole double-throw. Under the current trend of multi-channelization of communication systems, they cannot meet the usage requirements of radio frequency switches in more complex transceiver systems.

[0003] A single-pole multi-throw switch can connect multiple modules, thereby integrally realizing a multi-channel, high-control-degree, and multi-functional microwave transceiver system. There are various implementation forms of single-pole multi-throw switches. In terms of control level, most of those on the current market adopt two types: pure negative voltage control and positive voltage control with positive voltage power supply.

[0004] For a radio frequency switch with pure negative voltage control, two reference levels need to be switched to form the switch control of a path. The advantage of this radio frequency switch is that the design structure is simple and the area can be slightly reduced, thereby reducing the manufacturing cost. However, the disadvantages of this control method are more obvious. It requires an additional externally connected and more complex control level input circuit, and it is more complex when connected to the entire transceiver system, with high usage cost and low usability. Therefore, it is being gradually phased out by the market.

[0005] For a radio frequency switch with positive voltage control and positive voltage power supply, the usability is relatively high. However, when designing and packaging, the distinction between AC ground and DC ground needs to be considered. And if a series capacitor is used to achieve it, the compatibility with low frequencies will become poor, and the area will increase accordingly, increasing the manufacturing cost. Summary of the Utility Model

[0006] In order to solve the above problems, the utility model provides a single-pole multi-throw switch circuit with positive voltage control and negative voltage power supply.

[0007] The utility model adopts the following technical solutions:

[0008] A single-pole multi-throw switch circuit with positive voltage control and negative voltage power supply includes N switch branches and N logic conversion circuits, and each switch branch is connected to a logic conversion circuit;

[0009] The switching branch is composed of an impedance matching module, a ground isolation module, and a main path conduction module; in the main path conduction module, the gate of the first switching field-effect transistor is connected to the first control signal, and one of the source and drain of the first switching field-effect transistor is connected to the RF input terminal, and the other is used as the output terminal of the main path conduction module; in the ground isolation module, the sources and drains of multiple second switching field-effect transistors are connected in parallel, one end is grounded, and the other end is connected to the output terminal of the main path conduction module, and the gates of all the second switching field-effect transistors are connected to the second control signal; in the impedance matching module, the third switching field-effect transistor is connected in series with the impedance matching resistor, one end is connected to the output terminal of the main path conduction module, and the other end is connected to the RF output terminal, and the gate of the third switching field-effect transistor is connected to the first control signal;

[0010] The logic conversion circuit uses a TTL inverter logic conversion circuit controlled by a positive voltage and powered by a negative voltage to output the first control signal and the second control signal with opposite levels.

[0011] Further, N is 6.

[0012] Further, the resistance value of the impedance matching resistor is 50 Ω.

[0013] Further, the TTL inverter logic conversion circuit consists of two enhancement-mode field-effect transistors T1, T3, three depletion-mode field-effect transistors T2, T4, T5, and a series diode group. Among them, the drain of T1 is connected to the source of T2, the drain of T3 is connected to the source of T4, and the source and gate of T5, the drain and gate of T2, and the drain and gate of T4 are all connected to the negative voltage supply voltage Vee. The source of T1 is connected to the gate of T3. The gate of T1 is connected to the drain of T5 and then connected to the negative pole of the series diode group. The positive pole of the series diode group is connected to the positive voltage control level Vcon. The gate of T1 is used as the first control signal, the source of T1 is used as the second control signal, and the source of T3 is grounded.

[0014] Further, when performing the Layout layout design, the P25ED3S process is adopted.

[0015] Further, the ground isolation module includes 3 second switching field-effect transistors.

[0016] The present invention adopts the above technical solution and is designed with a structure controlled by a positive voltage and powered by a negative voltage, which improves the usability of the product and the simplicity of assembly. At the same time, an absorption (matching) impedance design is used, so that when the switch is turned off, a 50 Ω impedance can still be matched to reduce the return loss and can also adapt to more diverse usage scenarios. Description of the Drawings

[0017] Figure 1 The circuit topology structure diagram of the switching branch in the embodiment of the present invention is shown.

[0018] Figure 2 The circuit topology structure diagram of the logic conversion circuit in the embodiment of the present utility model is shown as follows.

[0019] Figure 3 The relationship diagram between the output level and the input positive voltage control level Vcon in the embodiment of the present utility model is shown as follows.

[0020] Figure 4 The Layout layout of the overall circuit in the embodiment of the present utility model is shown as follows.

[0021] Figure 5 The schematic diagram of the simulation result in the embodiment of the present utility model is shown as follows. Specific embodiments

[0022] To further illustrate each embodiment, the present utility model provides accompanying drawings. These accompanying drawings are part of the disclosure of the present utility model, mainly used to illustrate the embodiments, and can be combined with the relevant descriptions in the specification to explain the operation principle of the embodiments. With reference to these contents, those of ordinary skill in the art should be able to understand other possible implementation manners and the advantages of the present utility model. The components in the figures are not drawn to scale, and similar component symbols are usually used to represent similar components.

[0023] The present utility model will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0024] This embodiment discloses a single-pole multi-throw switch circuit with positive voltage control and negative voltage power supply, which is applied to an absorptive single-pole six-throw switch with a working frequency band of DC~10GHz, insertion loss less than 1.7dB, isolation greater than 40dB, and return loss less than -18dB. The system consists of 6 switch branches with the same structure and 6 logic conversion circuits with the same structure to form 6 independently controlled branches. Each switch branch provides a first control signal and a second control signal with opposite levels through a corresponding logic conversion circuit. In other embodiments, the number of switch branches and logic conversion circuits can be changed according to the usage requirements, which are not limited herein.

[0025] Since gallium arsenide material has the characteristic of high electron mobility, in the gallium arsenide MMIC (monolithic microwave integrated circuit) process, the switch transistors and logic control transistors used are essentially high electron mobility transistors (High electronmobility transistor, HEMT), also known as modulation-doped FET (modulation-doped FET, MODFET), which belong to a type of field effect transistor and are applicable to the analysis method (gate-source-drain model) and circuit identification of field effect transistors. In this embodiment, they are all simply referred to as field effect transistors.

[0026] AsFigure 1 As shown in the figure, in this embodiment, the switch branch is composed of an impedance matching module, a ground isolation module, and a main path conduction module. In the main path conduction module, the gate of the first switching field effect transistor is connected to the first control signal Va, and one of the source and drain of the first switching field effect transistor is connected to the RF input terminal in, and the other is used as the output terminal of the main path conduction module. In the ground isolation module, the sources and drains of multiple second switching field effect transistors are connected in parallel, one end is grounded, and the other end is connected to the output terminal of the main path conduction module. The gates of all the second switching field effect transistors are connected to the second control signal Vb. When the sources and drains of multiple second switching field effect transistors are connected in parallel, the sources of the multiple second switching field effect transistors are connected to each other, and the drains are connected to each other. In the impedance matching module, the third switching field effect transistor is connected in series with the impedance matching resistor, one end is connected to the output terminal of the main path conduction module, and the other end is connected to the RF output terminal out. The gate of the third switching field effect transistor is connected to the first control signal Va.

[0027] The first switching field effect transistor, the second switching field effect transistor, and the third switching field effect transistor are all field effect transistors used for switching functions. Therefore, there is no DC bias voltage between their drains and sources, but a conduction path for high-frequency AC signals. The working state of the field effect transistor is affected only by the change of the gate bias voltage. A high level (0V) is the conduction state, and a low level (-5V) is the off state.

[0028] In this embodiment, the impedance matching resistor is selected as a 50Ω resistor, which is used to achieve impedance matching with the system and reduce transmission loss, complete the design of an absorptive (matching type) RF switch, so that the switch can still transmit with a 50Ω impedance in the off state, greatly reducing the return loss. It solves the problem that the existing reflective RF switch cannot match the 50Ω impedance when it is off, resulting in a very large return loss in the off path and being unable to be compatible with diverse usage scenarios.

[0029] In this embodiment, 3 second switching field effect transistors are preferably set in the ground isolation module, which has a good isolation effect. In other embodiments, different numbers can also be set according to requirements, which are not limited here.

[0030] In this embodiment, a load resistor R is provided on the branch where the gate of the first switching field effect transistor and the third switching field effect transistor are connected to the first control signal Va and the gate of the second switching field effect transistor is connected to the second control signal Vb.

[0031] Since the required control level states of the switching field effect transistors in the main path conduction module and the ground isolation module on each switch branch are opposite, it is necessary to connect control levels with opposite control states respectively. Also, because this embodiment will adopt a control method of positive voltage control and negative voltage power supply, a TTL inverter logic conversion circuit needs to be added at the control end. The specific circuit topology is as Figure 2As shown in the figure. In this embodiment, the specific structure of the logic conversion circuit is composed of two enhancement-mode field-effect transistors T1 and T3, three depletion-mode field-effect transistors T2, T4, and T5, and a series diode group. Among them, T1, T2 and T3, T4 are each a group of inverter units, which are composed of enhancement-mode field-effect transistors and depletion-mode field-effect transistors. The drain of T1 is connected to the source of T2, and the drain of T3 is connected to the source of T4. The source and gate of T5, the drain and gate of T2, and the drain and gate of T4 are all connected to the negative voltage supply voltage Vee (-5V). The source of T1 is connected to the gate of T3. After the gate of T1 is connected to the drain of T5, it is connected to the negative pole of the series diode group. The positive pole of the series diode group is connected to the positive voltage control level Vcon (0V / +5V). The gate of T1 is used as the first control signal, the source of T1 is used as the second control signal, and the source of T3 is grounded. In this embodiment, the series diode is composed of four diodes connected in series, and the positive and negative poles of adjacent two diodes are connected to each other.

[0032] The logic conversion circuit adopted in this embodiment Figure 2 As shown in the figure, the working principle is as follows: When Vcon inputs a high level of 5V, the gate potential of T5 causes the drain of T5, and the sources of T1 and T3 to conduct. Once T1 and T3 conduct, the gate potential of T5 is clamped at 3.18V. The saturation conduction of T3 makes the gate potentials of T2 and T4 1.14V, so that T2 and T4 are cut off, T1 and T3 are saturated and conduct, and Vb outputs a low level. When Vcon inputs a low level of 0V, the source of T5 conducts. After conduction, the gate potential of T5 is clamped at 1.67V. Therefore, the source of T3 will not conduct. The cut-off of T3 makes the gate potentials of T2 and T4 5V. The gate potential of T1 is about 0V. T2 and T4 conduct, T1 and T3 are cut off, and Vb outputs a high level. Also, because the level states of the gate and source of T1 are in a logical NOT relationship, the level relationship between the outputs Va and Vb of the gate and source of T1 is also in a logical NOT relationship. When Va outputs a high level of 0V, Vb outputs a low level of -5V; conversely, when Va outputs a low level of -5V, Vb inputs a high level of 0V. The relationship between the output level and the input positive voltage control level Vcon is as Figure 3 shown in the figure.

[0033] In this embodiment, when performing the Layout layout design, the layout between different branches should meet the isolation degree to prevent coupling and keep the electrical performance of each branch consistent. In addition, since small enhancement-mode and depletion-mode field-effect transistors LEF and LDF are required for the inverters in the logic conversion circuit, the P25ED3S process is adopted for the Layout layout design in this embodiment. After debugging the appropriate sizes of the field-effect transistors and the dimensions of the connection lines using the circuit topology diagram, they are replaced with the Layout layout and co-simulated. The final design diagram is as Figure 4 shown in the figure.

[0034] After the design is completed, co-simulation is carried out on the Layout layout, and the simulation results are as follows Figure 5 shown. From Figure 5 it can be seen that the insertion loss from DC to 10 GHz is less than 1.7 Db, the isolation of each path is greater than 40 Db, and the return loss is less than 16 Db. The electrical parameter characteristics are better in this frequency band. While effectively performing off isolation, good insertion loss and return loss are maintained.

[0035] Although the present invention has been specifically shown and described in conjunction with the preferred embodiments, those skilled in the art should understand that various changes can be made to the present invention in terms of form and details without departing from the spirit and scope of the present invention defined by the appended claims, and all of them are within the protection scope of the present invention.

Claims

1. A single-pole multi-throw switch circuit for positive voltage control of negative voltage power supply, characterized in that: It includes N switch branches and N logic conversion circuits, and each switch branch is connected to a logic conversion circuit; The switch branch is composed of an impedance matching module, a ground isolation module and a main conduction module; in the main conduction module, the gate of the first switch field effect transistor is connected to the first control signal, one of the source and the drain of the first switch field effect transistor is connected to the RF input end, and the other is used as the output end of the main conduction module; in the ground isolation module, the source and drain of multiple second switch field effect transistors are connected in parallel, one end is grounded, and the other end is connected to the output end of the main conduction module, and the gates of all second switch field effect transistors are connected to the second control signal; in the impedance matching module, the third switch field effect transistor is connected in series with the impedance matching resistor, one end is connected to the output end of the main conduction module, and the other end is connected to the RF output end, and the gate of the third switch field effect transistor is connected to the first control signal; The logic conversion circuit uses a TTL inverter logic conversion circuit with positive voltage control and negative voltage supply to output a first control signal and a second control signal with opposite levels.

2. The single-pole multi-throw switch circuit for positive voltage control and negative voltage power supply according to claim 1, characterized in that: The value of N is 6.

3. The single-pole multi-throw switch circuit for positive voltage control and negative voltage power supply according to claim 1, characterized in that: The impedance matching resistor has a resistance of 50Ω.

4. The single-pole multi-throw switch circuit for positive voltage control and negative voltage power supply according to claim 1, characterized in that: The TTL inverter logic conversion circuit consists of two enhancement field effect transistors T1 and T3, three depletion field effect transistors T2, T4, and T5, and a series diode group, wherein the drain of T1 is connected to the source of T2, the drain of T3 is connected to the source of T4, the source and gate of T5, the drain and gate of T2, and the drain and gate of T4 are connected to the negative voltage supply voltage Vee, the source of T1 is connected to the gate of T3, the gate of T1 is connected to the drain of T5 and then connected to the negative electrode of the series diode group, the positive electrode of the series diode group is connected to the positive voltage control level Vcon, the gate of T1 is used as the first control signal, the source of T1 is used as the second control signal, and the source of T3 is grounded.

5. The single-pole multi-throw switch circuit for positive voltage control and negative voltage power supply according to claim 1, characterized in that: When designing the Layout, the P25ED3S process is used.

6. The single-pole multi-throw switch circuit for positive voltage control and negative voltage power supply according to claim 1, characterized in that: The ground isolation module includes three second switch field effect transistors.

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