Mainboard and electronic device
By setting up a grounding layer in the central area of the main board and setting up an electrostatic protective layer in the surrounding area, and connecting the through holes to the metal shell to form a low-impedance electrostatic discharge path, the grounding layer disturbance caused by electrostatic protection is solved to ensure stable signal transmission.
Patent Information
- Application Number
- CN202422143567.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-02
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2034-09-02
AI Technical Summary
The electrostatic protection method of existing motherboards causes disturbances in the ground level of the ground layer, affecting electronic components such as processors and memory, and causing the system to crash.
A grounding layer is set up in the central area of the main board, and an enclosed ring-shaped or disconnected strip-shaped electrostatic protection layer is set up in the surrounding area. The metal shell is connected to the metal lock firmware through the through holes to form a low-impedance electrostatic discharge path to avoid static electricity directly affecting the grounding layer.
It effectively reduces the disturbance probability of the reference ground level of the ground plane, ensures stable signal transmission and prevents the system from crashing.
Smart Images
Figure CN223080208U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a main board and an electronic device, and particularly to a main board and an electronic device with good electrostatic protection effect. Background Art
[0002] At present, one of the electrostatic protection methods for the main board is to expose the copper layer on the surface edge of the main board to guide static electricity. The exposed copper layer is electrically connected to the chassis through screws passing through the main board to provide a low-impedance static discharge path.
[0003] However, since the exposed copper layer is also directly electrically connected to the ground layer of the main board, when static electricity interferes with the main board, the reference ground level of the ground layer may be disturbed, affecting the electronic components such as the processor and memory on the main board that are vulnerable to interference, thereby affecting signal transmission and causing the system to crash. Therefore, how to provide good electrostatic protection for the main board is the research direction in this field. Summary of the Utility Model
[0004] The utility model provides a main board with good electrostatic protection effect.
[0005] The utility model provides an electronic device with the above main board.
[0006] A main board of the utility model includes a circuit board body, a processor, a plurality of first electronic components and a plurality of second electronic components. The circuit board body has opposite first and second surfaces, and includes a central area, a peripheral area and a plurality of vias. The central area includes a ground layer between the first and second surfaces. The peripheral area surrounds and is separated from the central area, and includes a first electrostatic protection layer exposed on the first surface. These vias are located between the central area and the peripheral area and penetrate the circuit board body. Each via includes a through hole, a first conduction member disposed on the first surface and located on the outer periphery of the through hole, and a second conduction member disposed in the through hole and connected to the first conduction member. The processor is disposed on the first surface of the central area. These first electronic components are disposed on the first surface, and these first electronic components are electrically connected to the first electrostatic protection layer and these first conduction members. These second electronic components are disposed on the first surface, and these second electronic components are electrically connected to the ground layer and these first conduction members.
[0007] In an embodiment of the utility model, the above central area includes a plurality of first pads exposed on the first surface, and a plurality of first metal connectors connecting the ground layer and these first pads. These second electronic components are disposed on the first surface and electrically connected to these first pads and these first conduction members.
[0008] In an embodiment of the present utility model, the above-mentioned peripheral area includes a second electrostatic protection layer exposed on the second surface, and the second electrostatic protection layer is connected to the first electrostatic protection layer through a second metal connecting member.
[0009] In an embodiment of the present utility model, the above-mentioned main board further includes a plurality of third electronic components. The peripheral area includes a second electrostatic protection layer exposed on the second surface. Each via hole further includes a third conducting member disposed on the second surface and located at the outer periphery of the via hole and connected to the second conducting member. These third electronic components are disposed on the second surface and electrically connected to the second electrostatic protection layer and these third conducting members.
[0010] In an embodiment of the present utility model, the above-mentioned main board further includes a plurality of fourth electronic components. Each via hole further includes a third conducting member disposed on the second surface and located at the outer periphery of the via hole and connected to the second conducting member. The central area includes a plurality of second pads exposed on the second surface. These fourth electronic components are disposed on the second surface and electrically connected to these second pads and these third conducting members.
[0011] In an embodiment of the present utility model, each of the above-mentioned first electronic components and these second electronic components includes a bead, a resistor, an inductor or a transient voltage suppression diode.
[0012] In an embodiment of the present utility model, the types of the above-mentioned first electronic components are the same or different, and the types of these second electronic components are the same or different.
[0013] In an embodiment of the present utility model, the above-mentioned first electrostatic protection layer is in a closed ring shape or a plurality of disconnected strip shapes.
[0014] An electronic device of the present utility model includes a metal housing, a plurality of studs, the above-mentioned main board and a plurality of metal fasteners. These studs are disposed on the metal housing. The main board is disposed on the metal housing, and these via holes are aligned with these studs. These metal fasteners are respectively inserted through these via holes and screwed to these studs to provide an electrostatic discharge path.
[0015] Based on the above, the peripheral area of the circuit board body of the main board of the present utility model surrounds and is separated from the central area, and the processor is disposed on the first surface of the central area. The peripheral area includes a first electrostatic protection layer exposed on the first surface. These via holes of the circuit board body are located between the central area and the peripheral area and penetrate the circuit board body. These first conducting members are exposed on the first surface and respectively surround these via holes. These first electronic components are electrically connected to the first electrostatic protection layer and these first conducting members. These second electronic components are electrically connected to the ground layer and these first conducting members. These metal fasteners are adapted to pass through these via holes and be fixed to the metal housing. Therefore, when there is electrostatic interference to the main board, the static electricity can be guided from the first electrostatic protection layer through these first electronic components, these first conducting members, these second conducting members, and these metal fasteners to the metal housing, thus avoiding directly affecting the ground layer in the central area and reducing the probability of disturbance of the reference ground level of the ground layer. In addition, the ground layer in the central area is guided to the metal housing through these second electronic components, these first conducting members, these second conducting members, and these metal fasteners, and can be connected to the system ground plane.
[0016] To make the above features and advantages of the present utility model more obvious and understandable, the following specific embodiments are given and detailed descriptions are made in conjunction with the accompanying drawings as follows. Description of the Drawings
[0017] Figure 1 is a partial cross-sectional schematic view of an electronic device according to an embodiment of the present utility model;
[0018] Figure 2 is Figure 1 a top view of the main board of
[0019] Figure 3 is a partial cross-sectional schematic view of an electronic device according to another embodiment of the present utility model.
[0020] Description of the Reference Numerals
[0021] 10: Electronic device;
[0022] 20: Metal housing;
[0023] 21: Stud;
[0024] 22: Screw hole;
[0025] 30: Metal fastener;
[0026] 100, 100a: Main board;
[0027] 110: Circuit board body;
[0028] 111: First surface;
[0029] 113: Second surface;
[0030] 115, 116, 117, 118, 119: Insulation layers;
[0031] 120: Central region;
[0032] 121: First pad;
[0033] 122: First metal connection member;
[0034] 123: Second pad;
[0035] 124: Third metal connection member;
[0036] 125: Ground layer;
[0037] 126, 127, 128: Conductive layers;
[0038] 130: Peripheral region;
[0039] 131: First electrostatic protection layer;
[0040] 132: Second electrostatic protection layer;
[0041] 133: Second metal connection member;
[0042] 140: Via hole;
[0043] 142: Through hole;
[0044] 144: First conduction member;
[0045] 146: Second conduction member;
[0046] 148: Third conduction member;
[0047] 145: Adhesive layer;
[0048] 150: Processor;
[0049] 152: Memory;
[0050] 160: First electronic component;
[0051] 162: Second electronic component;
[0052] 164: Third electronic component;
[0053] 166: Fourth electronic component. Detailed implementation manners
[0054] Figure 1 is a partial cross-sectional schematic view of an electronic device according to an embodiment of the present utility model. Figure 2 is Figure 1Top view schematic diagram of the main board. It should be noted that Figure 1 Only a partial metal housing is schematically shown. For the sake of clearly showing the structure of this case, the length and thickness dimensions of the main board are not shown in actual proportion and are only for illustration.
[0055] Please refer to Figure 1 and Figure 2 , the electronic device 10 of this embodiment is, for example, a computer, but the type of the electronic device 10 is not limited thereto. The electronic device 10 includes a metal housing 20, a plurality of screw holes 22, a main board 100, and a plurality of metal fasteners 30.
[0056] The metal housing 20 is, for example, the main chassis of a desktop computer, and the metal fastener 30 is, for example, a screw. The metal housing 20 is provided with a plurality of studs 21, and each stud 21 is provided with a screw hole 22 inside. The main board 100 is disposed on the metal housing 20, and the main board 100 is fixed to the metal housing 20 by these metal fasteners 30.
[0057] The main board 100 includes a circuit board body 110, a processor 150, a memory 152 ( Figure 2 ), a plurality of first electronic components 160, and a plurality of second electronic components 162.
[0058] As Figure 1 shown, the circuit board body 110 has opposite first surface 111 and second surface 113. In this embodiment, the first surface 111 is, for example, the upper surface, and the second surface 113 is, for example, the lower surface, but is not limited thereto.
[0059] The circuit board body 110 includes a central area 120, a peripheral area 130, and a plurality of vias 140. The central area 120 is located at the middle position of the circuit board body 110, that is, the non-edge position, and most of the electronic components are disposed in the central area 120. Figure 1 and Figure 2 The size range of the central area 120 marked in
[0060] is only for illustration.
[0061] The processor 150 and the memory 152 are disposed on the first surface 111 of the central area 120. The central area 120 includes a ground layer 125 located between the first surface 111 and the second surface 113. The ground layer 125 is used to provide a reference ground level for the electronic components (such as the processor 150 and the memory 152).
[0061] In addition, the central area 120 further includes a plurality of first pads 121 exposed on the first surface 111, and a plurality of first metal connectors 122 connecting the ground layer 125 and these first pads 121. Therefore, the ground layer 125 is electrically connected to the first pads 121 through these first metal connectors 122. In this embodiment, the ground layer 125 is not directly connected to the via 140.
[0062] In this embodiment, the circuit board body 110 has, from top to bottom in the central region 120, an insulating layer 118, a conductive layer 126, an insulating layer 115, a conductive layer 127, an insulating layer 116, a ground layer 125, an insulating layer 117, a conductive layer 128, and an insulating layer 119. The uppermost insulating layer 118 and the lowermost insulating layer 119 may be green paint. The conductive layers 126 and 128 are, for example, signal layers, and the conductive layer 127 is, for example, a power supply layer, but is not limited thereto.
[0063] The peripheral region 130 surrounds and is separated from the central region 120. In this embodiment, the peripheral region 130 is located at the edge of the circuit board body 110. The peripheral region 130 includes a first electrostatic protection layer 131 exposed on the first surface 111. As Figure 2 shown, in this embodiment, the first electrostatic protection layer 131 is in a closed ring shape, but in other embodiments, the first electrostatic protection layer 131 may also be presented as a plurality of disconnected strips.
[0064] In this embodiment, the peripheral region 130 may alternatively include a second electrostatic protection layer 132 exposed on the second surface 113. The second electrostatic protection layer 132 is connected to the first electrostatic protection layer 131 through a second metal connecting member 133. Similarly, the second electrostatic protection layer 132 may be in a closed ring shape or a plurality of disconnected strips. In addition, the insulating layers 115, 116, and 117 in the peripheral region 130 are connected through an adhesive layer 145.
[0065] These vias 140 are located between the central region 120 and the peripheral region 130 and penetrate the circuit board body 110. When the main board 100 is placed on the stud 21, the vias 140 can abut and be electrically connected to the stud 21. Each via 140 includes a through hole 142, a first conducting member 144 disposed on the first surface 111 and located on the outer periphery of the through hole 142, and a second conducting member 146 disposed in the through hole 142 and connected to the first conducting member 144. A plurality of first conducting members 144 are exposed on the first surface 111 and respectively surround these through holes 142. These vias 140 are aligned with these studs 21. These vias 140 are used for these metal fasteners 30 to pass through and be screwed into these screw holes 22 to fix the main board 100 to the studs 21 on the metal housing 20. These metal fasteners 30 will abut and be electrically connected to these first conducting members 144.
[0066] These first electronic components 160 are disposed on the first surface 111 and are electrically connected to the first electrostatic protection layer 131 and these first conducting members 144. The first electronic components 160 include beads, resistors, inductors, or transient voltage suppression diodes, but the types of the first electronic components 160 are not limited thereto. In addition, the types of these first electronic components 160 may be the same or different. For example, these first electronic components 160 may all be resistors, or some of these first electronic components 160 may be resistors and some may be inductors, but it is not limited thereto.
[0067] Therefore, when there is electrostatic interference to the main board 100, the static electricity can sequentially pass from the second electrostatic protection layer 132, the second metal connecting member 133, the first electrostatic protection layer 131, or directly from the first electrostatic protection layer 131, through these first electronic components 160, these first conducting members 144, these second conducting members 146, these metal fasteners 30, these studs 21 to the metal housing 20 to provide a low-impedance static electricity discharge path. Since the ground layer 125 is not directly connected to the via 140, it can avoid the static electricity directly affecting the ground layer 125 in the central region 120 and reduce the probability of disturbance of the reference ground level of the ground layer 125.
[0068] In addition, these second electronic components 162 are disposed on the first surface 111, and these second electronic components 162 are electrically connected to the ground layer 125 and these first conducting members 144. The second electronic components 162 include beads, resistors, inductors, or transient voltage suppression diodes, but the types of the second electronic components 162 are not limited thereto. In addition, the types of these second electronic components 162 may be the same or different. For example, these second electronic components 162 may all be resistors, or some of these second electronic components 162 may be resistors and some may be inductors, but it is not limited thereto.
[0069] In this embodiment, these second electronic components 162 are disposed on the first surface 111 and are electrically connected to these first pads 121 and these first conducting members 144. Therefore, the ground layer 125 in the central region 120 is guided to the metal housing 20 through these first metal connecting members 122, these first pads 121, these second electronic components 162, these first conducting members 144, these second conducting members 146, these metal fasteners 30, these studs 21, and thus can be connected to the system ground plane.
[0070] Of course, in an embodiment, the second electronic components 162 may not be disposed on the first surface 111. For example, they may be disposed on the second surface 113. Correspondingly, the first pads 121 are disposed on the second surface 113, and the second electronic components 162 are electrically connected to these vias 140 and these metal fasteners 30.
[0071] Another embodiment is introduced below. Components that are the same as or similar to those in the previous embodiment are denoted by the same or similar symbols, and will not be elaborated further. Only the main differences will be described.
[0072] Figure 3 is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of the present utility model. Please refer to Figure 3 , Figure 3 The main difference between the main board 100a of Figure 1 and the main board 100 of
[0073] is that each via 140 further includes a third conducting member 148 disposed on the second surface 113 and located on the outer periphery of the through hole 142 and connected to the second conducting member 146. The main board 100a further includes a plurality of third electronic components 164, and these third electronic components 164 are disposed on the second surface 113 and electrically connected to the second electrostatic protection layer 132 and these third conducting members 148.
[0074] Therefore, when there is electrostatic interference to the main board 100a, the static electricity can be guided from the first electrostatic protection layer 131, through these first electronic components 160, these first conducting members 144, these second conducting members 146, these metal fasteners 30, these studs 21 to the metal housing 20 to provide a low-impedance electrostatic discharge path. Or, the static electricity can be guided from the second electrostatic protection layer 132 through these third electronic components 164, these third conducting members 148, these metal fasteners 30 to the metal housing 20 to provide a low-impedance electrostatic discharge path. Since the ground layer 125 is not directly electrically connected to the via 140, it can avoid the static electricity directly affecting the ground layer 125 in the central region 120 and reduce the probability of the reference ground level of the ground layer 125 being disturbed.
[0074] In addition, the main board 100a further includes a plurality of fourth electronic components 166. The central region 120 includes a plurality of second pads 123 exposed on the second surface 113 and a plurality of third metal connectors 124 connecting the ground layer 125 and these second pads 123. These fourth electronic components 166 are disposed on the second surface 113 and electrically connected to these second pads 123 and these third conducting members 148.
[0075] Therefore, the ground layer 125 in the central region 120 is guided to the metal housing 20 through these third metal connectors 124, these second pads 123, these fourth electronic components 166, these third conducting members 148, these metal fasteners 30, these studs 21, and can be connected to the system ground plane, thus having other grounding paths.
[0076] In summary, the peripheral area of the circuit board body of the main board of the present utility model surrounds and is separated from the central area, and the processor is disposed on the first surface of the central area. The peripheral area includes a first electrostatic protection layer exposed on the first surface. These via holes of the circuit board body are located between the central area and the peripheral area and penetrate the circuit board body. These first conduction members are exposed on the first surface and respectively surround these via holes. These first electronic components are electrically connected to the first electrostatic protection layer and these first conduction members. These second electronic components are electrically connected to the ground layer and these first conduction members. These metal fasteners are adapted to pass through these via holes and be fixed to the metal housing. Therefore, when there is electrostatic interference to the main board, the static electricity can be guided from the first electrostatic protection layer through these first electronic components, these first conduction members, these second conduction members, and these metal fasteners to the metal housing, thus avoiding directly affecting the ground layer in the central area and reducing the probability of disturbance of the reference ground level of the ground layer. In addition, the ground layer in the central area is guided to the metal housing through these second electronic components, these first conduction members, these second conduction members, and these metal fasteners, and can be connected to the system ground plane.
[0077] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present utility model and are not intended to limit them. Although the present utility model has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present utility model.
Claims
1. A main board, characterized in that, Comprising: A circuit board body having opposite first and second surfaces, and comprising: A central region including a ground layer between the first surface and the second surface; A peripheral region surrounding and spaced apart from the central region, and including a first electrostatic protection layer exposed on the first surface; and A plurality of vias located between the central region and the peripheral region and penetrating the circuit board body, each via including a through hole, a first conducting member disposed on the first surface and located on the outer periphery of the through hole, and a second conducting member disposed in the through hole and connecting the first conducting member; A processor disposed on the first surface of the central region; A plurality of first electronic components disposed on the first surface, and the plurality of first electronic components are electrically connected to the first electrostatic protection layer and the plurality of first conducting members; and A plurality of second electronic components disposed on the first surface, and the plurality of second electronic components are electrically connected to the ground layer and the plurality of first conducting members.
2. The motherboard according to claim 1, wherein, The central region includes a plurality of first pads exposed on the first surface, and a plurality of first metal connectors connecting the ground layer and the plurality of first pads, and the plurality of second electronic components are disposed on the first surface and electrically connected to the plurality of first pads and the plurality of first conducting members.
3. The motherboard according to claim 1, characterized in that, The peripheral region includes a second electrostatic protection layer exposed on the second surface, and the second electrostatic protection layer is connected to the first electrostatic protection layer through a second metal connector.
4. The motherboard according to claim 1, characterized in that, Further comprising a plurality of third electronic components, wherein the peripheral region includes a second electrostatic protection layer exposed on the second surface, each via further includes a third conducting member disposed on the second surface and located on the outer periphery of the through hole and connecting the second conducting member, and the plurality of third electronic components are disposed on the second surface and electrically connected to the second electrostatic protection layer and the plurality of third conducting members.
5. The motherboard according to claim 1, characterized in that, Further comprising a plurality of fourth electronic components, wherein each via further includes a third conducting member disposed on the second surface and located on the outer periphery of the through hole and connecting the second conducting member, the central region includes a plurality of second pads exposed on the second surface, and the plurality of fourth electronic components are disposed on the second surface and electrically connected to the plurality of second pads and the plurality of third conducting members.
6. The motherboard according to claim 1, wherein Each of the plurality of first electronic components and the plurality of second electronic components includes a bead, a resistor, an inductor, or a transient voltage suppression diode.
7. The motherboard according to claim 1, wherein The plurality of first electronic components may be of the same or different types, and the plurality of second electronic components may be of the same or different types.
8. The motherboard according to claim 1, wherein The first electrostatic protection layer is in a closed ring shape or a plurality of disconnected strip shapes.
9. An electronic device, characterized in that, Comprising: A metal housing; A plurality of studs disposed on the metal housing; The main board according to any one of claims 1 to 8, disposed on the metal housing, and the plurality of vias are aligned with the plurality of studs; and A plurality of metal fasteners respectively passing through the plurality of vias and screwed to the plurality of studs to provide an electrostatic discharge path.