Voltage control type level control circuit

Abstract

The utility model discloses a voltage control type level control circuit, which belongs to the technical field of electronic circuits and comprises an effect transistor Q1, the field effect transistor Q1 is connected in a signal loop in series, a source electrode S is connected with signal input, a drain electrode D is connected with signal output, impedance between the two electrodes is determined by voltage of a grid electrode G, and the control circuit changes the voltage of the pin G of the grid electrode. According to the level control circuit, an N-type field effect transistor is connected in series in a signal loop, the impedance of a source electrode S and a drain electrode D of the field effect transistor is changed by changing the voltage of a grid electrode G of the field effect transistor, the level in the signal loop can be adjusted, high or low control over the output level is achieved, and the purpose that the output level is high or low by using conventional elements is achieved. By changing the impedance of the source electrode S and the drain electrode D of the field effect transistor, the level adjusting function is achieved, the field effect transistor has the advantage of being wide in application, the preset function is achieved without additionally adding IC and other elements, and the field effect transistor has the advantages of being low in needed material cost, convenient to purchase, convenient in PCB design, high in reliability and high in precision.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a voltage-controlled level control circuit. Background Art

[0002] "Level adjustment" is an essential function in automotive power amplifiers and an indispensable part. Consumers can, according to the different levels of the audio source output, through the "level adjustment" function, make the levels between the front and rear stages reach the most balanced state. Generally, the level adjustment circuit consists of a rotary potentiometer, and the level adjustment is achieved by changing the position of the sliding end of the potentiometer.

[0003] Figure 1 For the schematic diagram of the existing level adjustment circuit, please refer to Figure 1 , VR1 is the volume adjustment potentiometer; when the sliding end 2 is adjusted to the potentiometer 3, the 2 and 3 are short-circuited. The input signal is limited by R1 and then forms a voltage division with VR1 + R2. At this time, the potential of the 2 is the highest, and after being coupled by C1, it is output, and the output level is the largest at this time. When the sliding end 2 is adjusted to the potentiometer 1, the 2 and 1 are short-circuited. The input signal is limited by R1 and then forms a voltage division with the sum of VR1 and R2 and R2. At this time, the potential of the 2 is the lowest, and after being coupled by C1, it is output, and the output level is the smallest at this time. When VR1 is in different positions, it always forms a voltage division with R2 through the resistance value of R1 + VR1 to achieve level adjustment. The structure of this type of circuit is simple, but there is a contact resistance between the sliding end of the 2 of the potentiometer and the 1 and 3. Once the internal contact of the potentiometer is poor, it is easy to generate noise. As is well known, an automobile is a product used dynamically, and it is very easy to generate bumps when passing through an uneven road surface. Once the internal contact of the potentiometer is poor due to vibration during the driving of the automobile, noise will be generated in the audio system.

[0004] In order to solve the noise problem caused by the contact resistance of the above-mentioned traditional level adjustment potentiometer, some manufacturers have developed a "digital level control" integrated circuit, integrating the level adjustment function on the chip. Figure 2 For the schematic diagram of another existing level adjustment circuit, please refer to Figure 2 , MAXIN5420 is constructed with an integrated circuit analog potentiometer, overcoming the disadvantage of the traditional potentiometer being prone to contact noise problems and being able to very conveniently meet the requirements of resistance value changes in the circuit. However, it also has the disadvantages of increased cost and a relatively large occupied PCB area. Therefore, we propose a voltage-controlled level control circuit. Summary of the Utility Model

[0005] This part of the content of the present application is used to briefly introduce the concepts, which will be described in detail in the following detailed implementation part. This part of the content of the present application is not intended to identify the key features or essential features of the claimed technical solution, nor is it intended to limit the scope of the claimed technical solution.

[0006] The purpose of the present utility model is to provide a voltage-controlled level control circuit to solve the problems raised in the above-mentioned background technology.

[0007] To achieve the above purpose, the present utility model provides the following technical solution: a voltage-controlled level control circuit, including a field effect transistor Q1, a drain D, and a sliding end of the 2nd pin of VR1. The field effect transistor Q1 is connected in series in the signal circuit, and the source S is connected to the signal input. The drain D is connected to the signal output, and the impedance between the two poles is determined by the voltage of the gate G. By changing the voltage of the gate G pin of the control circuit, the impedance between the drain D and the source S of Q1 will change, so that the output level can be adjusted.

[0008] Further, the gate G of Q1 is connected to the sliding end of VR1 pin 2. When the potential of the 2nd pin of VR1 changes, it is equivalent to a change in the voltage of the gate G of Q1, and the impedance between the drain D and the source S will also change.

[0009] Further, when the sliding end of the 2nd pin of VR1 is connected to the 1st pin, the voltage of the gate G of Q1 is the lowest when grounded, and at this time Q1 is not conducting. The impedance between the drain D and the source S is above megohms, almost open circuit. At this time, the voltage of the OUT+ output terminal is the lowest, and the output level is at the minimum position.

[0010] Further, when the sliding end of the 2nd pin of VR1 is connected to the 3rd pin, the voltage of the gate G of Q1 is the highest, and a voltage close to 5V is sufficient to turn on Q1. The impedance between the drain D and the source S is less than 1 ohm, almost short circuit. At this time, the voltage of the OUT+ output terminal is the highest, and the output level is at the maximum position.

[0011] Further, when the sliding end of the 2nd pin of VR1 changes between the 1st pin and the 2nd pin, and the gate voltage of Q1 is between conduction and cut-off, the output level can be adjusted.

[0012] Further, the higher the voltage of the gate G, the smaller the impedance between the source S and the drain D, almost short circuit, and the lower the gate G, the greater the impedance, almost open circuit.

[0013] Compared with the prior art, the beneficial effects of the present utility model are:

[0014] This level control circuit realizes the "level adjustment" function by changing the impedance between the source S and the drain D of the field effect transistor using conventional components, and is applicable to household, vehicle, and portable audio occasions, with the characteristics of wide application. It eliminates the need to add additional components such as ICs to achieve the preset function, and has the characteristics of low material cost, convenient procurement, convenient PCB design, wide application, high reliability, and high precision.

[0015] This level control circuit not only overcomes the contact noise problem of traditional potentiometers, but also does not require an external microcontroller as in the " Figure 2 " scheme, has a low cost, greatly reduces the development difficulty and cycle, and at the same time has the characteristics of small size and few required components.

[0016] This level control circuit is achieved by connecting an N-type field effect transistor in series in the signal circuit. By changing the voltage of the gate G of the field effect transistor, the impedance between the source S and the drain D of the field effect transistor changes, enabling the level in the signal circuit to be adjustable, thereby realizing the control of high or low output levels. Description of the Drawings

[0017] Figure 1 is a circuit schematic diagram of an existing level adjustment circuit;

[0018] Figure 2 is a circuit schematic diagram of another existing level adjustment circuit;

[0019] Figure 3 is a circuit schematic diagram of the level adjustment circuit of the present invention. Detailed Embodiments

[0020] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although some embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided to more thoroughly and completely understand the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not used to limit the protection scope of the present disclosure.

[0021] In addition, it should be noted that for the sake of convenience of description, only parts related to the relevant invention are shown in the drawings. Without conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other.

[0022] It should be noted that the concepts such as "first" and "second" mentioned in the present disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependent relationships.

[0023] It should be noted that the modifiers "one" and "multiple" mentioned in the present disclosure are illustrative rather than restrictive. Those skilled in the art should understand that unless clearly specified otherwise in the context, it should be understood as "one or more".

[0024] The present disclosure will be described in detail below with reference to the drawings and in combination with the embodiments.

[0025] The present invention provides as Figures 1 - 3The voltage-controlled level control circuit shown includes a field-effect transistor Q1, a drain D, and a slider 2 of VR1; the field-effect transistor Q1 is connected in series in the signal circuit, with the source S connected to the signal input, the drain D connected to the signal output, and the impedance between the two poles determined by the voltage of the gate G. By changing the voltage of the gate G pin of this control circuit, the impedance between the drain D and the source S of Q1 will change, enabling the output level to be adjusted.

[0026] To achieve zero-noise adjustment, as Figure 3 shown, the higher the voltage of the gate G of this level control circuit, the smaller the impedance between the source S and the drain D, almost short-circuited, and the lower the gate G, the greater the impedance, almost open-circuited. Since the potentiometer only controls the voltage, by controlling the voltage of the gate G of Q1, the impedance between the drain D and the source S changes, and zero-noise adjustment can be achieved during the adjustment process.

[0027] As Figure 3 shown, the gate G of Q1 is connected to the slider 2 of VR1. When the potential of the second pin of VR1 changes, it is equivalent to a change in the voltage of the gate G of Q1, and the impedance between the drain D and the source S also changes.

[0028] To maintain the stable regulation of this level control circuit, as Figure 3 shown, when the audio needs to have the function of "wired control level adjustment", to reduce interference, Q1 can be placed inside the product, and VR1 can be used for external wired control. By simply changing the voltage of the second pin of VR1, the "wired control level" adjustment can be achieved. The wired control distance can reach several meters to dozens of meters, with negligible signal loss and higher signal fidelity.

[0029] As Figure 3 shown, when the slider of the second pin of VR1 is connected to the first pin, the voltage of the gate G of Q1 is the lowest and grounded. At this time, Q1 is not conducting, and the impedance between the drain D and the source S is above megohms, almost open-circuited. At this time, the voltage of the OUT+ output terminal is the lowest, and the output level is at the minimum position.

[0030] Finally, to reduce interference during the circuit regulation process, as shown in 3, when the slider of the second pin of VR1 is connected to the third pin, the voltage of the gate G of Q1 is the highest, close to 5V, which is sufficient to turn on Q1. The impedance between the drain D and the source S is below 1 ohm, almost short-circuited. At this time, the voltage of the OUT+ output terminal is the highest, and the output level is at the maximum position. When the slider of the second pin of VR1 changes its position between the first pin and the second pin, the voltage of the gate of Q1 is between conduction and cutoff, and the output level can be adjusted. At the same time, C1 plays a smoothing role in the circuit, making the adjustment of the output level smoother and reducing interference at the same time.

[0031] In summary, in the level control circuit, the gate G of Q1 is connected to the sliding end 2 of VR1. When the potential of the second pin of VR1 changes, it is equivalent to the voltage of the gate G of Q1 changing, and the impedance between the drain D and the source S will also change. When the sliding end of the second pin of VR1 is connected to the first pin, the voltage of the gate G of Q1 grounded is the lowest. At this time, Q1 is not conducting, and the impedance between the drain D and the source S is above megohms, almost an open circuit. At this time, the voltage of the OUT+ output terminal is the lowest, and the output level is at the minimum position. When the sliding end of the second pin of VR1 is connected to the third pin, the voltage of the gate G of Q1 is the highest. A voltage close to 5V is sufficient to turn on Q1, and the impedance between the drain D and the source S is less than 1 ohm, almost a short circuit. At this time, the voltage of the OUT+ output terminal is the highest, and the output level is at the maximum position. By changing the position of the sliding end of the second pin of VR1 between the first pin and the second pin, the gate voltage of Q1 is between conduction and cut-off, realizing the process of adjusting the output level.

[0032] The above description is only some preferred embodiments of the present disclosure and an explanation of the applied technical principles. Those skilled in the art should understand that the scope of the invention involved in the embodiments of the present disclosure is not limited to the technical solutions formed by the specific combination of the above technical features, and should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above inventive concept. For example, the technical solutions formed by mutually replacing the above features with the (but not limited to) technical features having similar functions disclosed in the embodiments of the present disclosure.

Claims

1. A voltage-controlled level control circuit, characterized in that: It includes a field effect transistor Q1, a drain D, and the sliding end of the 2nd pin of VR1. The field effect transistor Q1 is connected in series in the signal circuit, and the source S is connected to the signal input. The drain D is connected to the signal output, and the impedance between the two poles is determined by the voltage of the gate G. The control circuit changes the voltage of the gate G pin, and the impedance between the drain D and the source S of Q1 will change, enabling the output level to be adjusted.

2. The voltage-controlled level control circuit according to claim 1, wherein: The gate G of Q1 is connected to the sliding end of the 2nd pin of VR1. When the potential of the 2nd pin of VR1 changes, it is equivalent to a change in the voltage of the gate G of Q1, and the impedance between the drain D and the source S will also change.

3. The voltage-controlled level control circuit according to claim 1, wherein: When the sliding end of the 2nd pin of VR1 is connected to the 1st pin, the voltage of the gate G of Q1 is the lowest, and at this time Q1 is not conducting. The impedance between the drain D and the source S is above megohms, almost open circuit, and at this time the voltage of the OUT+ output terminal is the lowest, and the output level is at the minimum position.

4. The voltage-controlled level control circuit according to claim 1, wherein: When the sliding end of the 2nd pin of VR1 is connected to the 3rd pin, the voltage of the gate G of Q1 is the highest, and a voltage close to 5V is sufficient to turn on Q1. The impedance between the drain D and the source S is less than 1 ohm, almost short circuit, and at this time the voltage of the OUT+ output terminal is the highest, and the output level is at the maximum position.

5. The voltage-controlled level control circuit according to claim 1, wherein: When the sliding end of the 2nd pin of VR1 changes its position between the 1st pin and the 2nd pin, and the gate voltage of Q1 is between conduction and cut-off, the output level can be adjusted.

6. The voltage-controlled level control circuit according to claim 1, wherein: The higher the voltage of the gate G, the smaller the impedance between the source S and the drain D, almost short circuit. And the lower the gate G, the greater the impedance, almost open circuit.

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