Driving chip and display device

Abstract

The utility model discloses a driving chip and a display device. According to the embodiment of the utility model, the driving chip is provided with two long sides which are oppositely arranged and two short sides which are connected with the long sides and are oppositely arranged, the driving chip comprises a first bypass pin which is close to the short sides and is arranged on the long sides, a second bypass pin which is close to the short sides and is arranged on the long sides, and a third bypass pin which is close to the second bypass pin and is arranged on the short sides. The first bypass pin is arranged on the short side, the second bypass pin is arranged on the short side, the golden finger pin is far away from the second bypass pin and is arranged on the long side, and the first bypass pin and the second bypass pin are communicated to form a signal transmission path. According to the driving chip and the display device provided by the embodiment of the utility model, wiring and layout are optimized.

Description

Technical Field

[0001] The utility model relates to the technical field of display, and particularly relates to a driving chip and a display device. Background Art

[0002] The driving IC (Driver IC) of a display device is an integrated circuit chip used to control and drive pixel points on a display panel. The driving IC is responsible for receiving data signals from a main control chip or a processor, and converting them into signals suitable for the display panel to control the brightness and color of pixel points on the display panel. The driving IC needs to be connected to a power supply, a control signal, a load, etc.

[0003] In the prior art, when the driving IC is connected to a power supply, a control signal, a load, etc., due to considerations such as trace impedance, the placement position of the driving IC is very limited, which will in turn affect the layout of other devices.

[0004] For example, in existing Dual Gate models, due to requirements and limitations of trace impedance, the placement position of the driving IC is restricted, resulting in a larger size and wider boundary of the PCBA (Printed Circuit Board Assembly), and the layout size cannot be further optimized.

[0005] Specifically, Figure 1 shows a schematic diagram of the traces of a display device according to the prior art. As Figure 1 shown, due to limitations such as trace impedance, the placement position of the driving chip 100 is restricted, resulting in a longer size and wider lower boundary of the printed circuit board assembly 200.

[0006] Therefore, it is desirable to have a new driving chip and display device that can overcome the above problems. Summary of the Utility Model

[0007] In view of the above problems, the purpose of the present utility model is to provide a driving chip and a display device to optimize the traces and layout.

[0008] According to one aspect of the present utility model, a driving chip is provided. The driving chip has two opposite long sides and two opposite short sides connected to the long sides. The driving chip is characterized in that it includes:

[0009] A first bypass pin, the first bypass pin is close to the short side and is arranged on the long side,

[0010] A second bypass pin, the second bypass pin is arranged on the short side, and

[0011] The gold finger pins are away from the second bypass pin and are arranged on the long side.

[0012] Wherein, the first bypass pin is connected to the second bypass pin to form a signal transmission path.

[0013] Optionally, the driving chip includes opposite first and second long sides, and opposite first and second short sides;

[0014] The first bypass pin is arranged on the first long side, and the first bypass pin is used as the input end of the gate driving signal;

[0015] The second bypass pin is arranged on the first short side, and the second bypass pin is used as the output end of the gate driving signal;

[0016] The gold finger pins are also arranged on the side of the first long side away from the first short side.

[0017] Optionally, at least one of the control signal and the gamma signal is output from the side of the long side away from the second bypass pin.

[0018] Optionally, the driving chip includes a first driving chip and a second driving chip;

[0019] The power pin of the first driving chip is arranged on the short side on the left, and the second bypass pin on the first driving chip is arranged on the short side on the left;

[0020] The power pin of the second driving chip is arranged on the short side on the right, and the second bypass pin on the second driving chip is arranged on the short side on the right.

[0021] Optionally, there are multiple first bypass pins and multiple second bypass pins; the multiple first bypass pins correspond to the multiple second bypass pins one by one to form multiple independent signal transmission paths;

[0022] The multiple independent signal transmission paths respectively transmit the gate driving signal and at least one of the start signal, the clock signal and the voltage signal.

[0023] Optionally, the gold finger pins include at least one first pin;

[0024] The first pin is arranged on the long side on one side of the first bypass pin, and the first bypass pin is between the short side where the second bypass pin is located and the first pin;

[0025] The first pin is configured as at least one of an analog power voltage terminal, a semi-analog voltage terminal and a ground terminal.

[0026] Optionally, the first pin is used for electrical connection with an external printed circuit board;

[0027] The connection position of the first pin and the external printed circuit board is located on one side of the long side away from the second bypass pin.

[0028] Optionally, the edge connector pins include at least one second pin;

[0029] The second pin is disposed on at least one of the two long sides to transmit differential signals.

[0030] Optionally, the edge connector pins include at least one third pin;

[0031] The third pin is disposed on at least one of the two long sides, and the third pin is configured as at least one of a backlight control signal terminal, a backlight current level detection terminal, a control signal terminal, and a gamma input voltage terminal.

[0032] According to another aspect of the present invention, there is provided a display device, including:

[0033] A printed circuit board;

[0034] The driving chip as described above, wherein a first bypass pin of the driving chip is connected to the printed circuit board; and

[0035] A display panel, wherein the display panel is connected to a second bypass pin of the driving chip,

[0036] wherein a signal provided by the printed circuit board is provided to the display panel via the signal transmission path.

[0037] In the driving chip and the display device provided by the embodiments of the present invention, the first bypass pin disposed on the long side is communicated with the second pin disposed on the short side to form a signal transmission path, so that the signal can be output via the driving chip, thereby optimizing the routing and layout of the chip.

[0038] Further, the first bypass pin is used as an input terminal of the gate driving signal, and the second bypass pin is used as an output terminal of the gate driving signal. The routing of the gate driving signal is set as the internal routing of the driving chip, which not only shortens the distance from the driving chip to the edge connector, but also can shorten the size of the corresponding printed circuit board.

[0039] Further, the driving chip includes a first driving chip with a second bypass pin disposed on the left side and a second driving chip with a second bypass pin disposed on the right side. With the cooperation of the first driving chip and the second driving chip, it can be well applicable to a display device with dual-sided driving.

[0040] Furthermore, the first pin serving as at least one of the analog power supply voltage terminal, the semi-analog voltage terminal, and the ground terminal is disposed on the long side of one side of the first bypass pin, and the first bypass pin is between the short side where the second bypass pin is located and the first pin, such that the gold finger can move away from the side of the second bypass pin, thereby reducing the trace impedance, reducing the pitch of the traces, and reducing the border size. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features, and advantages of the present invention will become more apparent. In the drawings:

[0042] Figure 1 A schematic diagram of the traces of a display device according to the prior art is shown;

[0043] Figure 2 A schematic diagram of the structure of a driving chip according to an embodiment of the present invention is shown;

[0044] Figure 3 A schematic diagram of the layout structure of a driving chip according to an embodiment of the present invention is shown;

[0045] Figure 4 A schematic diagram of the traces of a driving chip according to an embodiment of the present invention is shown;

[0046] Figure 5 A schematic diagram of the traces of a display device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0047] The various embodiments of the present invention will be described in more detail below with reference to the drawings. In the respective drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown in the figures.

[0048] The specific embodiments of the present invention will be described in further detail below in conjunction with the drawings and embodiments. Many specific details of the present invention, such as the structure, material, size, processing technology, and technique of components, are described below in order to understand the present invention more clearly. However, as those skilled in the art can understand, the present invention can be implemented without these specific details.

[0049] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "above" or "on top of" another layer or another region, it may mean directly above the other layer or another region, or there may be other layers or regions between it and the other layer or another region. And if the component is flipped, this layer or region will be "below" or "beneath" the other layer or another region.

[0050] Figure 2 The schematic structural diagram of a driving chip according to an embodiment of the present invention is shown. Figure 3 The schematic layout structural diagram of a driving chip according to an embodiment of the present invention is shown. Combining Figure 2 and Figure 3 As shown, the driving chip 100 (including but not limited to a source driving chip) according to an embodiment of the present invention includes a first bypass pin 110, a second bypass pin 120, and a gold finger pin 180.

[0051] Specifically, the driving chip 100 has two relatively arranged long sides and two relatively arranged short sides connected to the long sides. The applicant wishes to clarify that here, the long side is relative to the short side, and the short side is relative to the long side, that is, for a driving chip with a rectangular shape, the relatively longer side is the long side, and the relatively shorter side is the short side.

[0052] The first bypass pin 110 is close to the short side and is arranged on the long side. The second bypass pin 120 is arranged on the short side, and the gold finger pin 180 is far from the second bypass pin 120 and is arranged on the long side. The first bypass pin 110 is connected to the second bypass pin 120 to form a signal transmission path.

[0053] Of course, Figure 2 As shown is only a specific embodiment of the present application. In this embodiment, the second bypass pins 120 are arranged on both short sides of the driving chip 100, and the gold finger pins 180 are arranged in the middle of the long side. In other embodiments of the present invention, the second bypass pins 120 may also be arranged only on the left or right short side. Optionally, the driving chip 100 includes (is divided into) a first driving chip and a second driving chip. Combining Figure 2 As shown, the power supply pins of the first driving chip are arranged on the left short side, and the second bypass pins 120 on the first driving chip are arranged on the left short side; the power supply pins of the second driving chip are arranged on the right short side, and the second bypass pins 120 on the second driving chip are arranged on the right short side. The driving chips with these two layouts can be applied to dual-gate models.

[0054] In an alternative embodiment of the present utility model, the driving chip 100 includes a first long side and a second long side which are oppositely arranged, and a first short side and a second short side which are oppositely arranged.

[0055] The first bypass pin 110 is disposed on the first long side (e.g., Figure 2 the long side shown below), and the first bypass pin 110 serves as an input terminal for the gate driving signal (GIA signal). The second bypass pin 120 is disposed on the first short side (e.g., Figure 2 the short side shown on the left), and the second bypass pin 120 serves as an output terminal for the gate driving signal. The signal transmission path formed by connecting the first bypass pin 110 and the second bypass pin 120 is shown by the left arrow part in the figure.

[0056] Optionally, a gold finger pin 180 is further disposed on the side of the first long side away from the first short side. The gold finger pin 180 is used to connect to the gold finger 160, and the gold finger pin 180 can be Figure 4 at least one of the first pin 130, the second pin 140, and the third pin 150 described in

[0057] For the driving chip according to the embodiment of the present utility model, bypass pins are added on the left side and / or the right side of the driving chip. The bypass pins do not require the driving chip to provide signals, and only pass the traces through the inside of the driving chip. The current passing through is extremely small, and the withstand voltage needs to meet the voltages of VGH (high potential) and VGL (low potential).

[0058] Continuing to refer to Figure 2 and Figure 3 , there are multiple first bypass pins 110 and multiple second bypass pins 120. The multiple first bypass pins 110 respectively correspond to the multiple second bypass pins 120 one by one to form multiple independent signal transmission paths. The multiple independent signal transmission paths are connected to an external terminal (e.g., a gate driving signal terminal) 300, and the multiple independent signal transmission paths are respectively used to transmit the gate driving signal and at least one selected from a start signal (STV, start vertical), a clock signal (CLK), a voltage signal, etc. Specifically, the second bypass pin 120 is connected to the external terminal 300, and the first bypass pin 110 is connected to the gold finger 160.

[0059] Optionally, at least one of a control signal, a gamma signal, etc. is output from the side of the long side away from the second bypass pin. In this embodiment, the control signal, the gamma signal, etc. are output from the side away from the second bypass pin, and the gate driving signal passes through the inside of the driving chip. The position of the short-side power signal is used to output the gate driving signal. Such a design enables the position of the gold finger to be freely moved.

[0060] Figure 4 The figure shows a wiring schematic diagram of a driving chip according to an embodiment of the present invention. As Figure 4 shown, the driving chip 100 further includes a first pin 130, a second pin 140, and a third pin 150. The type of the driving chip may be an N1452 R0 chip or the like.

[0061] Specifically, the second bypass pin 120 is used to transmit a gate driving signal (GIA), and is also used to transmit at least one of a start signal (STV), a clock signal (CLK), and voltage signals (V1, V2), etc.

[0062] The gold finger pins 180 of the driving chip 100 include at least one first pin 130. The first pin 130 is disposed on the long side of one side of the first bypass pin 110, and the first bypass pin 110 is located between the short side where the second bypass pin 120 is located and the first pin 130. The first pin 130 is configured as at least one of an analog power supply voltage terminal (AVDD), a semi-analog voltage terminal (HAVDD), and a ground terminal (GND). The first pin 130 is, for example, used to connect to the gold finger 160 on the FPC.

[0063] Optionally, the first pin 130 is used for electrical connection with an external printed circuit board. The connection position of the first pin 130 with the external printed circuit board is located on the long side and away from the second bypass pin 120.

[0064] In an alternative embodiment of the present invention, the driving chip 100 further includes at least one second pin 140. The second pin 140 is disposed on at least one of the two long sides to transmit differential signals. The second pin 140 is, for example, used to connect to the gold finger on the printed circuit board. The second pin 140 may be a symmetric pin or may come out from the other side.

[0065] In an alternative embodiment of the present invention, the driving chip 100 (gold finger pins 180) further includes at least one third pin 150. The third pin 150 is disposed on at least one of the two long sides, and the third pin 150 is configured as at least one of a backlight control signal terminal (BCLC), a backlight current level detection terminal (BCLD), a control signal terminal (XON), and a gamma input voltage terminal (VGMA). The third pin 150 is, for example, used to connect to the gold finger 160 on the printed circuit board. The third pin 150 may be a symmetric pin or may come out from the other side.

[0066] Based on the original driving chip, bypass pins are added on the left side and / or the right side. The traces on the original glass are changed to be inside the IC, without the need for the IC to provide signals. This can not only reduce the distance between the driving chip and the gold finger, lower the impedance between the driving chip and the gold finger, but also move the gold finger towards the center, thereby shortening the length of the printed circuit board in the double-gate structure and reducing the lower border.

[0067] Figure 5 The schematic diagram of the traces of the display device according to the embodiment of the present invention is shown. Combining Figure 2 、 Figure 3 and Figure 5 as shown, the display device according to the embodiment of the present invention includes a printed circuit board 200, a flexible printed circuit (FPC) 170, the driving chip 100 as described above, a gold finger 160, and a display panel 400.

[0068] Specifically, the first bypass pin 110 of the driving chip 100 is sequentially connected to the printed circuit board 200 via the gold finger 160 and the flexible printed circuit board 170.

[0069] The display panel 400 is connected to the second bypass pin 120 of the driving chip 100.

[0070] The signal provided by the printed circuit board 200 is provided to the display panel 400 via the signal transmission path.

[0071] For the driving chip and the display device according to the embodiment of the present invention, bypass pins are added on the left side and / or the right side of the driving chip, which can change the traces on the original glass to be inside the driving chip. This can not only shorten the distance from the driving chip to the gold finger, but also the position of the gold finger can be moved towards the center, and the length of the printed circuit board can be shortened. In a specific embodiment where the driving chip is an N1452 R0 chip, when it adopts Figure 1 the existing technical solution shown, the WOA (Wire on Array) trace is 0.75 mm, the distance between the left and right gold fingers is 156 mm, the lower boundary is 5.7 mm, and the length of the printed circuit board is 220 mm; when it adopts Figure 5 the solution of the present application shown, the WOA trace is 0.26 mm, the distance between the left and right gold fingers is 136 mm, the lower boundary is 5.21 mm, and the length of the printed circuit board is 200 mm. In this specific embodiment, compared with the existing technology, the present application can reduce the WOA trace by about 0.49 mm, saving about 2 / 3; the distance between the left and right gold fingers is shortened by about 20 mm. When the layout space is sufficient, the PCBA size can be shortened by 20 mm.

[0072] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

[0073] According to the embodiments of the present utility model as described above, these embodiments do not describe all the details in detail, nor do they limit the utility model to the specific embodiments described. Obviously, according to the above description, many modifications and variations can be made. The present specification selects and specifically describes these embodiments in order to better explain the principle and practical application of the present utility model, so that those skilled in the art can make good use of the present utility model and its modifications based on the present utility model. The present utility model is only limited by the claims and their full scope and equivalents.

Claims

1. A driving chip, the driving chip having two long sides arranged oppositely, and two short sides arranged oppositely and connected to the long sides, characterized in that, The driving chip includes: A first bypass pin, which is close to the short side and is arranged on the long side. A second bypass pin, which is arranged on the short side, and A gold finger pin, which is far from the second bypass pin and is arranged on the long side. Wherein, the first bypass pin is connected to the second bypass pin to form a signal transmission path.

2. The driving chip according to claim 1, wherein, The driving chip includes a relatively arranged first long side and a second long side, and a relatively arranged first short side and a second short side. The first bypass pin is arranged on the first long side, and the first bypass pin is used as the input end of the gate driving signal. The second bypass pin is arranged on the first short side, and the second bypass pin is used as the output end of the gate driving signal. On the side of the first long side far from the first short side, there is also the gold finger pin arranged.

3. The driving chip according to claim 1, wherein, At least one of the control signal and the gamma signal is output from the side of the long side far from the second bypass pin.

4. The driving chip according to claim 1, wherein The driving chip includes a first driving chip and a second driving chip. The power supply pin of the first driving chip is arranged on the short side on the left, and the second bypass pin on the first driving chip is arranged on the short side on the left. The power supply pin of the second driving chip is arranged on the short side on the right, and the second bypass pin on the second driving chip is arranged on the short side on the right.

5. The driving chip according to claim 1, wherein, There are multiple first bypass pins and multiple second bypass pins; the multiple first bypass pins respectively correspond to the multiple second bypass pins one by one to form multiple independent signal transmission paths. The multiple independent signal transmission paths respectively transmit the gate driving signal and at least one of the start signal, the clock signal and the voltage signal.

6. The driving chip according to claim 1, wherein The gold finger pin includes at least one first pin. The first pin is arranged on the long side on one side of the first bypass pin, and the first bypass pin is between the short side where the second bypass pin is located and the first pin. The first pin is configured as at least one of an analog power supply voltage terminal, a semi-analog voltage terminal and a ground terminal.

7. The driving chip according to claim 6, wherein, The first pin is electrically connected to an external printed circuit board. The connection position of the first pin and the external printed circuit board is on the side of the long side far from the second bypass pin.

8. The driving chip according to claim 1, wherein The gold finger pin includes at least one second pin. The second pin is arranged on at least one of the two long sides to transmit differential signals.

9. The driving chip according to claim 1, wherein, The gold finger pin includes at least one third pin. The third pin is arranged on at least one of the two long sides, and the third pin is configured as at least one of a backlight control signal terminal, a backlight current level detection terminal, a control signal terminal and a gamma input voltage terminal.

10. A display device, characterized in that, Includes: A printed circuit board; The driving chip according to any one of claims 1-9, and the first bypass pin of the driving chip is connected to the printed circuit board. And A display panel, which is connected to the second bypass pin of the driving chip. Wherein, the signal provided by the printed circuit board is provided to the display panel via the signal transmission path.

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