Startup and shutdown mute circuit meeting line output
Through the dual MOS tube circuit design, the problem of power-on impact sound when outputting the audio equipment is solved, and low-cost, simple circuit and lightweight silent effect is achieved.
Patent Information
- Application Number
- CN202422058860.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2034-08-23
AI Technical Summary
Existing audio equipment will produce impact sound when powered on when it is output online, and the silent circuit using relays has a high space, high cost and the risk of breaking the PCB.
The dual MOS tube circuit design is adopted, and the signal switching control is realized through the series branch of resistor and capacitor connection to the MOS tube, ensuring that there is no output when the cut-off state is low and there is an output when the conduction state is high.
It realizes a low-cost and simple circuit structure, reduces failure rate, reduces weight and PCB space, and avoids the sound of starting up impact.
Smart Images
Figure CN223124869U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a power-on and power-off mute circuit, in particular to a power-on and power-off mute circuit that meets line output. Background Art
[0002] At present, many audio systems have line output functions, but generally do not have mute circuits. When connected to the next device, a large impact sound will be generated on the next connected audio system during startup, and even the machine may be burned. There are also some devices that use relays as mute circuits, but they occupy a large space, have high costs, are heavy, and there is a risk of breaking the PCB. Summary of the Invention
[0003] The technical problem to be solved by the utility model is to provide a power-on and power-off mute circuit that meets line output, which has a simple circuit and low cost.
[0004] To solve the above technical problem, the technical solution of the utility model is: a power-on and power-off mute circuit that meets line output, including MOS transistors Q3A, Q3B, Q6A and Q6B. The gate of MOS transistor Q3A is sequentially connected to the gate of MOS transistor Q6A through resistor R306 and resistor R309. The gate of MOS transistor Q3B is sequentially connected to the gate of MOS transistor Q6B through resistor R307 and resistor R311. The source of MOS transistor Q3A is connected to the source of MOS transistor Q3B, and the source of MOS transistor Q6A is connected to the source of MOS transistor Q6B. A series branch of resistor R129 and resistor R128 and a series branch of capacitor C113 and capacitor C112 are provided between the drain of MOS transistor Q3B and the drain of MOS transistor Q6B. The signal input terminal MUTE_MIX is respectively connected between resistor R306 and resistor R309 and between resistor R307 and resistor R311. The drain of MOS transistor Q3B is connected to the first channel of the signal output terminal, and the drain of MOS transistor Q6B is connected to the second channel of the signal output terminal. The connection line between resistor R129 and resistor R128 is grounded, and the connection line between capacitor C113 and capacitor C112 is grounded. The principle of the utility model: during startup, the signal input terminal MUTE_MIX is at a low level, the MOS transistors are in the cut-off state, and there is no output at the signal output terminal; during operation, the signal input terminal MUTE_MIX is at a high level, the MOS transistors are in the conducting state, and there is an output at the signal output terminal.
[0005] As an improvement, the signal output terminal is a mixing output connector X9.
[0006] The beneficial effects brought by the utility model compared with the prior art are:
[0007] Using a dual-MOS transistor circuit design, it has low cost, a simple circuit, is easy to debug, has few faults, is light in weight, is easy to wire, and occupies less PCB space. Brief Description of the Drawings
[0008] Figure 1 This is the circuit schematic diagram of the present utility model. Detailed Description of the Preferred Embodiment
[0009] The present utility model will be further described below with reference to the accompanying drawings of the specification.
[0010] As Figure 1 shown, a power-on and power-off mute circuit that meets the line output includes MOS transistor Q3A, MOS transistor Q3B, MOS transistor Q6A, and MOS transistor Q6B. The gate of MOS transistor Q3A is connected to the gate of MOS transistor Q6A sequentially through resistor R306 and resistor R309. The gate of MOS transistor Q3B is connected to the gate of MOS transistor Q6B sequentially through resistor R307 and resistor R311. The source of MOS transistor Q3A is connected to the source of MOS transistor Q3B. The source of MOS transistor Q6A is connected to the source of MOS transistor Q6B. A series branch of resistor R129 and resistor R128 and a series branch of capacitor C113 and capacitor C112 are provided between the drain of MOS transistor Q3B and the drain of MOS transistor Q6B. The signal input terminal MUTE_MIX is respectively connected between resistor R306 and resistor R309 and between resistor R307 and resistor R311. The drain of MOS transistor Q3B is connected to the first channel of the signal output terminal. The drain of MOS transistor Q6B is connected to the second channel of the signal output terminal. The connection line between resistor R129 and resistor R128 is grounded. The connection line between capacitor C113 and capacitor C112 is grounded. The signal output terminal is the mixing output connector X9. Principle of the present utility model: When power is turned on, the signal input terminal MUTE_MIX is at a low level, the MOS transistors are in the cut-off state, and there is no output at the signal output terminal. During operation, the signal input terminal MUTE_MIX is at a high level, the MOS transistors are in the conducting state, and there is an output at the signal output terminal.
Claims
1. A power-on / off mute circuit for line output, characterized in that: It includes MOS transistor Q3A, MOS transistor Q3B, MOS transistor Q6A and MOS transistor Q6B. The gate of MOS transistor Q3A is connected to the gate of MOS transistor Q6A successively through resistor R306 and resistor R309. The gate of MOS transistor Q3B is connected to the gate of MOS transistor Q6B successively through resistor R307 and resistor R311. The source of MOS transistor Q3A is connected to the source of MOS transistor Q3B. The source of MOS transistor Q6A is connected to the source of MOS transistor Q6B. A series branch of resistor R129 and resistor R128 and a series branch of capacitor C113 and capacitor C112 are provided between the drain of MOS transistor Q3B and the drain of MOS transistor Q6B. The signal input terminal MUTE_MIX is respectively connected between resistor R306 and resistor R309 and between resistor R307 and resistor R311. The drain of MOS transistor Q3B is connected to the first channel of the signal output terminal. The drain of MOS transistor Q6B is connected to the second channel of the signal output terminal. The connection line between resistor R129 and resistor R128 is grounded. The connection line between capacitor C113 and capacitor C112 is grounded.
2. The power-on and power-off mute circuit that meets the line output according to claim 1, characterized in that: The signal output terminal is the mixing output connector X9.