MEMS pressure chip structure

By using silicon oxide pattern layer and groove body to form an island structure in the MEMS pressure chip, and connecting the second substrate through bonding to form a through hole, the problems of excessively large island structure and difficult to design in the prior art are solved, and chip reduction and design freedom are improved.

CN223134117UActive Publication Date: 2025-07-22NORTH ELECTRON RES INST ANHUI CO LTD
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Patent Information

Application Number
CN202422303808.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-21
Publication Date
2025-07-22
Estimated Expiration
2034-09-21

AI Technical Summary

Technical Problem

The island structure of the existing MEMS pressure chips is larger, resulting in a larger chip size, making it difficult to form beam and island structures of various shapes, and the structure size and thickness are not easy to design.

Method used

An island-shaped structure is formed at the bottom of the substrate using a silicon oxide pattern layer and a groove body, and the second substrate is bonded to form a through hole to achieve communication. The holes are divided into inverted trapezoidal and regular trapezoidal structures, and SOI wafers are used as substrate material.

Benefits of technology

The island structure on the back of the MEMS pressure chip is reduced, and the beam and island structures of various shapes can be formed, and the freedom of structural design is greatly improved.

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Abstract

The utility model provides an MEMS pressure chip structure, which comprises a first substrate (1), a silicon oxide pattern layer (1a), a first groove body (1b), a group of piezoresistors (3) and an upper oxide layer (1d) are arranged on the first substrate (1), metal leads (4) correspondingly matched with the piezoresistors (3) are arranged on the upper oxide layer (1d), a second substrate (5) is connected onto the silicon oxide pattern layer (1a), and the second substrate (5) is connected onto the second groove body (1b). A lower oxide layer (5c) is arranged on the bottom surface of the second substrate (5), and a through hole (5b) is formed in the second substrate (5). According to the utility model, the structure is simple, the manufacture is convenient, the size of the island structure on the back surface of the chip is reduced, the size of the chip is further reduced, meanwhile, beam and island structures in various shapes which are difficult to form by a conventional process can be formed by the preparation process, the size and the thickness of the structure can be freely designed, and the maximization of the degree of freedom of design is realized.
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Description

Technical Field

[0001] The utility model relates to the field of MEMS process manufacturing, and specifically relates to a MEMS pressure chip structure. Background Art

[0002] The pressure-sensitive element of a MEMS pressure sensor is a MEMS pressure chip. The MEMS pressure chip generally forms a flat film, island film or beam film structure on a silicon substrate through processes such as film formation, lithography and etching. Among them, for the flat film and island film structures, a surface patterned dielectric layer on the back of the wafer is used as an etching mask, and then the silicon substrate is etched with KOH or TMAH solution. The problem is that the island structure fabricated by the conventional process is relatively large, resulting in a relatively large chip size. It is difficult to form various-shaped beams and island structures through etching, and the size and thickness of the structure cannot be freely designed. Summary of the Utility Model

[0003] The purpose of this utility model is to overcome the deficiencies in the prior art and provide a MEMS pressure chip structure.

[0004] The present application provides the following technical solutions:

[0005] A MEMS pressure chip structure, characterized in that: it includes a first substrate, an oxide silicon pattern layer and a first groove are provided on the first substrate, an island structure is formed at the bottom of the first substrate through the oxide silicon pattern layer and the first groove, an upper oxide layer is provided on the upper surface of the first substrate, a group of piezoresistors are provided on the first substrate below the upper oxide layer, and metal leads corresponding to and cooperating with the piezoresistors are provided on the upper oxide layer; a second substrate is connected to the oxide silicon pattern layer, a lower oxide layer is provided on the bottom surface of the second substrate, and a through hole is provided on the second substrate, and the through hole and the first groove communicate with each other.

[0006] Based on the above technical solutions, the following further technical solutions may be available:

[0007] The through hole is divided into two vertically connected parts. The upper part is an upper hole section with an inverted trapezoidal cross-section, and the lower part is a lower hole section with a regular trapezoidal cross-section, and the height of the lower hole section is greater than the height of the upper hole section.

[0008] The first groove is an annular groove.

[0009] The center point of the island structure is on the same longitudinal straight line as the center points of the first substrate and the second substrate.

[0010] The first substrate and the second substrate are made of the same material, which is the top silicon part of an SOI wafer.

[0011] Advantages of the Utility Model

[0012] The structure of the utility model is simple and easy to manufacture, enabling the size of the back island structure of the MEMS pressure chip to be reduced by many times compared to the conventional process, and the chip size can also be significantly reduced. At the same time, this preparation process can also form beam and island structures of various shapes that are difficult to form by the conventional process, and the size and thickness of the structure can be freely designed, achieving the maximum design freedom. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic structural diagram of the utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0014] As Figure 1 shown, a MEMS pressure chip structure includes a first substrate 1. An oxide silicon pattern layer 1a and a first groove 1b are provided at the bottom of the first substrate 1. The first groove 1b is an annular groove, and an island structure 1c is formed at the bottom of the first substrate 1 through the oxide silicon pattern layer 1a and the first groove 1b.

[0015] An upper oxide layer 114 is provided on the upper surface of the first substrate 1, and a group of piezoresistors 3 are provided on the first substrate 1 below. The piezoresistor 3 includes a P+ region 3a and a P- region 3b with horizontal distribution of heavily doped boron. A part of the P- region 3b is located in the region above the first groove 1b.

[0016] Metal leads 4 are prepared on the upper oxide layer 114. The metal leads 4 are connected to the P+ region 3a of the heavily doped boron, thereby realizing the electrical connection between the metal leads 4 and the piezoresistor 112. The P+ region 3a is convenient for forming an ohmic contact with the metal leads and plays a good electrical connection role.

[0017] A second substrate 2 is connected to the oxide silicon pattern layer 1a by bonding. A lower oxide layer 2c is provided on the bottom surface of the second substrate 2, and a through hole 2b is provided on the second substrate 2. The through hole 2b is divided into two upper and lower connected parts. The upper part is an upper hole section a with an inverted trapezoidal cross-section, and the lower part is a lower hole section b with a regular trapezoidal cross-section, and the height of the lower hole section b is greater than the height of the upper hole section a.

[0018] The upper hole section a is opposite to the first groove 1b, so that the through hole 2b and the first groove 1b are in a mutually connected state.

[0019] The center point of the island structure 1c is on the same longitudinal straight line as the center points of the first substrate 1 and the second substrate 2.

[0020] The first substrate 1 and the second substrate 2 are made of the same material, which is the top silicon part of the SOI wafer.

Claims

1. A MEMS pressure chip structure, characterized in that: It includes a first substrate (1), on which a silicon oxide pattern layer (1a) and a first groove (1b) are provided. An island structure (1c) is formed at the bottom of the first substrate (1) through the silicon oxide pattern layer (1a) and the first groove (1b). An upper oxide layer (114) is provided on the upper surface of the first substrate (1). A group of varistors (3) are provided on the first substrate (1) below the upper oxide layer (114). Metal leads (4) corresponding to and cooperating with the varistors (3) are provided on the upper oxide layer (114). A second substrate (2) is connected to the silicon oxide pattern layer (1a). A lower oxide layer (2c) is provided on the bottom surface of the second substrate (2). A through hole (2b) is provided on the second substrate (2), and the through hole (2b) communicates with the first groove (1b).

2. The MEMS pressure chip structure according to claim 1, wherein: The through hole (2b) is divided into two vertically connected parts. The upper part is an upper hole section (a) with an inverted trapezoidal cross-section, and the lower part is a lower hole section (b) with a regular trapezoidal cross-section, and the height of the lower hole section (b) is greater than the height of the upper hole section (a).

3. The structure of a MEMS pressure chip according to claim 1, characterized in that: The first groove (1b) is an annular groove.

4. The structure of a MEMS pressure chip according to claim 1, characterized in that: The center point of the island structure (1c) is on the same longitudinal straight line as the center points of the first substrate (1) and the second substrate (2).

5. The structure of a MEMS pressure chip according to claim 1, wherein: The first substrate (1) and the second substrate (2) are made of the same material, which is the top silicon part of an SOI wafer.