Surge current protection circuit
Through the protection circuit composed of rectifier bridge D5 and MOS tubes Q1 and Q2, the gate voltage is limited by the thermistor RT1 and the voltage stabilizing capacitor C67, the circuit damage caused by inrush current is solved, and the circuit protection and stable power supply are achieved.
Patent Information
- Application Number
- CN202422335141.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2034-09-25
AI Technical Summary
In the prior art, inrush current will cause problems such as the input fuse burnout, the closing switch contact burnout, the overcurrent of the rectifier bridge and the circuit damage.
The protection circuit consisting of the rectifier bridge D5, MOS tube Q1 and MOS tube Q2 is adopted. The gate voltage of MOS tube Q1 is limited by the combination of the thermistor RT1 and the voltage stabilizing capacitor C67 to prevent inrush current from damaging the circuit.
Effectively protect the circuit from inrush current damage to ensure the normal operation of the circuit.
Smart Images
Figure CN223141513U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of surge protection, and particularly relates to a surge current protection circuit. Background Art
[0002] Surge current refers to the peak current flowing into a power supply device at the moment when the power supply is turned on. In the prior art, such a large surge current at the moment when the power supply is turned on can, in serious cases, often cause the input fuse to blow or the contacts of the closing switch to burn out, the rectifier bridge to be damaged by overcurrent, and the circuit to be damaged; in mild cases, it can also prevent the air switch from closing.
[0003] Therefore, it is necessary to invent a surge current protection circuit to solve the above problems. Summary of the Utility Model
[0004] In view of the above problems, the utility model provides a surge current protection circuit to solve the problems raised in the above background art.
[0005] To achieve the above object, the utility model provides the following technical solution: A surge current protection circuit includes a rectifier bridge D5, an MOS transistor Q1, and an MOS transistor Q2. The pin 1 of the rectifier bridge D5 is connected to the drain of the MOS transistor Q1 through a capacitor C67. The source of the MOS transistor Q1 is grounded. The gate of the MOS transistor Q1 is connected to the drain of the MOS transistor Q2. The source of the MOS transistor Q2 is grounded. The gate of the MOS transistor Q2 outputs a power supply of 3.3V through a resistor R39. The source of the MOS transistor Q1 is also connected to the pin 2 of the rectifier bridge D5. A thermistor RT1 is connected between the drain and the source of the MOS transistor Q1.
[0006] Further, both the MOS transistor Q1 and the MOS transistor Q2 are set as N-type MOS transistors.
[0007] Further, a voltage stabilizing capacitor C35 is connected between the gate and the source of the MOS transistor Q1.
[0008] Further, the pin 1 of the rectifier bridge D5 outputs a power supply voltage VBUS.
[0009] Further, the gate of the MOS transistor Q2 is connected to an overvoltage relay through a circuit R38.
[0010] Further, the MOS transistor Q2, the resistor R38, and the overvoltage relay form a protection circuit.
[0011] Further, the drain of the MOS transistor Q2 is connected to an input voltage of 15V through a resistor R18.
[0012] The technical effects and advantages of the utility model:
[0013] 1. When the MOS transistor Q2 is conducting normally in this utility model, the protection circuit restricts the gate of the MOS transistor Q1 until the gate voltage of the MOS transistor Q1 is the same as the voltage when the MOS transistor Q2 conducts, and then the MOS transistor Q1 conducts normally, which can protect the entire circuit and avoid damage to the entire circuit caused by inrush current. Description of the Drawings
[0014] Figure 1 It is the overall diagram of the inrush current protection circuit of the embodiment of this utility model. Detailed Implementation Manner
[0015] To make the objectives, technical solutions and advantages of the embodiments of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below in conjunction with the embodiments.
[0016] This utility model provides an inrush current protection circuit, as Figure 1 shown, which includes a rectifier bridge D5, a MOS transistor Q1 and a MOS transistor Q2. The pin 1 of the rectifier bridge D5 is connected to the drain of the MOS transistor Q1 through a capacitor C67. The source of the MOS transistor Q1 is grounded. The gate of the MOS transistor Q1 is connected to the drain of the MOS transistor Q2. The source of the MOS transistor Q2 is grounded. The gate of the MOS transistor Q2 outputs a power supply voltage of 3.3V through a resistor R39. The source of the MOS transistor Q1 is also connected to the pin 2 of the rectifier bridge D5. A thermistor RT1 is connected between the drain and source of the MOS transistor Q1. The voltage converted by the rectifier bridge D5 supplies power to the subsequent circuit. At the moment when the entire circuit is turned on, the current output from the rectifier bridge D5 charges the capacitor C67 and suppresses the inrush current through the temperature-resistance characteristic of the thermistor RT1. Due to the voltage-dividing effect of the thermistor RT1, the gate voltage of the MOS transistor Q1 rises slowly at this time. During the charging process of the capacitor C67, the drain and source of the MOS transistor Q1 are in the off state until the gate voltage of the MOS transistor Q1 is the same as the voltage output by the rectifier bridge D5, and then the MOS transistor Q1 conducts, and the power supply circuit works normally.
[0017] Among them, both the MOS transistor Q1 and the MOS transistor Q2 are set as N-type MOS transistors. A voltage stabilizing capacitor C35 is connected between the gate and source of the MOS transistor Q1.
[0018] In Figure 1 , the pin 1 of the rectifier bridge D5 outputs a power supply voltage VBUS. When the MOS transistor Q1 conducts, the entire power supply circuit stably outputs the power supply voltage VBUS.
[0019] In Figure 1In it, the gate of the MOS transistor Q2 is connected to an overvoltage relay through the circuit R38. The MOS transistor Q2, the resistor R38, and the overvoltage relay form a protection circuit. When the input voltage of 15V supplies power to the drain of the MOS transistor Q2 through the resistor R18, the overvoltage relay adjusts the voltage output to the gate of the MOS transistor Q2 through the resistor R38 to prevent the voltage passing through the MOS transistor Q2 from being too large until the gate of the MOS transistor Q2 outputs the power supply of 3.3V.
[0020] When the MOS transistor Q2 conducts normally, the protection circuit restricts the gate of the MOS transistor Q1 until the gate voltage of the MOS transistor Q1 is the same as the voltage at which the MOS transistor Q2 conducts, and then the MOS transistor Q1 conducts normally, which can protect the entire circuit.
[0021] The working principle of the present utility model:
[0022] Refer to Figure 1 As shown, due to the voltage division effect of the thermistor RT1, the gate voltage of the MOS transistor Q1 rises slowly at this time. During the charging process of the capacitor C67, the drain and source of the MOS transistor Q1 are in the off state until the gate voltage of the MOS transistor Q1 is the same as the voltage output by the rectifier bridge D5, and then the MOS transistor Q1 conducts and the power supply circuit works normally.
[0023] When the input voltage of 15V supplies power to the drain of the MOS transistor Q2 through the resistor R18, the overvoltage relay adjusts the voltage output to the gate of the MOS transistor Q2 through the resistor R38 to prevent the voltage passing through the MOS transistor Q2 from being too large until the gate of the MOS transistor Q2 outputs the power supply of 3.3V.
[0024] When the MOS transistor Q2 conducts normally, the protection circuit restricts the gate of the MOS transistor Q1 until the gate voltage of the MOS transistor Q1 is the same as the voltage at which the MOS transistor Q2 conducts, and then the MOS transistor Q1 conducts normally, which can protect the entire circuit and avoid damage to the entire circuit caused by inrush current.
[0025] The above embodiments are only used to illustrate the technical solutions of the present utility model, rather than to limit it.
Claims
1. A surge current protection circuit, characterized in that: It includes a rectifier bridge D5, an MOS transistor Q1 and an MOS transistor Q2. Pin 1 of the rectifier bridge D5 is connected to the drain of the MOS transistor Q1 through a capacitor C67. The source of the MOS transistor Q1 is grounded. The gate of the MOS transistor Q1 is connected to the drain of the MOS transistor Q2. The source of the MOS transistor Q2 is grounded. The gate of the MOS transistor Q2 outputs a power supply of 3.3V through a resistor R39. The source of the MOS transistor Q1 is also connected to pin 2 of the rectifier bridge D5. A thermistor RT1 is connected between the drain and the source of the MOS transistor Q1.
2. The inrush current protection circuit according to claim 1, wherein: Both the MOS transistor Q1 and the MOS transistor Q2 are set as N-type MOS transistors.
3. The inrush current protection circuit according to claim 1, wherein: A voltage stabilizing capacitor C35 is connected between the gate and the source of the MOS transistor Q1.
4. The inrush current protection circuit according to claim 1, wherein: Pin 1 of the rectifier bridge D5 outputs a supply voltage VBUS.
5. The inrush current protection circuit according to claim 1, wherein: The gate of the MOS transistor Q2 is electrically Resistance connected to the overvoltage relay through R38.
6. The inrush current protection circuit according to claim 5, wherein: The MOS transistor Q2, the resistor R38 and the overvoltage relay form a protection circuit.
7. The inrush current protection circuit according to claim 6, wherein: The drain of the MOS transistor Q2 is connected to an input voltage of 15V through a resistor R18.