Image acquisition and processing module

Abstract

The utility model discloses an image acquisition and processing module, belongs to the technical field of image processing, and solves the problem that the image acquisition and processing module is required to give consideration to both a wired transmission mode and a wireless transmission mode because the wireless transmission mode is not influenced by orientation and distance. Comprising an image sensor used for collecting an image and outputting an image signal; the data temporary storage is used for temporarily storing the processed image signal; the input end of the FPGA chip is coupled with the output end of the image sensor, the FPGA chip is coupled with the data register, and the FPGA chip receives the image signal and processes and accesses the image signal; and the comparison circuit is coupled with the FPGA chip. According to the utility model, the image sensor captures an image, and after the FPGA processes the image, the analog-to-digital converter converts a signal for the comparator to compare with a reference. And the microcontroller controls data to be transmitted through a wired or wireless module according to a result, so that effective transmission of image data is ensured, and images with different memory sizes are flexibly adapted.

Description

Technical Field

[0001] The utility model relates to the technical field of image processing, in particular to an image acquisition and processing module. Background Art

[0002] An image acquisition and processing module is a specially designed electronic system for capturing, processing, and converting visual image data. This module usually consists of a high-resolution image sensor (such as a CCD or CMOS sensor), which can convert optical signals into electrical signals, and an analog-to-digital converter (ADC) to convert the analog signals into digital signals. Subsequently, the digital signals are transmitted to a built-in processor or microcontroller for further processing, such as denoising, sharpening, color correction, and compression.

[0003] In the actual application process, the processed pictures will be transmitted externally in a wired or wireless manner. The wired transmission method has less data loss, and the clarity of the finally transmitted pictures remains relatively high. The wireless transmission method is suitable for pictures with small memory. For high-definition and large-memory pictures, data loss and distortion may occur during wireless transmission. Therefore, most of these pictures use the wired transmission method for transmission. Of course, the wired transmission can also properly transmit pictures with poor clarity and small memory. However, the wireless transmission method is not affected by orientation and distance. Therefore, the image acquisition and processing module needs to take into account both the wired and wireless transmission methods.

[0004] Therefore, an image acquisition and processing module is proposed to solve or alleviate the above problems. Content of the Utility Model

[0005] The purpose of the utility model is to solve the shortcomings existing in the prior art, and to propose an image acquisition and processing module.

[0006] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0007] An image acquisition and processing module, comprising

[0008] An image sensor for collecting images and outputting image signals externally;

[0009] A data register for temporarily storing the processed image signals;

[0010] An FPGA chip, whose input end is coupled to the output end of the image sensor, is coupled to the data register, and receives and processes and stores the image signals;

[0011] A comparison circuit, which is coupled to an FPGA chip. The comparison circuit extracts the processed image signal from the data register through the FPGA chip and outputs a control signal by comparing the magnitudes.

[0012] A wired interface, the input end of which is coupled to the output end of the FPGA chip, and is used for transmitting data externally in a wired manner.

[0013] A wireless module, the input end of which is coupled to the output end of the FPGA chip, and is used for transmitting data externally in a wireless manner.

[0014] A switching circuit, which is connected between the output end of the FPGA chip, the input end of the wired interface, and the input end of the wireless module, and responds to the control signal to switch either the wired interface or the wireless module to maintain a connection with the output end of the FPGA chip.

[0015] Preferably, the comparison circuit includes

[0016] An analog-to-digital converter, the input end of which is coupled to the output end of the FPGA chip, and converts the image signal read from the data register through the FPGA chip into an analog electrical signal.

[0017] An analog comparator, the input end of which is coupled to the output end of the analog-to-digital converter, and outputs a comparison signal in response to the analog electrical signal and after the analog electrical signal is greater than the reference signal therein.

[0018] A microcontroller, the input end of which is coupled to the output end of the analog comparator, the output end of which is coupled to the input end of the switching circuit, and the microcontroller outputs a control signal in response to the comparison signal.

[0019] Preferably, the switching circuit includes a triode switch, a relay, and a relay switch. The base of the triode switch is coupled to the output end of the microcontroller, the collector of the triode switch is connected to the relay and then to the power supply, the emitter of the triode switch is grounded, the wired interface and the wireless module are connected in parallel, and the connection points of both with the FPGA chip are connected through the relay switch.

[0020] Preferably, the analog-to-digital converter is an ADC0808 chip, and the data register is a 74HC595 register.

[0021] Preferably, the analog comparator includes an LM393 comparator and a variable resistor. The negative input terminal of the LM393 comparator is coupled to the output end of the analog-to-digital converter, and the positive input terminal of the LM393 comparator is connected to the variable resistor and then to the power supply.

[0022] Preferably, the microcontroller is an STM32 chip.

[0023] The utility model has the following beneficial effects:

[0024] In the utility model, an image sensor captures an image. After being processed by an FPGA, the signal is converted by an analog-to-digital converter for comparison with a reference by a comparator. The microcontroller controls the data to be transmitted through a wired or wireless module according to the result, ensuring the effective transmission of image data and flexibly adapting to images of different memory sizes. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following will briefly introduce the drawings required for the embodiments. It should be understood that the following drawings only show some embodiments of the present utility model, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0026] Figure 1 is the structural block diagram of the present utility model;

[0027] Figure 2 is the wiring diagram of the analog-to-digital converter in the present utility model;

[0028] Figure 3 is the wiring diagram of the analog comparator in the present utility model;

[0029] Figure 4 is the wiring diagram of the switching circuit in the present utility model.

[0030] 1. Image sensor; 2. FPGA chip; 3. Analog-to-digital converter; 4. Data register; 5. Microcontroller; 6. Analog comparator; 7. Switching circuit; 8. Wired interface; 9. Wireless module. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] In order to make the objectives, technical solutions and advantages of the embodiments of the present utility model clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present utility model with reference to the drawings in the embodiments of the present utility model. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model. Usually, the components of the embodiments of the present utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0032] Therefore, the following detailed description of the embodiments of the present utility model provided in the drawings is not intended to limit the scope of the claimed present utility model, but merely represents the selected embodiments of the present utility model. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present utility model.

[0033] It should be noted that like reference numerals and letters indicate like items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0034] In the description of the present utility model, it should be understood that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present utility model is customarily placed during use, or the orientation or positional relationship commonly understood by those skilled in the art. It is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present utility model.

[0035] In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0036] In the description of the present utility model, it should also be noted that unless otherwise clearly specified and defined, the terms "set", "installed", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0037] An image acquisition and processing module, as Figure 1 shown, includes an image sensor 1, a data buffer 4, an FPGA chip 2, a comparison circuit, a wired interface 8, a wireless module 9, and a switching circuit 7.

[0038] The image sensor 1 is used to collect images and output image signals externally. The data register 4 is used to temporarily store the processed image signals. The data register 4 is a 74HC595 register. The input end of the FPGA chip 2 is coupled to the output end of the image sensor 1, and it is coupled to the data register 4. It receives the image signals and processes, stores, and accesses the image signals. The comparison circuit is coupled to the FPGA chip 2. The comparison circuit extracts the processed image signals in the data register 4 through the FPGA chip 2, compares their magnitudes, and outputs control signals. The input end of the wired interface 8 is coupled to the output end of the FPGA chip 2, and it is used to transmit data externally in a wired manner. The input end of the wireless module 9 is coupled to the output end of the FPGA chip 2, and it is used to transmit data externally in a wireless manner. The switching circuit 7 is connected between the output end of the FPGA chip 2, the input end of the wired interface 8, and the input end of the wireless module 9. It responds to the control signal to switch either the wired interface 8 or the wireless module 9 to maintain a connection with the output end of the FPGA chip 2.

[0039] As Figure 1 shown, the comparison circuit includes an analog-to-digital converter, an analog comparator 6, and a microcontroller 5. As Figure 2 shown, the analog-to-digital converter 3 is an ADC0808 chip, and the microcontroller 5 is an STM32 chip. As Figure 4 shown, the analog comparator 6 includes an LM393 comparator and a variable resistor. The negative input terminal of the LM393 comparator is coupled to the output end of the analog-to-digital converter 3, and the positive input terminal of the LM393 comparator is connected to the variable resistor and then connected to the power supply for setting.

[0040] The input end of the analog-to-digital converter is coupled to the output end of the FPGA chip 2. It converts the image signals read from the data register 4 through the FPGA chip 2 into analog electrical signals. The input end of the analog comparator 6 is coupled to the output end of the analog-to-digital converter. It responds to the analog electrical signals and outputs a comparison signal after the analog electrical signals are greater than the reference signals therein. The input end of the microcontroller 5 is coupled to the output end of the analog comparator 6, and the output end of the microcontroller 5 is coupled to the input end of the switching circuit 7. The microcontroller 5 outputs a control signal in response to the comparison signal.

[0041] In addition, as Figure 4 shown, the switching circuit 7 includes a triode switch, a relay, and a relay switch. The base of the triode switch is coupled to the output end of the microcontroller 5. The collector of the triode switch is connected to the relay and then connected to the power supply. The emitter of the triode switch is grounded. The wired interface 8 and the wireless module 9 are arranged in parallel, and their connection points with the FPGA chip 2 are connected through the relay switch.

[0042] When the utility model is actually used, the image sensor 1 first captures a scene image and converts it into an electrical signal. Then these signals are transmitted to the data register 4 for temporary storage. The FPGA chip 2 receives these temporarily stored image signals and performs image processing tasks such as denoising and sharpening. The processed image signals are then sent to the analog-to-digital converter and converted into analog signals for use by the comparison circuit. The analog comparator 6 compares the converted analog signal with a preset reference signal. If the analog signal exceeds the reference, a comparison signal is output to the microcontroller 5. The microcontroller 5 evaluates the result based on this signal and generates a control signal to determine the data transmission method. The switching circuit 7 responds to the control signal of the microcontroller 5 and switches the output of the FPGA to the wired interface 8 or the wireless module 9 through a triode switch and a relay mechanism, thereby realizing the wired or wireless transmission of data. In this way, the system can flexibly, according to the comparison result between the processed image signal and the reference, when the image memory is small, only use the wireless module 9 to transmit data. During this process, the image is not prone to data loss and can maintain its original state. When encountering an image with a large memory, it will be adjusted to use the wired interface 8 to transmit data, thereby ensuring the data validity during image transmission. Under normal circumstances, generally the wireless module 9 is mainly used, so that the data transmission is not restricted by the environment and distance. By choosing the most suitable data transmission method in this way, the effective transmission of data is ensured.

[0043] The above are only the preferred embodiments of the present utility model and are not used to limit the present utility model. For those skilled in the art, the present utility model can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. An image acquisition and processing module, characterized in that including an image sensor (1) for collecting an image and outputting an image signal externally; a data register (4) for temporarily storing the processed image signal; an FPGA chip (2), whose input end is coupled to the output end of the image sensor (1), is coupled to the data register (4), and receives the image signal and processes and accesses the image signal; a comparison circuit, which is coupled to the FPGA chip (2), and the comparison circuit extracts the processed image signal in the data register (4) through the FPGA chip (2) and compares the magnitudes to output a control signal; a wired interface (8), the input end of the wired interface (8) is coupled to the output end of the FPGA chip (2), and it is used to transmit data externally in a wired manner; a wireless module (9), the input end of the wireless module (9) is coupled to the output end of the FPGA chip (2), and it is used to transmit data externally in a wireless manner; a switching circuit (7) connected between the output end of the FPGA chip (2), the input end of the wired interface (8), and the input end of the wireless module (9), and it switches either the wired interface (8) or the wireless module (9) to keep a path with the output end of the FPGA chip (2) in response to the control signal.

2. The image acquisition and processing module according to claim 1, characterized in that, The comparison circuit includes a digital-to-analog converter (3), whose input end is coupled to the output end of the FPGA chip (2), and it converts the image signal read from the data register (4) through the FPGA chip (2) into an analog electrical signal; an analog comparator (6), whose input end is coupled to the output end of the digital-to-analog converter (3), and it outputs a comparison signal in response to the analog electrical signal and after the analog electrical signal is greater than the reference signal therein; a microcontroller (5), the input end of the microcontroller (5) is coupled to the output end of the analog comparator (6), the output end of the microcontroller (5) is coupled to the input end of the switching circuit (7), and the microcontroller (5) outputs a control signal in response to the comparison signal.

3. The image acquisition and processing module according to claim 2, wherein The switching circuit (7) includes a triode switch, a relay, and a relay switch. The base of the triode switch is coupled to the output end of the microcontroller (5), the collector of the triode switch is connected to the relay and then powered, the emitter of the triode switch is grounded, the wired interface (8) and the wireless module (9) are arranged in parallel, and their connection points with the FPGA chip (2) are connected through the relay switch.

4. The image acquisition and processing module according to claim 2, wherein The digital-to-analog converter (3) is an ADC0808 chip, and the data register (4) is a 74HC595 register.

5. The image acquisition and processing module according to claim 2, characterized in that The analog comparator (6) includes an LM393 comparator and an adjustable resistor. The negative input terminal of the LM393 comparator is coupled to the output end of the digital-to-analog converter (3), and the positive input terminal of the LM393 comparator is connected to the adjustable resistor and then powered.

6. The image acquisition and processing module according to claim 2, wherein The microcontroller (5) is an STM32 chip.

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