Signal detection circuit

Abstract

The utility model provides a signal detection circuit, which comprises a power supply module, a voltage upper limit regulation and control unit, a voltage lower limit regulation and control unit, a power supply detection lamp, a first regulation and control switch and a second regulation and control switch, the second regulation and control switch comprises a second regulation and control end, a third conduction end and a fourth conduction end, the first regulation and control end is used for controlling on-off of the first conduction end and the second conduction end, and the second regulation and control end is used for controlling on-off of the third conduction end and the fourth conduction end; the first conduction end, the second conduction end, the third conduction end and the fourth conduction end of the power supply detection lamp are connected in series between the power supply module and the grounding end of the signal detection circuit; the first regulation and control end of the first regulation and control switch is electrically connected with the voltage lower limit regulation and control unit, and the second regulation and control end of the second regulation and control switch is electrically connected with the voltage upper limit regulation and control unit. According to the utility model, the mainboard detection cost can be effectively reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, in particular to a signal detection circuit. Background Art

[0002] The main board is the core circuit board of a computer and plays an extremely important role in the computer. Therefore, when the main board fails, maintenance is also a very crucial maintenance task. How to repair the circuit in a short time is also an index to improve the maintenance efficiency.

[0003] However, the existing circuit on the main board for self-checking and maintenance purposes is only a power supply self-checking circuit. However, the existing power supply self-checking circuit has a complex structure, increasing the cost of main board detection. Summary of the Utility Model

[0004] To solve the above problems, the signal detection circuit provided by the utility model can perform power supply detection on the circuit board to be tested by setting a power supply module, a power logic judgment module and a power failure display module in the signal detection circuit. The structure is simple and can effectively reduce the cost of main board detection.

[0005] The utility model provides a signal detection circuit, which includes: a power supply module, a power logic judgment module and a power failure display module;

[0006] The power logic judgment module includes: a voltage upper limit regulation unit and a voltage lower limit regulation unit. The power failure display module includes: a power supply detection lamp, a first regulation switch and a second regulation switch. The first regulation switch includes: a first regulation end, a first conduction end and a second conduction end. The second regulation switch includes: a second regulation end, a third conduction end and a fourth conduction end. The second regulation end is used to control the on-off of the first conduction end and the second conduction end. The first regulation end is used to control the on-off of the third conduction end and the fourth conduction end;

[0007] Both the voltage upper limit regulation unit and the voltage lower limit regulation unit are electrically connected to the power supply terminal to be measured of the circuit board to be measured. The power supply detection lamp, the first conduction end and the second conduction end, and the third conduction end and the fourth conduction end are connected in series between the power supply module and the grounding end of the signal detection circuit;

[0008] The first regulation end of the first regulation switch is electrically connected to the voltage lower limit regulation unit, and the second regulation end of the second regulation switch is electrically connected to the voltage upper limit regulation unit;

[0009] When the voltage provided by the power supply terminal to be measured is higher than the lower limit operating voltage, the voltage lower limit regulation unit controls the first conduction end and the second conduction end to conduct through the first regulation end;

[0010] When the voltage provided by the measured power supply terminal is higher than the upper limit operating voltage, the voltage upper limit control unit controls the third conduction terminal and the fourth conduction terminal to be disconnected through the second control terminal;

[0011] The lower limit operating voltage and the upper limit operating voltage are respectively the minimum value and the maximum value of the measured power supply terminal under normal power supply.

[0012] Optionally, the upper limit control terminal of the voltage upper limit control unit and the lower limit control terminal of the voltage lower limit control unit are both electrically connected to the measured power supply terminal;

[0013] The first upper limit conduction terminal of the voltage upper limit control unit and the first lower limit conduction terminal of the voltage lower limit control unit are both electrically connected to the power supply module;

[0014] The second upper limit conduction terminal of the voltage upper limit control unit is electrically connected to the first control terminal, and the second lower limit conduction terminal of the voltage lower limit control unit is electrically connected to the second control terminal;

[0015] The lower limit control terminal is used to control the first lower limit conduction terminal and the second lower limit conduction terminal to conduct when the voltage provided by the measured power supply terminal is higher than the lower limit operating voltage;

[0016] The upper limit control terminal is used to control the first upper limit conduction terminal and the second upper limit conduction terminal to conduct when the voltage provided by the measured power supply terminal is higher than the upper limit operating voltage;

[0017] The first control terminal conducts the first conduction terminal and the second conduction terminal when electrically connected to the power supply module;

[0018] The second control terminal disconnects the third conduction terminal and the fourth conduction terminal when electrically connected to the power supply module.

[0019] Optionally, the voltage lower limit control unit includes: a first voltage dividing resistor sub-unit and a lower limit control device;

[0020] The lower limit control device includes: a lower limit control terminal, a first lower limit conduction terminal, and a second lower limit conduction terminal;

[0021] The first voltage dividing resistor sub-unit is respectively electrically connected to the lower limit control terminal and the measured power supply terminal. The first voltage dividing resistor sub-unit can convert the lower limit operating voltage provided by the measured power supply terminal into a lower limit reference voltage and provide it to the lower limit control terminal; the lower limit control device is used to connect the first lower limit conduction terminal and the second lower limit conduction terminal when the voltage at the lower limit control terminal is equal to or higher than the lower limit reference voltage;

[0022] The voltage upper limit control unit includes: a second voltage dividing resistor sub-unit and an upper limit control device;

[0023] The upper limit control device includes: an upper limit control terminal, a first upper limit conduction terminal, and a second upper limit conduction terminal;

[0024] The second voltage-dividing resistor sub-unit is electrically connected to the upper limit control terminal and the power supply terminal under test respectively. The second voltage-dividing resistor sub-unit can convert the upper limit operating voltage provided by the power supply terminal under test into an upper limit reference voltage and supply it to the upper limit control terminal; the upper limit control device is used to connect the first upper limit conduction terminal and the second upper limit conduction terminal when the voltage at the upper limit control terminal is equal to or higher than the upper limit reference voltage.

[0025] Optionally, the signal detection circuit further includes: an interface connector;

[0026] The power supply logic judgment module is electrically connected to the interface connector, and the interface connector is used to be electrically connected to the power supply terminal under test.

[0027] Optionally, the signal detection circuit further includes: a function signal logic judgment module and a function signal fault display module;

[0028] The function signal logic judgment module is electrically connected to the interface connector, and the function signal fault display module is electrically connected to the function signal logic judgment module;

[0029] The interface connector is further used to be electrically connected to at least one function signal interface on the circuit board under test, so that the function signal logic judgment module can judge whether the function signals provided by at least one function signal interface are abnormal;

[0030] The function signal fault display module is used to display the judgment result of the function signal logic judgment module.

[0031] Optionally, the function signal fault display module further includes at least one first-level indicator light and at least one first-level control device. The first-level indicator lights and the function signal interfaces are in one-to-one correspondence with the first-level control devices, and the function signal logic judgment module is in one-to-one correspondence with at least one first-level indicator light;

[0032] Each first-level control device includes: a third control terminal, a fifth conduction terminal and a sixth conduction terminal. The third control terminal is used to control the on-off of the fifth conduction terminal and the sixth conduction terminal. The fifth conduction terminal and the sixth conduction terminal on each first-level control device are connected in series between the power supply module and the grounding terminal of the signal detection circuit with the corresponding first-level indicator light;

[0033] The third control terminal on each first-level control device is electrically connected to the corresponding function signal interface, and the third control terminal controls the corresponding fifth conduction terminal and sixth conduction terminal to disconnect when the function signal sent by the corresponding function signal interface is abnormal.

[0034] Optionally, the function signal fault display module further includes at least one second-level indicator light and at least one second-level control device;

[0035] The function signal logic judgment module further includes: at least one first-level AND gate logic unit, the first-level AND gate logic units correspond one-to-one with the second-level control devices, and the second-level control devices correspond one-to-one with the second-level indicator lights;

[0036] Each first-level AND gate logic unit includes: at least one first-level input terminal and one first-level output terminal. The first-level input terminals on the same first-level AND gate logic unit are used to be electrically connected to different function signal interfaces of the same type. The first-level AND gate logic unit is used to output a first-level conduction signal through the first-level output terminal when the function signals at the first-level input terminals are all normal;

[0037] Each second-level control device includes: a fourth control terminal, a seventh conduction terminal, and an eighth conduction terminal. The fourth control terminal is electrically connected to the corresponding first-level output terminal, and the fourth control terminal is used to control the seventh conduction terminal and the eighth conduction terminal to conduct when the first-level output terminal outputs a first-level conduction signal;

[0038] The seventh conduction terminal and the eighth conduction terminal on each second-level control device are connected in series with the corresponding second-level indicator light between the power supply module and the ground terminal of the signal detection circuit.

[0039] Optionally, the function signal fault display module further includes at least one third-level indicator light and at least one third-level control device;

[0040] The function signal logic judgment module further includes: at least one second-level AND gate logic unit;

[0041] The second-level AND gate logic unit includes: at least one second-level input terminal and one second-level output terminal. The second-level input terminals correspond one-to-one with the first-level AND gate logic units, and each second-level input terminal is electrically connected to a first-level output terminal respectively. The second-level AND gate logic unit is used to output a second-level conduction signal through the second-level output terminal when the function signals at the second-level input terminals are all normal;

[0042] The third-level control device includes: a fifth control terminal, a ninth conduction terminal, and a tenth conduction terminal. The fifth control terminal is electrically connected to the corresponding second-level output terminal, and the fifth control terminal is used to control the ninth conduction terminal and the tenth conduction terminal to conduct when the corresponding output terminal outputs a second-level conduction signal;

[0043] The ninth conduction terminal and the tenth conduction terminal are connected in series with the corresponding third-level indicator light between the power supply module and the ground terminal of the signal detection circuit.

[0044] Optionally, the signal detection circuit further includes: an isolation module;

[0045] The function signal logic judgment module is electrically connected to the interface connector through the isolation module;

[0046] The isolation module is used to prevent the signals on the signal detection circuit from being fed back to the circuit board under test.

[0047] Optionally, the isolation module includes: a unidirectional conduction unit and a pull-up resistor;

[0048] The unidirectional conduction unit includes: a touch terminal, a positive connection terminal, and a negative connection terminal;

[0049] One end of the touch terminal and the pull-up resistor are both electrically connected to the power supply module, the other end of the pull-up resistor is electrically connected to the positive connection terminal, and the negative connection terminal is electrically connected to the interface connector;

[0050] The touch terminal is configured to unidirectionally conduct the positive connection terminal and the negative connection terminal when a low-level signal is received at the negative connection terminal, so that the low-level signal is transmitted to the positive connection terminal through the negative connection terminal.

[0051] The signal detection circuit provided by the embodiment of the present invention has a simple structure. By setting a power supply module, a power logic judgment module, and a power failure display module in the signal detection circuit, the power supply terminal to be measured of the circuit board to be measured can be detected. Among them, when the power logic judgment module determines that the voltage provided by the power supply terminal to be measured is higher than the upper limit operating voltage or lower than the lower limit operating voltage, the power logic judgment module will control the circuit where the power detection lamp is located to remain in an open state, so that the power detection lamp remains off; when the power logic judgment module determines that the voltage provided by the power supply terminal to be measured is between the upper limit operating voltage and the lower limit operating voltage, the power logic judgment module will control the circuit where the power detection lamp is located to remain in a connected state, so that the power detection lamp remains on. In this way, whether the power supply terminal to be measured is supplying power normally can be quickly judged through the on and off of the power detection lamp, effectively reducing the cost of motherboard detection. Description of the Drawings

[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0053] Figure 1 It is a schematic circuit diagram of a signal detection circuit according to an embodiment of the present application;

[0054] Figure 2 It is a schematic circuit diagram of the circuit for detecting the power supply terminal VCC3.3 to be measured in the power logic judgment module and the power failure display module according to an embodiment of the present application;

[0055] Figure 3 It is a schematic circuit diagram of the circuit for detecting the power supply terminal VCC5 to be measured in the power logic judgment module and the power failure display module according to an embodiment of the present application;

[0056] Figure 4 Schematic circuit diagram of the circuit for detecting the power supply terminal VCC12 to be measured in the power supply logic judgment module and the power supply fault display module of an embodiment of the present application;

[0057] Figures 5 to 7 Schematic circuit diagrams of the partial structures of the interface connector of an embodiment of the present application respectively;

[0058] Figure 8 Schematic circuit diagram of an isolation module of an embodiment of the present application;

[0059] Figure 9 Schematic circuit diagram of the first-level indicator light and the first-level control device of an embodiment of the present application;

[0060] Figure 10 Schematic circuit diagram of the second-level indicator light and the second-level control device of an embodiment of the present application;

[0061] Figure 11 and Figure 12 Schematic circuit diagrams of two different first-level AND gate logic units of an embodiment of the present application respectively;

[0062] Figure 13 Schematic circuit diagram of the third-level indicator light and the third-level control device of an embodiment of the present application;

[0063] Figure 14 Schematic circuit diagram of the second-level AND gate logic unit of an embodiment of the present application.

[0064] Reference numerals:

[0065] 1. Power supply logic judgment module; 11. Voltage upper limit control unit; 111. Second voltage dividing resistor sub-unit; 112. Upper limit control device; 12. Voltage lower limit control unit; 121. First voltage dividing resistor sub-unit; 122. Lower limit control device; 2. Power supply fault display module; 21. Power supply detection lamp; 22. First control switch; 23. Second control switch; 3. Interface connector; 4. Function signal logic judgment module; 41. First-level AND gate logic unit; 42. Second-level AND gate logic unit; 5. Function signal fault display module; 51. First-level indicator light; 52. First-level control device; 53. Second-level indicator light; 54. Second-level control device; 55. Third-level indicator light; 56. Third-level control device; 6. Isolation module; 61. Unidirectional conduction unit; 62. Pull-up resistor; 7. Logic judgment circuit combination module; 8. Display circuit combination module; 9. Carrier. Detailed implementation manners

[0066] To facilitate the understanding of this application, the following will provide a more comprehensive description of this application with reference to the relevant drawings. Embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of this application more thorough and comprehensive.

[0067] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0068] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" or "having" etc. specify the presence of the stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.

[0069] In a first aspect, an embodiment of the present utility model provides a signal detection circuit. Refer to Figure 1 , the signal detection circuit includes: a power supply module, a logic judgment circuit combination module 7, and a display circuit combination module 8. The logic judgment circuit combination module 7 includes: a power supply logic judgment module 1, and the display circuit combination module 8 includes a power supply fault display module 2.

[0070] Combined with Figures 2 to 4 , the power supply logic judgment module 1 includes: a voltage upper limit regulation unit 11 and a voltage lower limit regulation unit 12, and the power supply fault display module 2 includes: a power supply detection lamp 21, a first regulation switch 22, and a second regulation switch 23. The first regulation switch 22 includes: a first regulation end, a first conduction end, and a second conduction end. The second regulation switch 23 includes: a second regulation end, a third conduction end, and a fourth conduction end. The first regulation end is used to control the on-off of the first conduction end and the second conduction end, and the second regulation end is used to control the on-off of the third conduction end and the fourth conduction end.

[0071] Both the voltage upper limit regulation unit 11 and the voltage lower limit regulation unit 12 are electrically connected to the measured power supply end of the circuit board to be measured. The power supply detection lamp 21, the first conduction end and the second conduction end of the first regulation switch 22, and the third conduction end and the fourth conduction end of the second regulation switch 23 are connected in series between the power supply module and the grounding end of the signal detection circuit.

[0072] The first control terminal of the first control switch 22 is electrically connected to the lower voltage control unit 12, and the second control terminal of the second control switch 23 is electrically connected to the upper voltage control unit 11. When the voltage provided by the power supply terminal under test is higher than the lower limit operating voltage, the lower voltage control unit 12 controls the first conduction terminal and the second conduction terminal to conduct through the first control terminal. When the voltage provided by the power supply terminal under test is higher than the upper limit operating voltage, the upper voltage control unit 11 controls the third conduction terminal and the fourth conduction terminal to disconnect through the second control terminal.

[0073] It should be noted that when the voltage provided by the power supply terminal under test is higher than the lower limit operating voltage, the first lower limit conduction terminal and the second lower limit conduction terminal are in a disconnected state; when the voltage provided by the power supply terminal under test is higher than the upper limit operating voltage, the first upper limit conduction terminal and the second upper limit conduction terminal are in a conducting state.

[0074] Among them, there may be one or more power supply terminals under test on the circuit board to be tested. When there are multiple power supply terminals under test on the circuit board to be tested, each power supply terminal under test can provide different voltage ranges, such as 3.3 ± 5% V, 5 ± 5% V, 12 ± 5% V, etc.; the lower limit operating voltage and the upper limit operating voltage are respectively the minimum and maximum values of the power supply terminal under test under normal power supply. For example, the normal voltage range of a power supply terminal VCC5 on the circuit board to be tested is 5 ± 5% V, that is, 4.75V to 5.25V; among them, 4.75V is the lower limit operating voltage of the power supply terminal VCC5, and 5.25V is the upper limit operating voltage of the power supply terminal VCC5.

[0075] In this embodiment, the circuit board to be tested is the main board, and this main board includes three power supply terminals under test, namely VCC3.3, VCC5, and VCC12, which provide voltages of 3.3V, 5V, and 12V respectively. In this way, the signal detection circuit is configured with a set of upper voltage control unit 11, lower voltage control unit 12, power supply detection lamp 21, first control switch 22, and second control switch 23 for each power supply terminal under test; the power supply module VCC5SB_DEBUG provides 5V voltage, for details, see Figures 2 to 4 .

[0076] It can be understood that the number and connection relationship of each device connected to the signal detection circuit for different power supply terminals under test are the same. The difference is that due to the different voltages provided by the power supply terminals to which the devices are connected, the resistance values of the devices themselves or the voltage values used to trigger the corresponding conduction terminals to conduct are different from the corresponding devices in other groups. This embodiment will not elaborate too much here.

[0077] One end of the power detection lamp 21 is electrically connected to the power supply module, and the other end of the power detection lamp 21 is electrically connected to the first conduction end of the first regulation switch 22. The second conduction end of the first regulation switch 22 is electrically connected to the third conduction end of the second regulation switch 23, and the fourth conduction end of the second regulation switch 23 is grounded.

[0078] The signal detection circuit provided by the embodiment of the present utility model has a simple structure. By setting a power supply module, a power logic judgment module 1 and a power failure display module 2 in the signal detection circuit, the power supply end to be measured of the circuit board to be measured can be detected. Among them, when the power logic judgment module 1 determines that the voltage provided by the power supply end to be measured is higher than the upper limit working voltage or lower than the lower limit working voltage, the power logic judgment module 1 will control the circuit where the power detection lamp 21 is located to remain in an open state, so that the power detection lamp 21 remains off; when the power logic judgment module 1 determines that the voltage provided by the power supply end to be measured is between the upper limit working voltage and lower than the lower limit working voltage, the power logic judgment module 1 will control the circuit where the power detection lamp 21 is located to remain in a connected state, so that the power detection lamp 21 remains on. In this way, whether the power supply end to be measured is supplying power normally can be quickly judged through the lighting and extinguishing of the power detection lamp 21, effectively reducing the cost of motherboard detection.

[0079] Further, the upper limit regulation end of the voltage upper limit regulation unit 11 and the lower limit regulation end of the voltage lower limit regulation unit 12 are both electrically connected to the power supply end to be measured. The first upper limit conduction end of the voltage upper limit regulation unit 11 and the first lower limit conduction end of the voltage lower limit regulation unit 12 are both electrically connected to the power supply module. The second upper limit conduction end of the voltage upper limit regulation unit 11 is electrically connected to the first regulation end, and the second lower limit conduction end of the voltage lower limit regulation unit 12 is electrically connected to the second regulation end.

[0080] The lower limit regulation end is used to control the conduction of the first lower limit conduction end and the second lower limit conduction end when the voltage provided by the power supply end to be measured is higher than the lower limit working voltage; the upper limit regulation end is used to control the conduction of the first upper limit conduction end and the second upper limit conduction end when the voltage provided by the power supply end to be measured is higher than the upper limit working voltage.

[0081] The first regulation end conducts the first conduction end and the second conduction end when electrically connected to the power supply module through the lower limit regulation unit; the second regulation end disconnects the third conduction end and the fourth conduction end when electrically connected to the power supply module through the upper limit regulation unit.

[0082] It can be seen that when the first lower limit conduction end and the second lower limit conduction end are conducting, and the first upper limit conduction end and the second upper limit conduction end are disconnected, the first conduction end and the second conduction end are conducting, and the third conduction end and the fourth conduction end are conducting. The power detection lamp 21 emits light due to the formation of a loop, indicating that the voltage provided by the power supply end to be measured is within the normal range at this time.

[0083] When the first lower limit conduction terminal and the second lower limit conduction terminal are disconnected or the first upper limit conduction terminal and the second upper limit conduction terminal are conducting, the power supply detection lamp 21 goes out because a loop cannot be formed, indicating that the voltage provided by the power supply terminal under test is not within the normal range at this time.

[0084] Combined with Figure 2 and Figure 4 , the voltage lower limit regulation unit 12 includes: a first voltage dividing resistor sub-unit 121 and a lower limit regulation device 122. The lower limit regulation device 122 includes: a lower limit regulation terminal, a first lower limit conduction terminal, and a second lower limit conduction terminal.

[0085] The first voltage dividing resistor sub-unit 121 is electrically connected to the lower limit regulation terminal and the power supply terminal under test respectively. The first voltage dividing resistor sub-unit 121 can convert the lower limit operating voltage provided by the power supply terminal under test into a lower limit reference voltage and provide it to the lower limit regulation terminal. The lower limit regulation device 122 is used to connect the first lower limit conduction terminal and the second lower limit conduction terminal when the voltage at the lower limit regulation terminal is equal to or higher than the lower limit reference voltage.

[0086] The voltage upper limit regulation unit 11 includes: a second voltage dividing resistor sub-unit 111 and an upper limit regulation device 112. The upper limit regulation device 112 includes: an upper limit regulation terminal, a first upper limit conduction terminal, and a second upper limit conduction terminal. The second voltage dividing resistor sub-unit 111 is electrically connected to the upper limit regulation terminal and the power supply terminal under test respectively. The second voltage dividing resistor sub-unit 111 can convert the upper limit operating voltage provided by the power supply terminal under test into an upper limit reference voltage and provide it to the upper limit regulation terminal. The upper limit regulation device 112 is used to connect the first upper limit conduction terminal and the second upper limit conduction terminal when the voltage at the upper limit regulation terminal is equal to or higher than the upper limit reference voltage.

[0087] Among them, the lower limit regulation device 122 includes: a shunt regulator or a comparator; the upper limit regulation device 112 includes: a shunt regulator or a comparator.

[0088] In this embodiment, the lower limit regulation device 122 and the upper limit regulation device 112 are shunt regulators of the same model, and preferably the TL431 precision shunt regulator here; the first regulation switch 22 is an N-type field effect transistor (NMOS); the second regulation switch 23 is a P-type field effect transistor (PMOS).

[0089] Among them, the cathode of the shunt regulator corresponding to the lower limit control device 122 is the first lower limit conduction end, the anode is the second lower limit conduction end, and the reference power supply pin is the lower limit control end; the cathode of the shunt regulator corresponding to the upper limit control device 112 is the first upper limit conduction end, the anode is the second upper limit conduction end, and the reference power supply pin is the upper limit control end; the gate (G) of the N-type field-effect transistor is the first control end, the drain (L) is the first conduction end, and the source (S) is the second conduction end; the gate of the P-type field-effect transistor is the second control end, the drain is the third conduction end, and the source is the fourth conduction end.

[0090] Combined Figure 3 , taking the DUT power supply terminal that provides a 5V voltage as an example, the TL431 precision shunt regulators used by the lower limit control device 122 and the upper limit control device 112 corresponding to the DUT power supply terminal are Q88 and Q89 respectively, and the first control switch 22 and the second control switch 23 connected to Q88 and Q89 are the field-effect transistors Q90 and Q91 respectively. Among them, the reference power supply Vref of Q88 and Q89 is approximately 2.49V.

[0091] The first voltage dividing resistor sub-unit 121 includes: a first voltage dividing resistor R930 and a second voltage dividing resistor R929. Among them, the resistance value of the first voltage dividing resistor R930 is 1.24 kΩ; the resistance value of the second voltage dividing resistor R929 is 1.37 kΩ.

[0092] One end of the first voltage dividing resistor is electrically connected to the DUT power supply terminal, the other end of the first voltage dividing resistor is respectively electrically connected to the lower limit control end and one end of the second voltage dividing resistor, and the other end of the second voltage dividing resistor is grounded.

[0093] The second voltage dividing resistor sub-unit 111 includes: a third voltage dividing resistor R934 and a fourth voltage dividing resistor R933. Among them, the resistance value of the third voltage dividing resistor R934 is 1.37 kΩ; the resistance value of the fourth voltage dividing resistor R933 is 1.24 kΩ.

[0094] One end of the third voltage dividing resistor is electrically connected to the DUT power supply terminal, the other end of the third voltage dividing resistor is respectively electrically connected to the upper limit control end and one end of the fourth voltage dividing resistor, and the other end of the fourth voltage dividing resistor is grounded.

[0095] When the voltage value input to Q88 externally is less than the reference voltage of Q88, its first lower limit conduction end and second lower limit conduction end are not conducting; when the voltage value input to Q88 externally is greater than the reference voltage of Q88, its first lower limit conduction end and second lower limit conduction end are conducting and connected.

[0096] Since Q90 is an NMOS transistor; Q91 is a PMOS transistor, and the principles of NMOS and PMOS transistors are opposite. For an NMOS transistor to conduct, the voltage applied to its G terminal needs to be higher than the voltage at its S terminal; while for a PMOS transistor to conduct, the voltage applied to its G terminal needs to be lower than the voltage at its S terminal. Therefore, Q90 and Q91 need to conduct simultaneously to light up LED9, and the conduction and disconnection of Q90 and Q91 are controlled by Q88 and Q89.

[0097] At the same time, since the normal range of the measured supply voltage value UVCC5 of the 5V voltage is 5 ± 5% V, that is, 4.75V to 5.25V; when VCC5 is lower than the lower limit 4.75V of its normal range, according to the circuit design, calculate the voltage division of R929 and R933: UR929 = UVCC5min × R929 / (R930 + R929) = 4.75 × (1.37) / (1.24 + 1.37) ≈ 2.49V, UR933 = UVCC5min × R933 / (R934 + R933) = 4.75 × (1.24) / (1.37 + 1.24) ≈ 2.26V.

[0098] It can be seen from this that when UVCC5 < 4.75V, UR929 < 2.49V and UR933 < 2.26V can be obtained. Therefore, Q88, Q89, and Q90 do not conduct, Q91 conducts, and LED9 does not form a loop to the ground, so the light is off, indicating that the voltage value is not within the normal range.

[0099] When VCC5 exceeds the lower limit 4.75V of its normal range and is lower than the upper limit 5.25V, the voltage division calculation at this time is UR929 = UVCC5max × R929 / (R930 + R929) = 5.25 × (1.37) / (1.24 + 1.37) ≈ 2.75V, UR933 = UVCC5max × R933 / (R934 + R933) = 5.25 × (1.24) / (1.37 + 1.24) ≈ 2.49V.

[0100] When 4.75V < UVCC5 < 5.25V, 2.49V < UR929 < 2.75V and 2.26V < UR933 < 2.49V can be obtained. Therefore, Q88, Q90, and Q91 conduct, Q89 does not conduct, and LED9 lights up, indicating that the voltage value is within the normal range.

[0101] When VCC5 once exceeds the upper limit 5.25V of its normal range, at this time, the voltage division of R929 ≥ 2.75V and the voltage division of R933 ≥ 2.49V. Therefore, Q88, Q89, and Q90 conduct, Q91 does not conduct, and LED9 does not form a loop to the ground, so the light is off, indicating that the voltage value is not within the normal range.

[0102] In summary, when the measured power supply terminal with a voltage of 5V is within the normal operating range, LED9 will emit light to indicate normal; if the measured power supply terminal with a voltage of 5V exceeds the normal operating range, is lower than the lower limit of the normal operating range or higher than the upper limit of the normal operating range, LED9 will not emit light, indicating that the measured power supply terminal with a voltage of 5V is operating abnormally. The structures of the detection circuits for the measured power supply terminals providing 3.3V and 12V are similar to this, and this embodiment will not elaborate on them.

[0103] Combined with Figure 1 , the signal detection circuit further includes: an interface connector 3. The power supply logic judgment module 1 is electrically connected to the interface connector 3, and the interface connector 3 is used to be electrically connected to the measured power supply terminal. By setting the interface connector 3, the signal detection circuit can be used independently of the measured circuit board without being set on the measured circuit board, saving the space of the measured circuit board and reducing the manufacturing cost of the measured circuit board.

[0104] The logic judgment circuit combination module 7 further includes: a function signal logic judgment module 4, and the display circuit combination module 8 further includes a function signal fault display module 5. The function signal logic judgment module 4 is electrically connected to the interface connector 3, and the function signal fault display module 5 is electrically connected to the function signal logic judgment module 4.

[0105] The interface connector 3 is further used to be electrically connected to at least one function signal interface on the measured circuit board, so that the function signal logic judgment module 4 can judge whether the function signals provided by at least one function signal interface are abnormal. The function signal fault display module 5 is used to display the judgment result of the function signal logic judgment module 4.

[0106] Among them, the function signal interface includes: at least one of a timing signal interface, a power supply signal interface, a clock signal interface, and a status signal interface; the function signal includes: at least one of a timing signal, a power supply signal, a clock signal, and a status signal, and each signal interface corresponds to one signal.

[0107] Combined with Figure 5 、 Figure 6 and Figure 7 , in this embodiment, the interface connector 3 includes. The interface connector 3 includes: a plurality of timing signal interfaces, three power supply signal interfaces, a plurality of clock signal interfaces, and a plurality of status signal interfaces. Among them, the plurality of timing signal interfaces, the plurality of clock signal interfaces, and the plurality of status signal interfaces are integrated on the first connector J1 and the second connector J2; the three power supply signal interfaces are integrated on the power supply connector JP1.

[0108] The timing signal interface is used to be electrically connected to the Super I / O (Super Input / Output chip) interface on the circuit board under test to detect the timing signals on the circuit board under test; the power signal interface is used to be electrically connected to the processor on the circuit board under test to detect the power signals on the circuit board under test; the clock signal interface is used to be electrically connected to the processor on the circuit board under test to detect the clock signals on the circuit board under test; the status signal interface is used to be electrically connected to the processor on the circuit board under test to detect the status signals on the circuit board under test.

[0109] It should be noted that the voltage values of each functional signal are less than or equal to 3.3V and are all high levels during normal operation. This signal detection circuit can detect one functional signal through one functional signal interface. For example, this signal detection circuit can detect one signal among multiple signals such as PC VCC SB, PC VDDQ, PC VCCIO, and PC VCORE on the circuit board under test through one power signal interface. This embodiment will not elaborate too much on this.

[0110] Combined Figure 1 and Figure 8 , the signal detection circuit further includes: an isolation module 6. The functional signal logic judgment module 4 is electrically connected to the interface connector 3 through the isolation module 6. The isolation module 6 is used to prevent the signals on the signal detection circuit from being fed back to the circuit board to be tested.

[0111] By setting the isolation module 6, it is possible to prevent the signals in this signal detection circuit from interfering with the circuit board under test, so that the signal detection circuit will not interfere with the circuit board under test when it fails itself.

[0112] The isolation module 6 includes: a unidirectional conduction unit 61 and a pull-up resistor 62. The unidirectional conduction unit 61 includes: a touch terminal, a positive connection terminal, and a negative connection terminal. The touch terminal and one end of the pull-up resistor 62 are both electrically connected to the power supply module, the other end of the pull-up resistor 62 is electrically connected to the positive connection terminal, and the negative connection terminal is electrically connected to the interface connector 3.

[0113] The touch terminal is used to unidirectionally conduct the positive connection terminal and the negative connection terminal when receiving a low-level signal at the negative connection terminal, so that the low-level signal is transmitted to the positive connection terminal through the negative connection terminal.

[0114] In this embodiment, the unidirectional conduction unit 61 is an N-type field effect transistor. Among them, the touch terminal, the positive connection terminal, and the negative connection terminal are respectively the gate, source, and drain of the field effect transistor; the gate is electrically connected to the power supply module through a resistor R875 and grounded through a capacitor C691.

[0115] There is a diode structure similar to a one-way conduction between the drain and the source of the one-way conduction unit 61, and the one-way conduction is reflected in that it can only conduct when the level of the drain is lower than the level of the source.

[0116] Taking the PCH_DSWROK signal on the circuit board under test as an example, by using this one-way conduction characteristic, the PCH_DSWROK_IL signal is the signal isolated by the one-way conduction unit 61 from the PCH_DSWROK signal.

[0117] When the PCH_DSWROK signal on the circuit board under test becomes low level, due to the one-way conduction of the diode-like structure, the PCH_DSWROK_IL signal on the right side of the one-way conduction unit 61 will change from high level to low level, so that a 5V voltage difference is generated between the gate and the source of the one-way conduction unit 61 and it conducts, and at the same time the PCH_DSWROK_IL signal will also become low level.

[0118] When the PCH_DSWROK signal is high level, the one-way conduction unit 61 will not conduct, so the PCH_DSWROK signal and the PCH_DSWROK_IL signal do not interfere with each other. If the PCH_DSWROK_IL signal itself has an abnormality and becomes low level at this time, the source level of the one-way conduction unit 61 is lower than the drain level, so the diode structure does not conduct unidirectionally and will not affect the PCH_DSWROK signal on the circuit board under test. Similarly, if the PCH_DSWROK_IL signal itself has abnormal fluctuations, these fluctuations will not be fed back to the PCH_DSWROK on the circuit board under test. In this way, by setting the isolation module 6, the isolation and detection between the circuit board under test and the signal self-checking circuit signal can be achieved.

[0119] It should be noted that a group of isolation modules 6 are configured for each path of signals in the signal detection circuit.

[0120] Combined Figure 1 and Figure 9 , the function signal fault display module 5 further includes at least one first-level indicator light 51 and at least one first-level regulating device 52. The first-level indicator lights 51 and the function signal interfaces correspond to the first-level regulating devices 52 one by one, and the function signal logic judgment module 4 corresponds to the first-level indicator lights 51 one by one.

[0121] Each first-level regulating device 52 includes: a third regulating end, a fifth conducting end and a sixth conducting end. The third regulating end is used to control the on-off of the fifth conducting end and the sixth conducting end. The fifth conducting end and the sixth conducting end on each first-level regulating device 52 are connected in series with the corresponding first-level indicator light 51 between the power supply module and the grounding end of the signal detection circuit.

[0122] The third control terminal on each first-level control device 52 is electrically connected to the corresponding function signal interface. When the function signal sent by the corresponding function signal interface is abnormal, the third control terminal controls the corresponding fifth conduction terminal and sixth conduction terminal to disconnect, and the first-level indicator light 51 goes out. When the function signal sent by the corresponding function signal interface is normal, the third control terminal controls the corresponding fifth conduction terminal and sixth conduction terminal to disconnect, and the first-level indicator light 51 lights up. In this way, each first-level indicator light 51 can indicate whether the corresponding function signal interface is abnormal through the corresponding first-level control device 52.

[0123] In this embodiment, one end of the first-level indicator light 51 is electrically connected to the power supply module through a resistor R893, and the sixth conduction terminal is grounded; the first-level control device 52 is an N-type field effect transistor, where the third control terminal, the fifth conduction terminal, and the sixth conduction terminal are the gate, drain, and source of the N-type field effect transistor, respectively.

[0124] Combined Figure 10 、 Figure 11 and Figure 12 ,the function signal fault display module 5 further includes at least one second-level indicator light 53 and at least one second-level control device 54. The function signal logic judgment module 4 further includes: at least one first-level AND gate logic unit 41. The first-level AND gate logic unit 41 and the second-level control device 54 are in one-to-one correspondence, and the second-level control device 54 and the second-level indicator light 53 are in one-to-one correspondence.

[0125] Each first-level AND gate logic unit 41 includes: at least one first-level input terminal and one first-level output terminal. The first-level input terminals on the same first-level AND gate logic unit 41 are used to be electrically connected to different function signal interfaces of the same type. The first-level AND gate logic unit 41 is used to output a first-level conduction signal through the first-level output terminal when the function signals at the first-level input terminals are all normal.

[0126] Taking the timing signal as an example, in this embodiment, all timing signals are divided into two categories: SB timing signals and VCC timing signals, that is, OUTPUT_SB_SEQUENCE signals and OUTPUT_VCC_SEQUENCE signals. The SB timing signals and VCC timing signals respectively include at least one more specific timing signal. For example, the SB timing signals include: signals such as RTCRST-IL, SRTCRST-IL; the VCC timing signals include: signals such as SPL S5-IL, SPL S4-IL, SIO PWRGD-IL.

[0127] The output terminals of the isolation module 6 for signals of the same small category such as RTCRST-IL and SRTCRST-IL are respectively electrically connected to one first-level input terminal, and the output terminals of the isolation module 6 for signals of the same small category such as SPL S5-IL, SPL S4-IL, and SIO PWRGD-IL are respectively electrically connected to another first-level input terminal. Among them, each third control terminal is electrically connected to one first-level input terminal.

[0128] Specifically, in combination with Figure 11 and Figure 12 , the first-level AND logic unit 41 includes at least one diode. When the first-level AND logic unit 41 includes a plurality of diodes, the cathode of each diode is a first-level input terminal, and the anodes of the plurality of diodes are commonly connected to form a first-level output terminal.

[0129] In combination with Figure 10 , for signals such as RTCRST-IL and SRTCRST-IL, the RTCRST-IL and SRTCRST-IL signals output from the corresponding isolation module 6 are respectively input to a first-level AND logic unit 41. The first-level AND logic unit 41 includes four diodes D1, D2, D6, and D7, and outputs the OUTPUT_SB_SEQUENCE signal. Specifically, only when all the signals connected to the cathodes on the left side of D1, D2, D6, and D7 are at a high level, the OUTPUT_SB_SEQUENCE signal connected to the anodes on their right side will change from a low level to a high level; conversely, if any one of the signals connected to the cathodes on the left side of D1, D2, D6, and D7 changes to a low level, the OUTPUT_SB_SEQUENCE signal connected to the anodes on their right side will immediately change from a high level to a low level.

[0130] In combination with Figure 11, for signals such as SPL S5-IL, SPL S4-IL, and SIO PWRGD-IL, the signals such as SPL S5-IL, SPL S4-IL, and SIO PWRGD-IL output from the corresponding isolation module 6 are respectively input to another first-level AND logic unit 41. The first-level AND logic unit 41 includes ten diodes D3, D4, D5, D8, D9, D10, D11, D12, D13, and D14, and outputs the OUTPUT_VCC_SEQUENCE signal. Specifically, only when all the signals connected to the cathodes on the left side of D3, D4, D5, D8, D9, D10, D11, D12, D13, and D14 are at high level, the OUTPUT_VCC_SEQUENCE signal connected to the anodes on their right side will change from low level to high level; conversely, if any one of the diodes D3, D4, D5, D8, D9, D10, D11, D12, D13, and D14 has the signal connected to the cathode on the left side changed to low level, the OUTPUT_VCC_SEQUENCE signal connected to the anodes on their right side will immediately change from high level to low level.

[0131] In this embodiment, the first-level output terminal of each first-level AND logic unit 41 is electrically connected to the power supply module through a resistor R874 / R883.

[0132] Combined with Figure 10 , each second-level regulation device 54 includes: a fourth regulation terminal, a seventh conduction terminal, and an eighth conduction terminal. The fourth regulation terminal is electrically connected to the corresponding first-level output terminal, and the fourth regulation terminal is used to control the seventh conduction terminal and the eighth conduction terminal to conduct when a first-level conduction signal is output at the corresponding first-level output terminal. The seventh conduction terminal and the eighth conduction terminal on each second-level regulation device 54 are connected in series with the corresponding second-level indicator lamp 53 between the power supply module and the ground terminal of the signal detection circuit.

[0133] The fourth regulation terminal on each second-level regulation device 54 is electrically connected to the corresponding first-level output terminal. Taking the fourth regulation terminal where the OUTPUT_SB_SEQUENCE signal is located as an example, when the fourth regulation terminal outputs a high level at the corresponding first-level output terminal, it controls the corresponding seventh conduction terminal and the eighth conduction terminal to be connected, and the corresponding second-level indicator lamp 53 lights up, indicating that all the sub-signals corresponding to the OUTPUT_SB_SEQUENCE signal, that is, signals such as RTCRST-IL and SRTCRST-IL are normal. When the fourth regulation terminal outputs a low level at the corresponding first-level output terminal, it controls the corresponding seventh conduction terminal and the eighth conduction terminal to be disconnected, and the corresponding second-level indicator lamp 53 goes out, indicating that at least one of all the sub-signals corresponding to the OUTPUT_SB_SEQUENCE signal, that is, signals such as RTCRST-IL and SRTCRST-IL is abnormal.

[0134] In this embodiment, one end of the secondary indicator light 53 is electrically connected to the power supply module through a resistor R895, and the eighth conduction end is grounded; the secondary regulation device 54 and the primary regulation device 52 are N-type field effect transistors. Among them, the third regulation end, the fifth conduction end, and the sixth conduction end are the gate, drain, and source of the N-type field effect transistor respectively.

[0135] Combined with Figure 13 and Figure 14 , the function signal fault display module 5 further includes at least one tertiary indicator light 55 and at least one tertiary regulation device 56. The function signal logic judgment module 4 further includes: at least one secondary AND gate logic unit 42. The secondary AND gate logic unit 42 includes: at least one secondary input end and one secondary output end.

[0136] The secondary input ends correspond to the primary AND gate logic units 41 one by one. Each secondary input end is electrically connected to a primary output end respectively. The secondary AND gate logic unit 42 is used to output a secondary conduction signal through the secondary output end when the function signals at the secondary input ends are all normal.

[0137] The tertiary regulation device 56 includes: a fifth regulation end, a ninth conduction end, and a tenth conduction end. The fifth regulation end is electrically connected to the corresponding secondary output end. The fifth regulation end is used to control the ninth conduction end and the tenth conduction end to conduct when the secondary conduction signal is output at the corresponding output end. The ninth conduction end and the tenth conduction end are connected in series with the corresponding tertiary indicator light 55 between the power supply module and the grounding end of the signal detection circuit.

[0138] Taking the fifth regulation end where the OUTPUT_SEQUENCE signal is located as an example, when the fifth regulation end outputs a high level at the corresponding tertiary output end, it controls the corresponding seventh conduction end and the eighth conduction end to be connected, and the corresponding tertiary indicator light 55 lights up, indicating that all timing signals, that is, signals such as RTCRST-IL, SRTCRST-IL, SPL S5-IL, SPL S4-IL, SIO PWRGD-IL, etc. are all normal. When the fourth regulation end outputs a low level at the corresponding primary output end, it controls the corresponding seventh conduction end and the eighth conduction end to be disconnected, and the corresponding tertiary indicator light 55 goes out, indicating that at least one of all the timing signals, that is, signals such as RTCRST-IL, SRTCRST-IL, SPL S5-IL, SPL S4-IL, SIO PWRGD-IL, etc. is abnormal.

[0139] In this embodiment, one end of the three - level indicator light 55 is electrically connected to the power supply module through a resistor R894, and the tenth conduction end is grounded; the three - level control device 56 and the first - level control device 52 are N - type field - effect transistors. Among them, the third control end, the ninth conduction end, and the tenth conduction end are the gate, drain, and source of the N - type field - effect transistor respectively.

[0140] It should be noted that for the signal detection circuit in this embodiment, not only is a three - level indicator light 55, a three - level control device 56, a two - level AND logic unit 42, multiple two - level indicator lights 53, multiple two - level control devices 54, multiple one - level AND logic units 41, multiple one - level indicator lights 51, and multiple one - level control devices 52 configured for the test sub - circuit used to detect the timing signal on the main board to be measured, but also for other test sub - circuits including but not limited to power supply signals, clock signals, and status signals, a three - level indicator light 55, a three - level control device 56, a two - level AND logic unit 42, multiple two - level indicator lights 53, multiple two - level control devices 54, multiple one - level AND logic units 41, multiple one - level indicator lights 51, and multiple one - level control devices 52 are configured.

[0141] Meanwhile, in this embodiment, the power supply detection light 21, the first - level indicator light 51, the second - level indicator light 53, and the three - level indicator light 55 are all LED lights (light - emitting diodes). By setting the power supply detection light 21, the first - level indicator light 51, the second - level indicator light 53, and the three - level indicator light 55, the maintenance personnel only need to observe with the naked eye which LED light is not on, and then can quickly locate and judge the cause of the failure of the main board to be measured.

[0142] Combined Figure 14 , the two - level AND logic unit 42 includes an AND gate. Taking the two - level AND logic unit 42 in the timing signal as an example, it includes an AND gate U66. The two input terminals of the AND gate U66 are respectively electrically connected to the output terminals of the corresponding two one - level AND logic units 41. The output terminals of the two one - level AND logic units 41 respectively output the OUTPUT_SB_SEQUENCE signal and the OUTPUT_VCC_SEQUENCE signal. When both the OUTPUT_SB_SEQUENCE signal and the OUTPUT_VCC_SEQUENCE signal are at a high level, the two - level AND logic unit 42 outputs a two - level conduction signal, that is, at this time the OUTPUT_SEQUENCE signal is at a high level.

[0143] In an alternative embodiment, the signal detection circuit is disposed on a carrier 9, and silk screen printing is engraved on one side of each power detection lamp 21, primary indicator lamp 51, secondary indicator lamp 53, and tertiary indicator lamp 55 on the carrier 9 to indicate the signal being referred to. For example, in the primary indicator lamp 51, secondary indicator lamp 53, and tertiary indicator lamp 55 in the timing signal, the silk screen printing content beside the tertiary indicator lamp 55 is "timing signal"; the silk screen printing content beside the secondary indicator lamp 53 is "SB timing signal" or "VCC timing signal", etc.; the silk screen printing content beside the primary indicator lamp 51 is "OUTPUT_SB_SEQUENCE signal" or "SPL S5-IL signal", etc.

[0144] The signal detection circuit provided in this embodiment has a simple structure, rich functions, and a wide range of applications; there is no need to add complex circuit components to the circuit board to be measured, and only a simple signal interface in the interface connector 3 of the circuit board to be measured needs to be connected, which is plug-and-play and easy to operate; compared with the traditional self-checking circuit, the signal detection circuit provided in this embodiment can not only analyze power supply faults, but also quickly analyze faults in aspects such as timing, clock, and system status; at the same time, the signal detection circuit provided in this embodiment is equipped with an easy-to-understand LED circuit and silk screen printing explanation, which is easy to understand and does not require maintenance personnel to understand professional knowledge of the underlying BIOS (Basic Input / Output System), reducing the requirements for the professional ability of maintenance personnel.

[0145] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0146] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0147] The above-described embodiments only represent several implementation manners of the present application, and the descriptions are relatively specific and detailed, but should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A signal detection circuit, characterized in that, The signal detection circuit includes: a power supply module, a power supply logic judgment module, and a power supply fault display module; The power supply logic judgment module includes: a voltage upper limit regulation unit and a voltage lower limit regulation unit, and the power supply fault display module includes: a power supply detection lamp, a first regulation switch, and a second regulation switch. The first regulation switch includes: a first regulation terminal, a first conduction terminal, and a second conduction terminal. The second regulation switch includes: a second regulation terminal, a third conduction terminal, and a fourth conduction terminal. The first regulation terminal is used to control the on / off of the first conduction terminal and the second conduction terminal, and the second regulation terminal is used to control the on / off of the third conduction terminal and the fourth conduction terminal; Both the voltage upper limit regulation unit and the voltage lower limit regulation unit are electrically connected to the measured power supply terminal of the circuit board to be measured. The power supply detection lamp, the first conduction terminal and the second conduction terminal, and the third conduction terminal and the fourth conduction terminal are connected in series between the power supply module and the ground terminal of the signal detection circuit; The first regulation terminal of the first regulation switch is electrically connected to the voltage lower limit regulation unit, and the second regulation terminal of the second regulation switch is electrically connected to the voltage upper limit regulation unit; When the voltage provided by the measured power supply terminal is higher than the lower limit operating voltage, the voltage lower limit regulation unit controls the conduction of the first conduction terminal and the second conduction terminal through the first regulation terminal; When the voltage provided by the measured power supply terminal is higher than the upper limit operating voltage, the voltage upper limit regulation unit controls the disconnection of the third conduction terminal and the fourth conduction terminal through the second regulation terminal; The lower limit operating voltage and the upper limit operating voltage are respectively the minimum value and the maximum value of the measured power supply terminal under normal power supply; 2. The signal detection circuit according to claim 1, wherein Both the upper limit regulation terminal of the voltage upper limit regulation unit and the lower limit regulation terminal of the voltage lower limit regulation unit are electrically connected to the measured power supply terminal; The first upper conduction terminal of the voltage upper limit regulation unit and the first lower conduction terminal of the voltage lower limit regulation unit are both electrically connected to the power supply module; The second upper conduction terminal of the voltage upper limit regulation unit is electrically connected to the first regulation terminal, and the second lower conduction terminal of the voltage lower limit regulation unit is electrically connected to the second regulation terminal; The lower limit regulation terminal is used to control the conduction of the first lower conduction terminal and the second lower conduction terminal when the voltage provided by the measured power supply terminal is higher than the lower limit operating voltage; The upper limit regulation terminal is used to control the conduction of the first upper conduction terminal and the second upper conduction terminal when the voltage provided by the measured power supply terminal is higher than the upper limit operating voltage; The first regulation terminal conducts the first conduction terminal and the second conduction terminal when electrically connected to the power supply module; The second regulation terminal disconnects the third conduction terminal and the fourth conduction terminal when electrically connected to the power supply module; 3. The signal detection circuit according to claim 2, wherein The voltage lower limit regulation unit includes: a first voltage dividing resistor sub-unit and a lower limit regulation device; The lower limit regulation device includes: the lower limit regulation terminal, the first lower conduction terminal, and the second lower conduction terminal; The first voltage-dividing resistor sub-unit is electrically connected to the lower limit control terminal and the power supply terminal under test respectively. The first voltage-dividing resistor sub-unit can convert the lower limit operating voltage provided by the power supply terminal under test into a lower limit reference voltage and provide it to the lower limit control terminal; the lower limit control device is configured to connect the first lower limit conduction terminal and the second lower limit conduction terminal when the voltage at the lower limit control terminal is equal to or higher than the lower limit reference voltage. The voltage upper limit control unit includes: a second voltage-dividing resistor sub-unit and an upper limit control device. The upper limit control device includes: the upper limit control terminal, the first upper limit conduction terminal and the second upper limit conduction terminal. The second voltage-dividing resistor sub-unit is electrically connected to the upper limit control terminal and the power supply terminal under test respectively. The second voltage-dividing resistor sub-unit can convert the upper limit operating voltage provided by the power supply terminal under test into an upper limit reference voltage and provide it to the upper limit control terminal; the upper limit control device is configured to connect the first upper limit conduction terminal and the second upper limit conduction terminal when the voltage at the upper limit control terminal is equal to or higher than the upper limit reference voltage.

4. The signal detection circuit according to claim 1, wherein The signal detection circuit further includes: an interface connector. The power supply logic judgment module is electrically connected to the interface connector, and the interface connector is used to be electrically connected to the power supply terminal under test.

5. The signal detection circuit according to claim 4, wherein The signal detection circuit further includes: a function signal logic judgment module and a function signal fault display module. The function signal logic judgment module is electrically connected to the interface connector, and the function signal fault display module is electrically connected to the function signal logic judgment module. The interface connector is further used to be electrically connected to at least one function signal interface on the circuit board under test, so that the function signal logic judgment module can judge whether the function signals provided by the at least one function signal interface are abnormal. The function signal fault display module is used to display the judgment result of the function signal logic judgment module.

6. The signal detection circuit according to claim 5, characterized in that, The function signal fault display module further includes at least one first-level indicator light and at least one first-level control device. The first-level indicator lights and the function signal interfaces are in one-to-one correspondence with the first-level control devices, and the function signal logic judgment module is in one-to-one correspondence with the first-level indicator lights. Each of the first-level control devices includes: a third control terminal, a fifth conduction terminal and a sixth conduction terminal. The third control terminal is used to control the on-off of the fifth conduction terminal and the sixth conduction terminal. The fifth conduction terminal and the sixth conduction terminal on each first-level control device are connected in series between the power supply module and the ground terminal of the signal detection circuit with the corresponding first-level indicator light. The third control terminal on each first-level control device is electrically connected to the corresponding function signal interface, and the third control terminal controls the corresponding fifth conduction terminal and sixth conduction terminal to disconnect when the function signal sent by the corresponding function signal interface is abnormal.

7. The signal detection circuit according to claim 5, wherein The function signal fault display module further includes at least one second-level indicator light and at least one second-level control device. The functional signal logic judgment module further includes: at least one first-level AND gate logic unit, where the first-level AND gate logic units correspond one-to-one with the second-level control devices, and the second-level control devices correspond one-to-one with the second-level indicator lights; Each of the first-level AND gate logic units includes: at least one first-level input terminal and one first-level output terminal. The first-level input terminals on the same first-level AND gate logic unit are used to be electrically connected to different functional signal interfaces of the same type. The first-level AND gate logic unit is configured to output a first-level conduction signal through the first-level output terminal when the functional signals at the first-level input terminals are all normal; Each of the second-level control devices includes: a fourth control terminal, a seventh conduction terminal, and an eighth conduction terminal. The fourth control terminal is electrically connected to the corresponding first-level output terminal, and the fourth control terminal is configured to control the seventh conduction terminal and the eighth conduction terminal to conduct when the corresponding first-level output terminal outputs a first-level conduction signal; The seventh conduction terminal and the eighth conduction terminal on each of the second-level control devices are connected in series with the corresponding second-level indicator light between the power supply module and the ground terminal of the signal detection circuit.

8. The signal detection circuit according to claim 7, characterized in that The functional signal fault display module further includes at least one third-level indicator light and at least one third-level control device; The functional signal logic judgment module further includes: at least one second-level AND gate logic unit; The second-level AND gate logic unit includes: at least one second-level input terminal and one second-level output terminal. The second-level input terminals correspond one-to-one with the first-level AND gate logic units, and each of the second-level input terminals is electrically connected to one of the first-level output terminals. The second-level AND gate logic unit is configured to output a second-level conduction signal through the second-level output terminal when the functional signals at the second-level input terminals are all normal; The third-level control device includes: a fifth control terminal, a ninth conduction terminal, and a tenth conduction terminal. The fifth control terminal is electrically connected to the corresponding second-level output terminal, and the fifth control terminal is configured to control the ninth conduction terminal and the tenth conduction terminal to conduct when the corresponding output terminal outputs the second-level conduction signal; The ninth conduction terminal and the tenth conduction terminal are connected in series with the corresponding third-level indicator light between the power supply module and the ground terminal of the signal detection circuit.

9. The signal detection circuit according to claim 5, wherein The signal detection circuit further includes: an isolation module; The functional signal logic judgment module is electrically connected to the interface connector through the isolation module; The isolation module is used to prevent the signals on the signal detection circuit from being fed back to the circuit board under test.

10. The signal detection circuit according to claim 9, wherein The isolation module includes: a unidirectional conduction unit and a pull-up resistor; The unidirectional conduction unit includes: a touch terminal, a positive connection terminal, and a negative connection terminal; The touch terminal and one end of the pull-up resistor are both electrically connected to the power supply module. The other end of the pull-up resistor is electrically connected to the positive connection terminal, and the negative connection terminal is electrically connected to the interface connector; The touch terminal is configured to unidirectionally conduct the positive connection terminal and the negative connection terminal when a low-level signal is received at the negative connection terminal, so that the low-level signal is transmitted to the positive connection terminal through the negative connection terminal.

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