Power supply under-voltage protection circuit

Abstract

The utility model discloses a power supply under-voltage protection circuit, which comprises a power supply management chip U6, an NPN tube Q4, a PNP tube Q2, a voltage-regulator tube D61 and an NPN tube Q3, a base electrode of the NPN tube Q4 is used for accessing a POWEREN signal, an emitter electrode of the NPN tube Q4 is grounded, a collector electrode of the NPN tube Q4 is connected to a power supply end VB + through a resistor R130 and a resistor R129 which are sequentially connected in series, a connection point of the resistor R130 and the resistor R129 is connected with the base electrode of the PNP tube Q2, and the PNP tube Q2 is connected with the voltage-regulator tube D61. The emitter electrode of the PNP tube Q2 is connected to the power supply end VB +, the collector electrode of the PNP tube Q2 is connected to the cathode of the voltage-regulator tube D61, the anode signal of the voltage-regulator tube D61 is transmitted to the base electrode of the NPN tube Q3, the emitter electrode of the NPN tube Q3 is grounded, the collector electrode of the NPN tube Q3 is connected to the power supply end VB + through a resistor R128, and the collector electrode of the NPN tube Q3 is further connected to the enable end EN of the power supply management chip U6. The power supply under-voltage protection circuit realizes a power supply under-voltage protection function through a more simplified circuit structure, does not need to use chip devices such as a comparator, and is lower in application cost.

Description

Technical Field

[0001] The utility model relates to a power supply circuit, in particular to an undervoltage protection circuit for a power supply. Background Art

[0002] In a power supply circuit, in order to ensure that a power management chip can still work normally under power supply voltage fluctuations, an undervoltage lockout circuit is usually configured for the power management chip. The basic principle of the undervoltage lockout circuit is as Figure 1 shown. The circuit includes a voltage sampling circuit, a comparator, an output buffer, and a feedback loop. This circuit structure is not only complex, but also requires the use of chips such as comparators, and the application cost is relatively high. Content of the Utility Model

[0003] The technical problem to be solved by the utility model is to provide an undervoltage protection circuit for a power supply with a simplified circuit structure and low application cost in view of the deficiencies of the prior art.

[0004] To solve the above technical problem, the utility model adopts the following technical solutions.

[0005] An undervoltage protection circuit for a power supply, which includes a power management chip U6, an NPN transistor Q4, a PNP transistor Q2, a zener diode D61, and an NPN transistor Q3. The base of the NPN transistor Q4 is used to access the POWER_EN signal. The emitter of the NPN transistor Q4 is grounded. The collector of the NPN transistor Q4 is connected to the power supply terminal VB+ through a series connection of a resistor R130 and a resistor R129 in sequence. The connection point of the resistor R130 and the resistor R129 is connected to the base of the PNP transistor Q2. The emitter of the PNP transistor Q2 is connected to the power supply terminal VB+. The collector of the PNP transistor Q2 is connected to the cathode of the zener diode D61. The anode signal of the zener diode D61 is transmitted to the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is grounded. The collector of the NPN transistor Q3 is connected to the power supply terminal VB+ through a resistor R128. The collector of the NPN transistor Q3 is also connected to the enable terminal EN of the power management chip U6.

[0006] Preferably, the base of the NPN transistor Q4 is connected to the first end of a resistor R132. The second end of the resistor R132 is used to access the POWER_EN signal. The first end of the resistor R132 is also grounded through a capacitor C73.

[0007] Preferably, a capacitor C65 is connected between the power supply terminal VB+ and the ground.

[0008] Preferably, the anode of the zener diode D61 and the base of the NPN transistor Q3 are connected through a resistor R131.

[0009] Preferably, it includes a voltage stabilizing diode D62. The cathode of the voltage stabilizing diode D62 is connected to the collector of the NPN transistor Q3, and the anode of the voltage stabilizing diode D62 is grounded.

[0010] Preferably, the voltage stabilizing value of the voltage stabilizing diode D62 is 5.1V.

[0011] Preferably, the voltage stabilizing value of the voltage stabilizing diode D61 is 7.5V.

[0012] In the power supply undervoltage protection circuit disclosed by the present invention, during the working process, when the POWER_EN signal is at a high level, the NPN transistor Q4 and the PNP transistor Q2 are turned on. At this time, if the voltage of the power supply terminal VB+ is greater than the voltage stabilizing value of the voltage stabilizing diode D61, the NPN transistor Q3 is turned on, pulling down the enable terminal EN of the power management chip U6, and the power management chip U6 starts to work; if the voltage of the power supply terminal VB+ is less than the voltage value of the voltage stabilizing diode D61, the NPN transistor Q3 is not turned on, the enable terminal EN of the power management chip U6 is pulled high, and the power management chip U6 does not work, thereby realizing the undervoltage protection function. Compared with the existing undervoltage lockout circuit, the present invention realizes the power supply undervoltage protection function with a more simplified circuit structure. At the same time, the present invention does not need to use chip devices such as comparators, and the application cost is lower. Description of the Drawings

[0013] Figure 1 is the schematic diagram of the traditional undervoltage lockout circuit;

[0014] Figure 2 is the schematic diagram of the power supply undervoltage protection circuit of the present invention. Detailed Embodiments

[0015] The present invention will be described in more detail below with reference to the drawings and embodiments.

[0016] The present invention discloses a power supply undervoltage protection circuit. Please refer to Figure 2, which includes a power management chip U6, an NPN transistor Q4, a PNP transistor Q2, a zener diode D61, and an NPN transistor Q3. The base of the NPN transistor Q4 is used to connect to the POWER_EN signal. The emitter of the NPN transistor Q4 is grounded. The collector of the NPN transistor Q4 is connected to the power supply terminal VB+ through a series connection of a resistor R130 and a resistor R129 in sequence. The connection point of the resistor R130 and the resistor R129 is connected to the base of the PNP transistor Q2. The emitter of the PNP transistor Q2 is connected to the power supply terminal VB+. The collector of the PNP transistor Q2 is connected to the cathode of the zener diode D61. The anode signal of the zener diode D61 is transmitted to the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is grounded. The collector of the NPN transistor Q3 is connected to the power supply terminal VB+ through a resistor R128. The collector of the NPN transistor Q3 is also connected to the enable terminal EN of the power management chip U6. Among them, the enable terminal EN (pin 3) of the power management chip U6 is enabled by a low level trigger. For this pin, while enabling control by accessing the POWER_EN signal, the power under-voltage protection function is realized.

[0017] Specifically, during the operation of the above circuit, when the POWER_EN signal is at a high level, the NPN transistor Q4 and the PNP transistor Q2 are turned on. At this time, if the voltage of the power supply terminal VB+ is greater than the regulated voltage value of the zener diode D61, the NPN transistor Q3 is turned on, pulling down the enable terminal EN (pin 3) of the power management chip U6, and the power management chip U6 starts to work; if the voltage of the power supply terminal VB+ is less than the voltage value of the zener diode D61, the NPN transistor Q3 is not turned on, the enable terminal EN (pin 3) of the power management chip U6 is pulled up, and the power management chip U6 does not work, thereby realizing the under-voltage protection function. Compared with the existing under-voltage lockout circuit, the present invention realizes the power under-voltage protection function with a more simplified circuit structure. At the same time, the present invention does not need to use chip devices such as comparators, and the application cost is lower.

[0018] In order to filter the POWER_EN signal, in this embodiment, please refer to Figure 2 , the base of the NPN transistor Q4 is connected to the first end of a resistor R132. The second end of the resistor R132 is used to connect to the POWER_EN signal. The first end of the resistor R132 is also grounded through a capacitor C73. Among them, this embodiment preferably adopts an RC filter circuit, which can effectively filter out the clutter interference in the POWER_EN signal, thereby avoiding the malfunction of the power management chip U6.

[0019] In order to filter the voltage of the power supply terminal VB+, in this embodiment, a capacitor C65 is connected between the power supply terminal VB+ and the ground.

[0020] As a preferred embodiment, the anode of the voltage stabilizing diode D61 is connected to the base of the NPN transistor Q3 through a resistor R131. Among them, the resistor R131 can play a role in limiting the base current.

[0021] Based on the above circuit, this embodiment further includes a voltage stabilizing diode D62. The cathode of the voltage stabilizing diode D62 is connected to the collector of the NPN transistor Q3, and the anode of the voltage stabilizing diode D62 is grounded. In practical applications, when the NPN transistor Q3 conducts, the two ends of the voltage stabilizing diode D62 are short-circuited. When the NPN transistor Q3 is turned off, the power supply terminal VB+, the resistor R128, the voltage stabilizing diode D62 and the ground form a loop, and the voltage stabilizing diode D62 breaks down to make the enable terminal EN (pin 3) of the power management chip U6 stable in the high-level state.

[0022] Regarding the specific parameters of the voltage stabilizing diode, in this embodiment, the voltage stabilizing value of the voltage stabilizing diode D62 is 5.1V. The voltage stabilizing value of the voltage stabilizing diode D61 is 7.5V.

[0023] The above are only the preferred embodiments of the present invention, and are not used to limit the present invention. Any modifications, equivalent replacements or improvements made within the technical scope of the present invention shall be included within the scope protected by the present invention.

Claims

1. A power supply undervoltage protection circuit, characterized in that, It includes a power management chip U6, an NPN transistor Q4, a PNP transistor Q2, a voltage regulator diode D61 and an NPN transistor Q3. The base of the NPN transistor Q4 is used to connect to the POWER_EN signal. The emitter of the NPN transistor Q4 is grounded. The collector of the NPN transistor Q4 is connected to the power supply terminal VB+ through the sequentially connected resistor R130 and resistor R129. The connection point of the resistor R130 and the resistor R129 is connected to the base of the PNP transistor Q2. The emitter of the PNP transistor Q2 is connected to the power supply terminal VB+. The collector of the PNP transistor Q2 is connected to the cathode of the voltage regulator diode D61. The anode signal of the voltage regulator diode D61 is transmitted to the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is grounded. The collector of the NPN transistor Q3 is connected to the power supply terminal VB+ through the resistor R128. The collector of the NPN transistor Q3 is also connected to the enable terminal EN of the power management chip U6.

2. The power supply undervoltage protection circuit according to claim 1, wherein The base of the NPN transistor Q4 is connected to the first end of the resistor R132. The second end of the resistor R132 is used to connect to the POWER_EN signal. The first end of the resistor R132 is also grounded through the capacitor C73.

3. The power supply undervoltage protection circuit according to claim 1, wherein A capacitor C65 is connected between the power supply terminal VB+ and the ground.

4. The power supply undervoltage protection circuit according to claim 1, characterized in that, A resistor R131 is connected between the anode of the voltage regulator diode D61 and the base of the NPN transistor Q3.

5. The power supply undervoltage protection circuit according to claim 1, wherein It includes a voltage regulator diode D62. The cathode of the voltage regulator diode D62 is connected to the collector of the NPN transistor Q3. The anode of the voltage regulator diode D62 is grounded.

6. The power supply undervoltage protection circuit according to claim 5, wherein, The regulated voltage value of the voltage regulator diode D62 is 5.1V.

7. The power supply undervoltage protection circuit according to claim 1, wherein, The regulated voltage value of the voltage regulator diode D61 is 7.5V.

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