SPWM electronic AC pulse width modulation module
By designing a switchable SPWM electronic AC pulse width modulation module, the grid impact and energy output efficiency problems between unipolar and bipolar modulation are solved, and high-efficiency energy output and low-loss modulation effects are achieved.
Patent Information
- Application Number
- CN202421657135.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-15
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2034-07-15
AI Technical Summary
When the existing SPWM electronic AC pulse width modulation module switches between unipolar and bipolar modulation, there are problems of poor grid impact and energy output efficiency.
A SPWM electronic AC pulse width modulation module is designed to switch between unipolar and bipolar modulation circuits by controlling the switching of the switch tube, and combining the control of the LC filter and the NMOS tube, the switching of the circuit structure is realized to reduce harmonic generation and power loss.
It realizes efficient energy output under different power grid conditions, reduces grid impact and power loss, and improves modulation efficiency.
Smart Images
Figure CN223156985U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of pulse width modulation, in particular to an SPWM electronic AC pulse width modulation module. Background Art
[0002] The SPWM electronic AC pulse width modulation module can be used for pulse width modulation to modulate a sine wave into a pulse wave with equal amplitude but unequal width. The modulation strategies of SPWM include unipolar modulation and bipolar modulation. Unipolar modulation means that only one level change is used in each period of SPWM to generate the PWM waveform, and bipolar modulation means that two level changes (usually positive and negative levels) are used in each period of SPWM to generate the PWM waveform.
[0003] However, in some application scenarios, it is necessary to switch between unipolar modulation and bipolar modulation. For example, in a system connected to the power grid, such as some large-scale wind power or solar power plants, bipolar modulation is used when the power grid is stable and high-efficiency energy output is required, and unipolar modulation is switched to when the power grid is unstable or the demand is low to reduce the impact on the power grid. Another example is in an energy storage system. Unipolar modulation may be used during charging to simplify control, while bipolar modulation may be switched to during discharging (especially when releasing energy to the power grid) to improve the quality and efficiency of energy output. Summary of the Utility Model
[0004] To make up for the above deficiencies, the utility model provides an SPWM electronic AC pulse width modulation module, which can switch between a unipolar modulation circuit and a bipolar modulation circuit by controlling a switching tube.
[0005] To achieve the above object, the utility model provides the following technical solution: An SPWM electronic AC pulse width modulation module includes a DC power supply V, four switching units, two capacitors, two PMOS transistors, two NMOS transistors, a load R, and an inductor L1. The first switching unit and the second switching unit are connected in series and then connected in parallel on both sides of the DC power supply V. The third switching unit and the fourth switching unit are connected in series and then connected in parallel on both sides of the DC power supply V. The capacitor C1 and the capacitor C2 are connected in series and then connected in parallel on both sides of the DC power supply V. One end of the inductor L1 is connected between the third switching unit and the fourth switching unit, and the other end is connected to one end of the load R. The other end of the load R is connected to the drain of the PMOS transistor M1, the source of the PMOS transistor M2, the drain of the NMOS transistor M3, and the source of the NMOS transistor M4. The source of the PMOS transistor M1 and the drain of the PMOS transistor M2 are connected to the point between the capacitor C1 and the capacitor C2. The source of the NMOS transistor M3 and the drain of the NMOS transistor M4 are connected to the point between the first switching unit and the second switching unit. The gates of the PMOS transistor M1, the PMOS transistor M2, the NMOS transistor M3, and the NMOS transistor M4 are commonly connected to a control signal source IN.
[0006] Preferably, the four switching units each include a switching transistor and a diode connected in parallel.
[0007] Preferably, a filter is further included, and the filter is connected in series between the load R and the inductor L1.
[0008] Preferably, there are two filters, and the first filter and the second filter are connected in series between the load R and the inductor L1 in sequence.
[0009] Preferably, an NMOS transistor M5 is further included. The source of the NMOS transistor M5 is connected between the second filter and the inductor L1, the drain of the NMOS transistor M5 is connected between the first filter and the second filter, and the gate of the NMOS transistor M5 is connected to the control signal source IN.
[0010] Preferably, both the first filter and the second filter are LC filters.
[0011] Preferably, the first filter and the second filter each include two inductors and capacitors connected in parallel.
[0012] The utility model has the following beneficial effects:
[0013] 1. By the high level and low level of the control signal source, it can be respectively switched to the full-bridge circuit for bipolar modulation and switched to the half-bridge circuit for unipolar modulation.
[0014] 2. By setting two LC filters and the NMOS transistor for controlling the filter, when switching to the full-bridge circuit, according to the characteristic of generating less harmonics, the number of working LC filters can be reduced, and the power loss can be reduced. When switching to the half-bridge circuit, according to the characteristic of generating more harmonics, the number of working LC filters can be increased, and the harmonic output can be reduced. Description of the Drawings
[0015] Figure 1 It is a schematic diagram of the topological structure of an SPWM electronic AC pulse width modulation module proposed by the utility model;
[0016] Figure 2 It is another schematic diagram of the topological structure of an SPWM electronic AC pulse width modulation module proposed by the utility model.
[0017] Legend Explanation:
[0018] V - DC power supply; C1, C2, C3, C4 - capacitors; T1 - first switching transistor; T2 - second switching transistor; T3 - third switching transistor; T4 - fourth switching transistor; D1 - first diode; D2 - second diode; D3 - third diode; D4 - fourth diode; M1, M2 - PMOS transistors; M3, M4, M5 - NMOS transistors; L1, L2, L3 - inductors; R - load. Detailed implementation manners
[0019] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0020] In some embodiments, the present invention provides the following technical solution: an SPWM (Sinusoidal Pulse Width Modulation) electronic AC (Alternating Current) pulse width modulation module, including a DC power supply V, four switching units, two capacitors, two PMOS transistors, two NMOS transistors, a load R, and an inductor L1. The first switching unit and the second switching unit are connected in series and then connected in parallel on both sides of the DC power supply V. The third switching unit and the fourth switching unit are connected in series and then connected in parallel on both sides of the DC power supply V. The capacitor C1 and the capacitor C2 are connected in series and then connected in parallel on both sides of the DC power supply V. One end of the inductor L1 is connected between the third switching unit and the fourth switching unit, and the other end is connected to one end of the load R. The other end of the load R is connected to the drain of the PMOS transistor M1, the source of the PMOS transistor M2, the drain of the NMOS transistor M3, and the source of the NMOS transistor M4. The source of the PMOS transistor M1 and the drain of the PMOS transistor M2 are connected to the point between the capacitor C1 and the capacitor C2. The source of the NMOS transistor M3 and the drain of the NMOS transistor M4 are connected to the point between the first switching unit and the second switching unit. The gates of the PMOS transistor M1, the PMOS transistor M2, the NMOS transistor M3, and the NMOS transistor M4 are commonly connected to a control signal source IN.
[0021] Preferably, the four switching units respectively include a switching transistor and a diode connected in parallel. Specifically, the first switching unit includes the first switching transistor T1 and the first diode D1 connected in parallel. The second switching unit includes the second switching transistor T2 and the second diode D2 connected in parallel. The third switching unit includes the third switching transistor T3 and the third diode D3 connected in parallel. The fourth switching unit includes the fourth switching transistor T4 and the fourth diode D4 connected in parallel.
[0022] Its working principle is as follows:
[0023] When the control signal source IN is at a low level, the gates of PMOS transistor M1, PMOS transistor M2, NMOS transistor M3, and NMOS transistor M4 are also at a low level. At this time, the source and drain of PMOS transistor M1 and PMOS transistor M1 are conducting, and the point between the left side of load R and capacitors C1 and C2 is equivalently connected. The source and drain of NMOS transistor M3 and NMOS transistor M4 are disconnected, and the point between the left side of load R and the first switching unit and the second switching unit is equivalently disconnected. In this way, the first switching unit and the second switching unit are short-circuited and invalidated during the pulse width modulation process, and only capacitors C1, C2, load R, inductor L1, the third switching unit, and the fourth switching unit have current flowing through the entire circuit, thereby making the entire circuit equivalent to a unipolar modulation loop (half-bridge structure).
[0024] When the control signal source IN is at a high level, the gates of PMOS transistor M1, PMOS transistor M2, NMOS transistor M3, and NMOS transistor M4 are also at a high level. At this time, the source and drain of PMOS transistor M1 and PMOS transistor M1 are disconnected, and the point between the left side of load R and capacitors C1 and C2 is equivalently disconnected. The source and drain of NMOS transistor M3 and NMOS transistor M4 are conducting, and the point between the left side of load R and the first switching unit and the second switching unit is equivalently connected. In this way, capacitors C1 and C2 are short-circuited and invalidated during the pulse width modulation process, and only the first switching unit, the second switching unit, load R, inductor L1, the third switching unit, and the fourth switching unit have current flowing through the entire circuit, thereby making the entire circuit equivalent to a bipolar modulation loop (full-bridge structure).
[0025] By controlling the high and low levels of the control signal source, it is possible to switch to a full-bridge circuit for bipolar modulation and switch to a half-bridge circuit for unipolar modulation respectively.
[0026] Preferably, it further includes a filter, and the filter is connected in series between load R and inductor L1.
[0027] By setting the filter, the harmonics of the modulation module can be filtered out.
[0028] Preferably, there are two filters, and the first filter and the second filter are connected in series between load R and inductor L1 in sequence.
[0029] Preferably, it further includes NMOS transistor M5. The source of NMOS transistor M5 is connected between the second filter and inductor L1, the drain of NMOS transistor M5 is connected between the first filter and the second filter, and the gate of NMOS transistor M5 is connected to the control signal source IN. Both the first filter and the second filter are LC filters.
[0030] Preferably, the first filter and the second filter each include two inductors and capacitors connected in parallel. Specifically, the first filter includes inductor L2 and capacitor C3 connected in parallel, and the second filter includes inductor L3 and capacitor C4 connected in parallel.
[0031] When the control signal source IN is at a low level, the entire circuit is equivalent to a single-polarity modulation loop (half-bridge structure). At the same time, the gate of NMOS transistor M5 also receives a low level. At this time, the source and drain of NMOS transistor M5 are disconnected, and the first filter and the second filter are equivalently connected in series between the load R and inductor L1. At this time, both the first filter and the second filter are in working states.
[0032] When the control signal source IN is at a high level, the entire circuit is equivalent to a bipolarity modulation loop (full-bridge structure). At the same time, the gate of NMOS transistor M5 also receives a high level. At this time, the source and drain of NMOS transistor M5 are conducting, and the second filter is short-circuited by NMOS transistor M5. Only the first filter is equivalently connected in series between the load R and inductor L1. At this time, the first filter is in a working state, while the second filter is not in a working state.
[0033] By setting two LC filters and the NMOS transistor for controlling the filters, when switching to the full-bridge circuit, in view of its characteristic of generating fewer harmonics, the number of working LC filters can be reduced, and power loss can be decreased. When switching to the half-bridge circuit, in view of its characteristic of generating more harmonics, the number of working LC filters can be increased, and the harmonic output can be reduced.
[0034] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. An SPWM electronic AC pulse width modulation module, characterized in that It includes a DC power supply V, four switch units, two capacitors, two PMOS transistors, two NMOS transistors, a load R, and an inductor L1. The first switch unit and the second switch unit are connected in series and then connected in parallel across the DC power supply V. The third switch unit and the fourth switch unit are connected in series and then connected in parallel across the DC power supply V. The capacitor C1 and the capacitor C2 are connected in series and then connected in parallel across the DC power supply V. One end of the inductor L1 is connected between the third switch unit and the fourth switch unit, and the other end is connected to one end of the load R. The other end of the load R is connected to the drain of the PMOS transistor M1, the source of the PMOS transistor M2, the drain of the NMOS transistor M3, and the source of the NMOS transistor M4. The source of the PMOS transistor M1 and the drain of the PMOS transistor M2 are connected to the point between the capacitor C1 and the capacitor C2. The source of the NMOS transistor M3 and the drain of the NMOS transistor M4 are connected to the point between the first switch unit and the second switch unit. The gates of the PMOS transistor M1, the PMOS transistor M2, the NMOS transistor M3, and the NMOS transistor M4 are commonly connected to the control signal source IN.
2. The SPWM electronic AC pulse width modulation module according to claim 1, characterized in that, The four switch units respectively include a switch transistor and a diode connected in parallel.
3. The SPWM electronic AC pulse width modulation module according to claim 2, characterized in that, It further includes a filter, and the filter is connected in series between the load R and the inductor L1.
4. A SPWM electronic AC pulse width modulation module according to claim 2, characterized in that There are two filters, and the first filter and the second filter are connected in series in sequence between the load R and the inductor L1.
5. A SPWM electronic AC pulse width modulation module according to claim 4, characterized in that, It further includes an NMOS transistor M5. The source of the NMOS transistor M5 is connected between the second filter and the inductor L1, the drain of the NMOS transistor M5 is connected between the first filter and the second filter, and the gate of the NMOS transistor M5 is connected to the control signal source IN.
6. The SPWM electronic AC pulse width modulation module according to claim 5, characterized in that, Both the first filter and the second filter are LC filters.
7. A SPWM electronic AC pulse width modulation module according to claim 6, characterized in that, The first filter and the second filter respectively include two inductors and capacitors connected in parallel.