Embedded dual-system automatic switching circuit and electronic equipment

Abstract

The utility model discloses an embedded dual-system automatic switching circuit and electronic equipment. The embedded dual-system automatic switching circuit comprises a watchdog reset chip U1, a D trigger U2, an analog switch and an MCU (Microprogrammed Control Unit) U4, the MCU micro-control unit U4 comprises a port IO and a port RST, and the watchdog reset chip U1 comprises a port Feed and a port RESET; the D trigger U2 at least comprises a port CK for inputting a clock signal and a port Q for outputting a signal to the analog switch; the analog switch U3 is respectively connected with the D trigger U2 and the MCU micro-control unit U4, and the analog switch U3 is also respectively connected with a memory ROM1 for storing a main system and a memory ROM2 for storing a backup system. According to the scheme, the fault diagnosis and automatic switching mode is simple, the system can be switched in time, normal operation of the machine is guaranteed, the product safety performance is good, and the application range is wide.

Description

Technical Field

[0001] The utility model relates to the field of electronic circuits, in particular to an embedded dual-system automatic switching circuit and electronic equipment. Background Art

[0002] In existing electronic devices, especially in some special equipment with safety requirements, when the main system is damaged or an error occurs and cannot be started, it is necessary to promptly switch to the backup system to ensure the normal operation of the machine. The existing switching method is to determine whether a fault has occurred through fault diagnosis, and then manually switch when a fault occurs. For example, the utility model patent with authorization announcement number CN201716716U provides a backup system for basic input and output system read-only memory data, including a first memory, a second memory, a memory switch, and a switch controller. The first memory and the second memory are connected by a memory switch. The memory switch is connected to the switch controller and controls the switching between the first memory and the second memory through the memory switch. The switch controller is a jumper or switch that can be connected to the housing of the computer system host via a button. When an error occurs in one of the BIOS data, such as data loss, pressing the button can back up the basic input and output system read-only memory data to the other BIOS chip. Therefore, switching between the two memories requires manual switching, and it is impossible to automatically determine the fault and achieve fast automatic switching. It is not suitable for electronic devices that require fast switching. Utility Model Content

[0003] Therefore, in order to solve the above problems, the utility model provides an embedded dual-system automatic switching circuit and electronic equipment.

[0004] The utility model is realized through the following technical solutions:

[0005] An embedded dual-system automatic switching circuit includes a watchdog reset chip U1, a D flip-flop U2, an analog switch and an MCU microcontroller unit U4;

[0006] The MCU micro control unit U4 includes a port IO and a port RST, and the watchdog reset chip U1 includes a port Feed connected to the output end of the port IO, and a port RESET connected to the input end of the port RST;

[0007] The D flip-flop U2 at least includes a port CK connected to the output end of the port RESET of the watchdog reset chip U1 and used to input a clock signal, and a port Q connected to the analog switch and used to output a signal to the analog switch;

[0008] The analog switch U3 is connected to the D flip-flop U2 and the MCU microcontroller unit U4 respectively. The analog switch U3 is also connected to a memory ROM1 for storing a main system and a memory ROM2 for storing a backup system respectively.

[0009] Preferably, the D trigger also includes an inverting output port and data input port D, the inverting output port The output end of is connected to the input end of the data input port D.

[0010] Preferably, the D trigger further includes a set port PRE and a reset port CLR, and the set port PRE and the reset port CLR are respectively connected to a power supply VCC.

[0011] Preferably, a resistor is provided between the reset port CLR and the power supply VCC, and a capacitor is further provided in parallel between the reset port CLR and the resistor, and the capacitor is grounded.

[0012] Preferably, the analog switch U3 includes an input port SW, and the input port is connected to the output end of the port Q of the D flip-flop U2.

[0013] Preferably, the analog switch U3 is connected to the output end of the memory ROM1 and the output end of the memory ROM2 respectively, and the output end of the analog switch U3 is connected to the MCU micro control unit U4.

[0014] An electronic device includes the automatically switchable embedded dual system as described above.

[0015] The beneficial effects of the technical solution of this utility model are mainly reflected in:

[0016] The main system and the backup system are stored in two ROM memories respectively. The watchdog reset chip counts within a preset time period and sends a reset signal to the D flip-flop and the MCU microcontroller unit at the same time, so as to determine whether the main system has a fault. After detecting that the memory ROM1 storing the main system has a fault, the second reset signal is re-issued to make the D flip-flop start the memory ROM2 storing the backup system, thereby realizing the fault judgment of the main system. If the main system is damaged or erroneous and cannot be started, it will automatically switch to the backup system without manual operation. The fault diagnosis and automatic switching methods are simple, and the system can be switched in time to ensure the normal operation of the machine. The product has good safety performance and a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a circuit structure diagram of an embedded dual-system automatic switching circuit. DETAILED DESCRIPTION

[0018] To more clearly and in detail illustrate the objectives, advantages, and features of the present invention, the following non-limiting description of preferred embodiments is provided for illustration and explanation. This embodiment is merely a typical example of the application of the present invention's technical solution. Any technical solution formed by equivalent substitution or equivalent transformation falls within the scope of protection claimed by the present invention.

[0019] Furthermore, the terms "first" and "second" in this solution are used for descriptive purposes only and should not be construed as indicating or implying a ranking of importance or implicitly specifying the number of technical features shown. Therefore, features specified as "first" or "second" may explicitly or implicitly include one or more of such features. In this utility model, "plurality" means two or more, unless otherwise specifically defined.

[0020] The utility model discloses an embedded dual-system automatic switching circuit, such as Figure 1 As shown, it includes a watchdog reset chip U1, a D trigger U2, an analog switch U3 and an MCU microcontroller unit U4.

[0021] The MCU microcontroller unit U4 includes a port IO and a port RST, and the watchdog reset chip U1 includes a port Feed connected to the output end of the port IO, and a port RESET connected to the input end of the port RST; wherein, the port IO is used to periodically send a signal to the port Feed of the watchdog reset chip U1 when the main system is operating normally, so as to perform a "feeding dog" operation, keep the counter of the watchdog chip cleared, and prevent an accidental restart of the system due to a timeout.

[0022] The D flip-flop U2 at least includes a port CK connected to the output end of the port RESET of the watchdog reset chip U1 and used to input a clock signal, and a port Q connected to the analog switch and used to output a signal to the analog switch; the output end of the port RESET is respectively connected to the port RST and the port CK, and can respectively send a reset signal to the MCU microcontroller unit U4 and the D flip-flop U2.

[0023] The analog switch U3 is respectively connected to the D trigger U2 and the MCU microcontroller unit U4. The analog switch U3 is also respectively connected to the memory ROM1 for storing the main system and the memory ROM2 for storing the backup system, and selects the memory ROM1 or the memory ROM2 according to the instruction output by the D trigger U2.

[0024] In some real-time examples, the analog switch U3 includes an input port SW, which is connected to the output end of the port Q of the D flip-flop U2. The analog switch U3 is respectively connected to the output end of the memory ROM1 and the output end of the memory ROM2. The output end of the analog switch U3 is connected to the MCU microcontroller unit U4.

[0025] In some embodiments, the D trigger further includes an inverting output port and data input port D, the inverting output port The output end is connected to the input end of the data input port D, and the D trigger also includes a set port PRE and a reset port CLR, the set port PRE and the reset port CLR are respectively connected to the power supply VCC, a resistor is provided between the reset port CLR and the power supply VCC, and a capacitor is further provided in parallel between the reset port CLR and the resistor, and the capacitor is grounded.

[0026] Table 1 is the logic table of D flip-flop U2

[0027]

[0028] like Figure 1 As shown in Table 1, the specific working mode of the embedded dual-system automatic switching circuit is as follows:

[0029] When the main system is powered on, the D flip-flop U2 is powered on and reset (clear / reset signal) through the reset port CLR, the port Q outputs 0 (i.e. L in the D flip-flop logic table, representing a low level), and the port Output inverted signal 1 (i.e. H in the D flip-flop logic table, representing a high level) to the port D, the watchdog reset chip U1 sends a reset pulse through the port RESET, the reset pulse is input to the port CK of the D flip-flop U2, refer to the D flip-flop logic table in Table 1, the D flip-flop U2 port Q outputs 1, port Output the inverted signal 0. At this time, the analog switch U3 selects to connect the memory ROM1 with the MCU microcontroller unit U4. The reset pulse sent by the port RESET is also input to the port RST, thereby resetting the MCU microcontroller unit U4. At this time, the MCU microcontroller unit U4 boots the system by booting the mirror image in the boot memory ROM1 and enters the main system. After the system starts normally, it outputs a signal to the port Feed through the port IO and performs a "dog feeding" process on the watchdog reset chip U1.

[0030] When the main system is damaged or cannot be started due to an error, the MCU microcontroller unit U4 can no longer perform the "dog feeding" operation regularly through port IO. When the counter of the watchdog reset chip U1 accumulates to the preset maximum value, the watchdog chip sends a second reset signal. After the second reset signal is input to the port CK of the D flip-flop U2, at this time, due to the port CK in the D flip-flop U2 The output is 0, so the port D input is also 0. Therefore, after the second reset signal is input, the port Q of the D flip-flop U2 outputs 0, and the analog switch U3 selects to connect the memory ROM2 with the MCU microcontroller unit U4. The second reset signal sent through the port RESET is also input to the port RST, thereby resetting the MCU microcontroller unit U4. At this time, the MCU microcontroller unit U4 starts the backup system by booting the backup system image in the memory ROM2. After the backup system starts normally, it outputs a signal to the port Feed through port IO, and performs "dog feeding" processing on the watchdog reset chip U1 to realize automatic switching of the backup system.

[0031] The utility model also discloses an electronic device, comprising the above-mentioned automatically switchable embedded dual system.

[0032] There are many implementation methods for the present utility model, and all technical solutions formed by equivalent transformation or equivalent transformation fall within the protection scope of the present utility model.

Claims

1. Embedded dual-system automatic switching circuit, characterized by: Including watchdog reset chip U1, D flip-flop U2, analog switch and MCU micro control unit U4; The MCU micro control unit U4 includes a port IO and a port RST, and the watchdog reset chip U1 includes a port Feed connected to the output end of the port IO, and a port RESET connected to the input end of the port RST; The D flip-flop U2 at least includes a port CK connected to the output end of the port RESET of the watchdog reset chip U1 and used to input a clock signal, and a port Q connected to the analog switch and used to output a signal to the analog switch; The analog switch U3 is connected to the D flip-flop U2 and the MCU microcontroller unit U4 respectively. The analog switch U3 is also connected to a memory ROM1 for storing a main system and a memory ROM2 for storing a backup system respectively.

2. The embedded dual-system automatic switching circuit according to claim 1, characterized in that: The D transmitter also includes an inverting output port and data input port D, the inverting output port The output end of is connected to the input end of the data input port D.

3. The embedded dual-system automatic switching circuit according to claim 2, characterized in that: The D trigger further includes a set port PRE and a reset port CLR, and the set port PRE and the reset port CLR are respectively connected to a power supply VCC.

4. The embedded dual-system automatic switching circuit according to claim 3, characterized in that: A resistor is provided between the reset port CLR and the power supply VCC. A capacitor is further provided in parallel between the reset port CLR and the resistor, and the capacitor is grounded.

5. The embedded dual-system automatic switching circuit according to claim 1, characterized in that: The analog switch U3 includes an input port SW, and the input port SW is connected to the output end of the port Q of the D flip-flop U2.

6. The embedded dual-system automatic switching circuit according to claim 5, characterized in that: The analog switch U3 is connected to the output end of the memory ROM1 and the output end of the memory ROM2 respectively, and the output end of the analog switch U3 is connected to the MCU micro control unit U4.

7. Electronic equipment, characterized in that: It comprises the embedded dual-system automatic switching circuit as described in any one of claims 1-6.

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