Intelligent lightning protection centralized acquisition circuit

Abstract

The utility model belongs to the technical field of acquisition circuits, and particularly relates to an intelligent lightning protection centralized acquisition circuit, which comprises a single chip microcomputer electrically connected with a terminal polling circuit, a display circuit, a first upper computer communication circuit, a second upper computer communication circuit, a second upper computer communication circuit, a third upper computer communication circuit, a fourth upper computer communication circuit and a fourth upper computer communication circuit. The single-chip microcomputer is electrically connected with a second upper computer communication circuit, and the single-chip microcomputer is electrically connected with a third upper computer communication circuit. According to the utility model, through arranging the plurality of polling interfaces, the number of access equipment can be increased, the demand of acquisition equipment can be reduced, the problems that the existing product is only provided with one uploading interface, the application limitation is large and the uploading communication mode is single can be avoided, and through arranging the maximum five polling interfaces in the scheme, the number of mounted equipment can be greatly increased; and meanwhile, five uploading modes are provided, and all-channel flexible networking is adapted to various communication environments to the greatest extent.

Description

Technical Field

[0001] The utility model relates to the technical field of acquisition circuits, in particular to an intelligent lightning protection centralized acquisition circuit. Background Art

[0002] A lightning protection centralized collection circuit is a circuit used to protect circuits or equipment from lightning strikes or electromagnetic interference. It usually includes lightning protection devices, such as lightning rods, lightning arresters or electromagnetic shielding devices, as well as other protection components, such as fuses and overvoltage protectors. These protection components can guide lightning strikes or electromagnetic interference to the ground, minimizing damage to the circuits or equipment.

[0003] However, the existing lightning protection centralized data collection circuit still has certain shortcomings: the current products have two important shortcomings. One is that there are few polling interfaces and access devices, and many data collection devices are required, resulting in high power consumption. The second is that the upload communication method is single, and a set of products only has one upload interface, which leads to large application limitations. Utility Model Content

[0004] The purpose of the utility model is to provide an intelligent lightning protection centralized acquisition circuit, which solves the problem that the lightning peak acquisition circuit has few polling interfaces, few access devices, and many acquisition devices are required, resulting in high power consumption. It also solves the problem that the upload communication method is single and a set of products has only one upload interface, resulting in large application limitations.

[0005] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: an intelligent lightning protection centralized acquisition circuit, comprising a single-chip microcomputer, the single-chip microcomputer is electrically connected to a terminal polling circuit, the single-chip microcomputer is electrically connected to a display circuit, the single-chip microcomputer is electrically connected to a first host computer communication circuit, the single-chip microcomputer is electrically connected to a second host computer communication circuit, the single-chip microcomputer is electrically connected to a third host computer communication circuit, the single-chip microcomputer is electrically connected to a fourth host computer communication circuit, the single-chip microcomputer is electrically connected to a fifth host computer communication circuit, and the model of the first host computer communication circuit is a host computer communication circuit. -RS485, the model of the second host computer communication circuit is host computer communication circuit-RS232, the model of the third host computer communication circuit is host computer communication circuit-ETH, the model of the fourth host computer communication circuit is host computer communication circuit-GPRS, and the model of the fifth host computer communication circuit is host computer communication circuit-LORA. Through the coordinated use of host computer communication circuit-RS485, host computer communication circuit-RS232, host computer communication circuit-ETH, host computer communication circuit-GPRS, and host computer communication circuit-LORA, the normal transmission, conversion, and output of signals can be guaranteed.

[0006] Preferably, the single-chip microcomputer includes a storage, a reset circuit, a power management circuit, an input / output interface, a non-reset circuit, an analog input / output interface and an eighth chip, the storage is electrically connected to a first start pin, the storage is electrically connected to a second data sending pin, the storage is electrically connected to a second data receiving pin, the storage is electrically connected to a first data sending pin, the storage is electrically connected to a first data receiving pin, the storage is electrically connected to a second start pin, the storage is electrically connected to a third data sending pin, the storage is electrically connected to a third data receiving pin, the storage is electrically connected to a fourth data sending pin, the storage is electrically connected to a fourth data receiving pin, the storage is electrically connected to a fifth data sending pin, and the storage is electrically connected to a fifth data receiving pin. By setting structural units such as the storage, the first start pin, the first data sending pin, and the third data receiving pin, the data storage function of the single-chip microcomputer can be guaranteed.

[0007] Preferably, the reset circuit is electrically connected to a fifteenth resistor, the fifteenth resistor is electrically connected to a switch via a reset pin, the switch is electrically connected to a sixth capacitor, the power management circuit is electrically connected to a first power pin, the input / output interface is electrically connected to a nineteenth resistor, the nineteenth resistor is electrically connected to a twentieth resistor, the non-reset circuit is electrically connected to a twenty-second resistor, the twenty-second resistor is electrically connected to an eighth capacitor, the analog input / output interface is electrically connected to an external vibrator input pin, the analog input / output interface is electrically connected to an external vibrator output pin, and the external vibrator A ninth capacitor is electrically connected to the input pin of the device, a tenth capacitor is electrically connected to the output pin of the external vibrator, the tenth capacitor is electrically connected to the ninth capacitor, a fifteenth capacitor is electrically connected to the eighth chip, a twenty-eighth resistor is electrically connected to the eighth chip, the twenty-eighth resistor is electrically connected to the fifteenth capacitor, a twenty-ninth resistor is electrically connected to the eighth chip, the twenty-ninth resistor is electrically connected to the twenty-eighth resistor. By using the reset circuit, the power management circuit, the input / output interface, the non-reset circuit, the analog input / output interface and the eighth chip in combination, it can be ensured that the single-chip microcomputer has good timing, stable power supply and other functions.

[0008] Preferably, the terminal polling circuit includes a polling circuit 1, a polling circuit 2, and a polling circuit 3. The polling circuit 1 is electrically connected to a first filter and a second filter, the first filter is electrically connected to a first diode, the second filter is electrically connected to a fourth diode, a third diode is electrically connected between the fourth diode and the first diode, the first filter is electrically connected to a third resistor, the second filter is electrically connected to a ninth resistor, the third resistor is electrically connected to a first capacitor, the ninth resistor is electrically connected to a fourth resistor, the polling circuit 2 is electrically connected to a third filter and a fourth filter, the third filter is electrically connected to a fifth diode, the fourth filter is electrically connected to a seventh diode, a sixth diode is electrically connected between the seventh diode and the fifth diode, and the third filter is electrically connected to There is a twelfth resistor, a fourteenth resistor is electrically connected to the fourth filter, a fourth capacitor is electrically connected to the twelfth resistor, a thirteenth resistor is electrically connected to the fourteenth resistor, a fifth filter and a sixth filter are electrically connected to the polling circuit three, an eighth diode is electrically connected to the fifth filter, a tenth diode is electrically connected to the sixth filter, a ninth diode is electrically connected between the tenth diode and the eighth diode, a sixteenth resistor is electrically connected to the fifth filter, an eighteenth resistor is electrically connected to the sixth filter, a fifth capacitor is electrically connected to the sixteenth resistor, and a seventeenth resistor is electrically connected to the eighteenth resistor. By setting structural units such as the polling circuit one, the polling circuit two and the polling circuit three, the normal sending of the URAT communication command can be guaranteed, and the communication interface can be improved to adapt to various communication environments.

[0009] Preferably, the display circuit includes a second chip, the second chip is electrically connected to a first light-emitting diode, the first light-emitting diode is electrically connected to a thirtieth resistor, the first light-emitting diode is electrically connected to a thirty-first resistor, the first light-emitting diode is electrically connected to a thirty-second resistor, the first light-emitting diode is electrically connected to a thirty-third resistor, the first light-emitting diode is electrically connected to a thirty-fourth resistor, the first light-emitting diode is electrically connected to a thirty-fifth resistor, the thirty-fifth resistor is electrically connected to the second chip, the first light-emitting diode is electrically connected to a thirty-sixth resistor, the thirty-sixth resistor is electrically connected to the second chip, and the first light-emitting diode is electrically connected to the tenth resistor. By setting up the second chip, the first light-emitting diode and other structural units, the normal operation of the display circuit can be guaranteed to display the current address, device program number, etc.

[0010] Preferably, the first host computer communication circuit includes a communication circuit 1 and a communication circuit 2, the communication circuit 1 is electrically connected to a seventh filter and an eighth filter, the seventh filter is electrically connected to an eleventh diode, the eighth filter is electrically connected to a thirteenth diode, a twelfth diode is electrically connected between the thirteenth diode and the eleventh diode, the seventh filter is electrically connected to a twenty-first resistor, the eighth filter is electrically connected to a twenty-fourth resistor, the twenty-first resistor is electrically connected to a seventh capacitor, the twenty-fourth resistor is electrically connected to a twenty-third resistor, the communication circuit 2 is electrically connected to a tenth filter and a twelfth filter, the tenth filter is electrically connected to A fourteenth diode is connected, a sixteenth diode is electrically connected to the twelfth filter, a fifteenth diode is electrically connected between the sixteenth diode and the fourteenth diode, a twenty-fifth resistor is electrically connected to the tenth filter, a twenty-seventh resistor is electrically connected to the twelfth filter, a thirteenth capacitor is electrically connected to the twenty-fifth resistor, and a twenty-sixth resistor is electrically connected to the twenty-seventh resistor. Through the setting of structural units such as the communication circuit one and the communication circuit two, the command can be sent to the 485 chip through URAT communication, and then converted into an RS485 bus through the 485 chip to communicate with the host computer using the standard MODBUS protocol, and can also be flexibly combined with the terminal polling circuit.

[0011] Preferably, the second host computer communication circuit includes a ninth filter and an eleventh filter, the ninth filter is electrically connected to a twelfth capacitor, the twelfth capacitor is electrically connected to an eleventh capacitor, the ninth filter is electrically connected to a fourteenth capacitor, the eleventh filter is electrically connected to a sixteenth capacitor, and the eleventh filter is electrically connected to a seventeenth capacitor. Through the setting of structural units such as the ninth filter, the eleventh filter and the twelfth capacitor, the command can be sent to the 232 chip through URAT communication, and then converted into an RS232 bus through the 232 chip to communicate with the host computer using the standard MODBUS protocol.

[0012] Preferably, the third host computer communication circuit includes a seventh chip, the seventh chip is electrically connected to a ground pin, the seventh chip is electrically connected to a data sending pin, the seventh chip is electrically connected to a data receiving pin, the seventh chip is electrically connected to a light emitting diode pin, and the seventh chip is electrically connected to an indication pin. Through the setting of the seventh chip and other structural units, the command can be sent to the super network port through URAT communication, and then converted into a network cable through the super network port to communicate with the host computer using MODBUS / TCP or a custom protocol.

[0013] Preferably, the fourth host computer communication circuit includes a first chip, an eighth resistor and a fifth resistor, the first chip is electrically connected to a power pin, the first chip is electrically connected to a data pin, the first chip is electrically connected to a power supply pin, the eighth resistor is electrically connected to a second transistor, the second transistor is electrically connected to a seventh resistor, the second transistor is electrically connected to a second resistor, the second resistor is electrically connected to the seventh resistor, the fifth resistor is electrically connected to the first transistor, the first transistor is electrically connected to the first resistor, the first transistor is electrically connected to a second capacitor, the second capacitor is electrically connected to the first resistor, the second capacitor is electrically connected to a sixth resistor, and the sixth resistor is electrically connected to the first transistor. Through the setting of structural units such as the first chip, the eighth resistor and the fifth resistor, the command can be sent to the GPRS module through URAT communication, and the 4G / 5G Internet of Things converted by the GPRS module uses TCP / UDP or a custom protocol to communicate with the host computer.

[0014] Preferably, the fifth host computer communication circuit includes a sixth chip, the sixth chip is electrically connected to a data sending end, the sixth chip is electrically connected to a data receiving end, and through the setting of the sixth chip and other structural units, the command can be sent to the LORA module through URAT communication, and then converted into a 2.4G wireless LAN through the LORA module to communicate with the host computer using TCP / UDP or a custom protocol.

[0015] The beneficial effects of the utility model are as follows:

[0016] This utility model can increase the number of access devices and reduce the demand for collection equipment by setting up multiple polling interfaces, avoiding the problem that existing products only have one upload interface, large application limitations, and a single upload communication method. The setting of a maximum of 5 polling interfaces in this solution can greatly increase the number of mounted devices, and at the same time has 5 upload methods, and flexible full-channel networking can adapt to various communication environments to the greatest extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is the flow chart of the intelligent lightning protection centralized acquisition circuit of the utility model;

[0018] Figure 2 For the utility model Figure 1 MCU circuit diagram;

[0019] Figure 3 For the utility model Figure 1 Schematic diagram of terminal polling circuit;

[0020] Figure 4 For the utility model Figure 1 Schematic diagram of the display circuit;

[0021] Figure 5 For the utility model Figure 1 Schematic diagram of the first host computer communication circuit;

[0022] Figure 6 For the utility model Figure 1 Schematic diagram of the communication circuit of the second host computer;

[0023] Figure 7 For the utility model Figure 1 Schematic diagram of the communication circuit of the third host computer;

[0024] Figure 8 For the utility model Figure 1 Schematic diagram of the fourth host computer communication circuit;

[0025] Figure 9 For the utility model Figure 1 Schematic diagram of the fifth host computer communication circuit.

[0026] In the figure: 1, single-chip microcomputer; 2, terminal polling circuit; 3, display circuit; 4, first host computer communication circuit; 5, second host computer communication circuit; 6, third host computer communication circuit; 7, fourth host computer communication circuit; 8, fifth host computer communication circuit; BOOT0, first boot pin; BOOT1, second boot pin; TX1, first transmit data pin; TX2, second transmit data pin; TX3, third transmit data pin; TX4, fourth transmit data pin; TX5, fifth transmit data pin; RX1, first receive data pin; RX2, second receive data pin; RX3, third receive data pin; RX4, fourth receive data pin; RX5, fifth receive data pin; R1, first resistor; R2, second resistor;

[0027] R3, the third resistor; R4, the fourth resistor; R5, the fifth resistor; R6, the sixth resistor; R7, the seventh resistor; R8, the eighth resistor; R9, the ninth resistor; R10, the tenth resistor; R12, the twelfth resistor; R13, the thirteenth resistor; R14, the fourteenth resistor; R15, the fifteenth resistor; R16, the sixteenth resistor; R17, the seventeenth resistor; R18, the eighteenth resistor; R19, the nineteenth resistor; R20, the twentieth resistor; R21, the twenty-first resistor; R22, the twenty-second resistor; R23, the twenty-third resistor; R24, the twenty-fourth resistor; R25, the twenty-fifth resistor; R26, the twenty-sixth resistor; R27, the twenty-seventh resistor; R28, the twenty-eighth resistor; R29, the twenty-ninth resistor; R30, the thirtieth resistor; R31, the thirty-first resistor;

[0028] R32, the 32nd resistor; R33, the 33rd resistor; R34, the 34th resistor; R35, the 35th resistor; R36, the 36th resistor; C1, the first capacitor; C2, the second capacitor; C4, the fourth capacitor; C5, the fifth capacitor; C6, the sixth capacitor; C7, the seventh capacitor; C8, the eighth capacitor; C9, the ninth capacitor; C10, the tenth capacitor; C11, the eleventh capacitor;

[0029] C12, the twelfth capacitor; C13, the thirteenth capacitor; C14, the fourteenth capacitor; C15, the fifteenth capacitor; C16, the sixteenth capacitor; C17, the seventeenth capacitor; U1, the first chip; U2, the second chip; U6, the sixth chip; U7, the seventh chip; U8, the eighth chip; F1, the first filter; F2, the second filter; F3, the third filter; F4, the fourth filter; F5, the fifth filter; F6, the sixth filter; F7, the seventh filter; F8, the eighth filter; F9, the ninth filter; F10, the tenth filter; F11, the 11th filter; F12, 12th filter; D1, first diode; D3, third diode; D4, fourth diode; D5, fifth diode; D6, sixth diode; D7, seventh diode; D8, eighth diode; D9, ninth diode; D10, tenth diode; D11, eleventh diode; D12, twelfth diode; D13, thirteenth diode; D14, fourteenth diode; D15, fifteenth diode; D16, sixteenth diode; LED1, first light-emitting diode; Q1, first transistor; Q2, second transistor. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0031] See also Figures 1-9, an intelligent lightning protection centralized acquisition circuit, including a single-chip microcomputer 1, a terminal polling circuit 2 is electrically connected to the single-chip microcomputer 1, a display circuit 3 is electrically connected to the single-chip microcomputer 1, a first host computer communication circuit 4 is electrically connected to the single-chip microcomputer 1, a second host computer communication circuit 5 is electrically connected to the single-chip microcomputer 1, a third host computer communication circuit 6 is electrically connected to the single-chip microcomputer 1, a fourth host computer communication circuit 7 is electrically connected to the single-chip microcomputer 1, and a fifth host computer communication circuit 8 is electrically connected to the single-chip microcomputer 1, and the model of the first host computer communication circuit 4 is a host computer communication circuit-RS485, and the second host computer communication circuit 4 is a host computer communication circuit-RS485. The model of the host communication circuit 5 is the host communication circuit-RS232, the model of the third host communication circuit 6 is the host communication circuit-ETH, the model of the fourth host communication circuit 7 is the host communication circuit-GPRS, and the model of the fifth host communication circuit 8 is the host communication circuit-LORA. Through the coordinated use of the host communication circuit-RS485, the host communication circuit-RS232, the host communication circuit-ETH, the host communication circuit-GPRS, and the host communication circuit-LORA, the normal transmission, conversion, and output of the signal can be guaranteed.

[0032] See also Figure 1 、 Figure 2The single-chip computer 1 includes a memory, a reset circuit, a power management circuit, an input / output interface, a non-reset circuit, an analog input / output interface and an eighth chip U8. The memory is electrically connected to a first boot pin BOOT0, a second data transmission pin TX2, a second data reception pin RX2, a first data transmission pin TX1, a first data reception pin RX1, a second boot pin BOOT1, a third data transmission pin TX3, and a second data reception pin RX1. The third receiving data pin RX3 is connected, the storage is electrically connected to the fourth sending data pin TX4, the storage is electrically connected to the fourth receiving data pin RX4, the storage is electrically connected to the fifth sending data pin TX5, and the storage is electrically connected to the fifth receiving data pin RX5. By setting the structural units such as the storage, the first startup pin BOOT0, the first sending data pin TX1, and the third receiving data pin RX3, the data storage function of the single-chip computer 1 can be guaranteed. The reset circuit is electrically connected to the fifteenth resistor R15, and the fifteenth resistor R15 is electrically connected to a switch through the reset pin. The switch is powered on. The sixth capacitor C6 is electrically connected to the analog input / output interface, the power management circuit is electrically connected to the first power pin, the input / output interface is electrically connected to a nineteenth resistor R19, the nineteenth resistor R19 is electrically connected to a twentieth resistor R20, the non-reset circuit is electrically connected to a twenty-second resistor R22, the twenty-second resistor R22 is electrically connected to an eighth capacitor C8, the analog input / output interface is electrically connected to an external vibrator input pin, the analog input / output interface is electrically connected to an external vibrator output pin, the external vibrator input pin is electrically connected to a ninth capacitor C9, and the external vibrator output pin is electrically connected to a tenth capacitor C9. Capacitor C10, the tenth capacitor C10 is electrically connected to the ninth capacitor C9, the eighth chip U8 is electrically connected to the fifteenth capacitor C15, the eighth chip U8 is electrically connected to the twenty-eighth resistor R28, the twenty-eighth resistor R28 is electrically connected to the fifteenth capacitor C15, the eighth chip U8 is electrically connected to the twenty-ninth resistor R29, the twenty-ninth resistor R29 is electrically connected to the twenty-eighth resistor R28, through the coordinated use of the reset circuit, the power management circuit, the input / output interface, the non-reset circuit, the analog input / output interface and the eighth chip U8, it can be ensured that the single-chip microcomputer 1 has good timing, stable power supply and other functions.

[0033] See also Figure 1 、 Figure 3The terminal polling circuit 2 includes a polling circuit 1, a polling circuit 2, and a polling circuit 3. The polling circuit 1 is electrically connected to a first filter F1 and a second filter F2. The first filter F1 is electrically connected to a first diode D1. The second filter F2 is electrically connected to a fourth diode D4. A third diode D3 is electrically connected between the fourth diode D4 and the first diode D1. The first filter F1 is electrically connected to a third resistor R3. The second filter F2 is electrically connected to a ninth resistor R9. The third resistor R3 is electrically connected to a first capacitor C1. The ninth resistor R9 is electrically connected to a fourth resistor R4. The polling circuit 2 is electrically connected to the third filter F3 and the fourth filter F4. The third filter F3 is electrically connected to a fifth diode D5. The fourth filter F4 is electrically connected to a seventh diode D7. A sixth diode D6 is electrically connected between the seventh diode D7 and the fifth diode D5. The third filter F3 is electrically connected to a twelfth resistor R 12, the fourth filter F4 is electrically connected to a fourteenth resistor R14, the twelfth resistor R12 is electrically connected to a fourth capacitor C4, the fourteenth resistor R14 is electrically connected to a thirteenth resistor R13, the polling circuit three is electrically connected to a fifth filter F5 and a sixth filter F6, the fifth filter F5 is electrically connected to an eighth diode D8, the sixth filter F6 is electrically connected to a tenth diode D10, and a ninth diode D9 is electrically connected between the tenth diode D10 and the eighth diode D8, the fifth filter F5 is electrically connected to a sixteenth resistor R16, the sixth filter F6 is electrically connected to an eighteenth resistor R18, the sixteenth resistor R16 is electrically connected to a fifth capacitor C5, and the eighteenth resistor R18 is electrically connected to a seventeenth resistor R17. By configuring the structural units such as the polling circuit one, the polling circuit two, and the polling circuit three, the normal transmission of URAT communication commands can be ensured, and the communication interface can be improved to adapt to various communication environments.

[0034] See also Figure 1 、 Figure 4The display circuit 3 includes a second chip U2, the second chip U2 is electrically connected to the first light-emitting diode LED1, the first light-emitting diode LED1 is electrically connected to the thirtieth resistor R30, the first light-emitting diode LED1 is electrically connected to the thirty-first resistor R31, the first light-emitting diode LED1 is electrically connected to the thirty-second resistor R32, the first light-emitting diode LED1 is electrically connected to the thirty-third resistor R33, the first light-emitting diode LED1 is electrically connected to the thirty-fourth resistor R34, the first light-emitting diode LED1 is electrically connected to the thirty-fifth resistor R35, the thirty-fifth resistor R35 is electrically connected to the second chip U2, the first light-emitting diode LED1 is electrically connected to the thirty-sixth resistor R36, the thirty-sixth resistor R36 is electrically connected to the second chip U2, and the first light-emitting diode LED1 is electrically connected to the tenth resistor R10. Through the arrangement of the second chip U2, the first light-emitting diode LED1 and other structural units, the normal operation of the display circuit 3 can be guaranteed to display the current address, device program number, etc.

[0035] See also Figure 1 、 Figure 5 The first host computer communication circuit 4 includes a communication circuit 1 and a communication circuit 2. The communication circuit 1 is electrically connected to a seventh filter F7 and an eighth filter F8. The seventh filter F7 is electrically connected to an eleventh diode D11. The eighth filter F8 is electrically connected to a thirteenth diode D13. A twelfth diode D12 is electrically connected between the thirteenth diode D13 and the eleventh diode D11. The seventh filter F7 is electrically connected to a twenty-first resistor R21. The eighth filter F8 is electrically connected to a twenty-fourth resistor R24. The twenty-first resistor R21 is electrically connected to a seventh capacitor C7. The twenty-fourth resistor R24 is electrically connected to a twenty-third resistor R23. The communication circuit 2 is electrically connected to a tenth filter F10 and a twelfth filter F12. The tenth filter F10 is electrically connected to There is a fourteenth diode D14, a sixteenth diode D16 is electrically connected to the twelfth filter F12, a fifteenth diode D15 is electrically connected between the sixteenth diode D16 and the fourteenth diode D14, a twenty-fifth resistor R25 is electrically connected to the tenth filter F10, a twenty-seventh resistor R27 is electrically connected to the twelfth filter F12, a thirteenth capacitor C13 is electrically connected to the twenty-fifth resistor R25, and a twenty-sixth resistor R26 is electrically connected to the twenty-seventh resistor R27. Through the setting of structural units such as the communication circuit 1 and the communication circuit 2, the command can be sent to the 485 chip through URAT communication, and then converted into an RS485 bus through the 485 chip to communicate with the host computer using the standard MODBUS protocol, and can also be flexibly combined with the terminal polling circuit 2.

[0036] See also Figure 1 、 Figure 6 The second host computer communication circuit 5 includes a ninth filter F9 and an eleventh filter F11. The ninth filter F9 is electrically connected to a twelfth capacitor C12, the twelfth capacitor C12 is electrically connected to an eleventh capacitor C11, the ninth filter F9 is electrically connected to a fourteenth capacitor C14, the eleventh filter F11 is electrically connected to a sixteenth capacitor C16, and the eleventh filter F11 is electrically connected to a seventeenth capacitor C17. Through the arrangement of structural units such as the ninth filter F9, the eleventh filter F11, and the twelfth capacitor C12, commands can be sent to the 232 chip through URAT communication, and then converted into an RS232 bus by the 232 chip to communicate with the host computer using the standard MODBUS protocol.

[0037] See also Figure 1 、 Figure 7 The third host computer communication circuit 6 includes a seventh chip U7, the seventh chip U7 is electrically connected to a ground pin, the seventh chip U7 is electrically connected to a data sending pin, the seventh chip U7 is electrically connected to a data receiving pin, the seventh chip U7 is electrically connected to a light emitting diode pin, and the seventh chip U7 is electrically connected to an indication pin. Through the setting of the seventh chip U7 and other structural units, the command can be sent to the super network port through URAT communication, and then converted into a network cable through the super network port to communicate with the host computer using MODBUS / TCP or a custom protocol.

[0038] See also Figure 1 、 Figure 8 The fourth host computer communication circuit 7 includes a first chip U1, an eighth resistor R8 and a fifth resistor R5. The first chip U1 is electrically connected to a power pin, the first chip U1 is electrically connected to a data pin, the first chip U1 is electrically connected to a power supply pin, the eighth resistor R8 is electrically connected to a second transistor Q2, the second transistor Q2 is electrically connected to a seventh resistor R7, the second transistor Q2 is electrically connected to a second resistor R2, the second resistor R2 and the seventh resistor R7 are electrically connected, the fifth resistor R5 is electrically connected to the first transistor Q1, the first transistor Q 1 is electrically connected to a first resistor R1, a first transistor Q1 is electrically connected to a second capacitor C2, the second capacitor C2 is electrically connected to the first resistor R1, the second capacitor C2 is electrically connected to a sixth resistor R6, and the sixth resistor R6 is electrically connected to the first transistor Q1. Through the setting of structural units such as the first chip U1, the eighth resistor R8 and the fifth resistor R5, a command can be sent to the GPRS module through URAT communication, and then converted into a 4G / 5G Internet of Things through the GPRS module to communicate with the host computer using TCP / UDP or a custom protocol.

[0039] See also Figure 1 、 Figure 9The fifth host computer communication circuit 8 includes a sixth chip U6, the sixth chip U6 is electrically connected to a data sending end, and the sixth chip U6 is electrically connected to a data receiving end. Through the setting of the sixth chip U6 and other structural units, the command can be sent to the LORA module through URAT communication, and then converted into a 2.4G wireless LAN through the LORA module to communicate with the host computer using TCP / UDP or a custom protocol.

[0040] The specific implementation process of this utility model is as follows:

[0041] 1. The circuit of the single-chip computer 1 includes reset, external crystal oscillator, external storage, filtering, storage, reset circuit, power management circuit, input / output interface, non-reset circuit, analog input / output interface and other circuits, which can provide the single-chip computer 1 with functions such as timer, data storage, and stable power supply;

[0042] 2. The terminal polling circuit 2 can send commands to the 485 chip through URAT communication, which is then converted into RS485 bus communication commands to the terminal device through the 485 chip. After receiving the polling command, the terminal device also uploads the response command to the terminal polling circuit 2 through the RS485 bus.

[0043] 3. Display circuit 3 can display the current address, device program number, etc. through the four-digit digital tube display circuit. The digital tube display circuit controls the digital tube display to display the current address, device program number, etc. through the SDL refresh driver chip;

[0044] 4. The first host computer communication circuit 4 can send commands to the 485 chip through URAT communication, and then convert it into RS485 bus through the 485 chip to communicate with the host computer using the standard MODBUS protocol. It can also be converted into a terminal polling circuit 2 for flexible combination;

[0045] 5. The second host computer communication circuit 5 can send commands to the 232 chip through URAT communication, and then convert the 232 chip into RS232 bus and use the standard MODBUS protocol to communicate with the host computer;

[0046] 6. The third host computer communication circuit 6 can send commands to the super network port through URAT communication, and then convert the super network port into a network cable to communicate with the host computer using MODBUS / TCP or a custom protocol;

[0047] 7. The fourth host computer communication circuit 7 can send commands to the GPRS module through URAT communication, and then convert it into 4G / 5G Internet of Things through the GPRS module to communicate with the host computer using TCP / UDP or custom protocol;

[0048] 8. The fifth host computer communication circuit 8 can send commands to the LoRa module through URAT communication, and then convert it into a 2.4G wireless LAN through the LoRa module to communicate with the host computer using TCP / UDP or custom protocol.

[0049] Although the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations may be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An intelligent lightning protection centralized data acquisition circuit, comprising a single chip microcomputer (1), characterized in that: The single-chip microcomputer (1) is electrically connected to a terminal polling circuit (2), the single-chip microcomputer (1) is electrically connected to a display circuit (3), the single-chip microcomputer (1) is electrically connected to a first host computer communication circuit (4), the single-chip microcomputer (1) is electrically connected to a second host computer communication circuit (5), the single-chip microcomputer (1) is electrically connected to a third host computer communication circuit (6), the single-chip microcomputer (1) is electrically connected to a fourth host computer communication circuit (7), and the single-chip microcomputer (1) is electrically connected to a fifth host computer communication circuit (8).

2. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The single chip computer (1) includes a memory, a reset circuit, a power management circuit, an input / output interface, a non-reset circuit, an analog input / output interface and an eighth chip (U8), wherein the memory is electrically connected to a first boot pin (BOOT0), the memory is electrically connected to a second data transmission pin (TX2), the memory is electrically connected to a second data reception pin (RX2), the memory is electrically connected to a first data transmission pin (TX1), the memory is electrically connected to a first data reception pin (RX1), the memory is electrically connected to a second boot pin (BOOT1), the memory is electrically connected to a third data transmission pin (TX3), the memory is electrically connected to a third data reception pin (RX3), the memory is electrically connected to a fourth data transmission pin (TX4), the memory is electrically connected to a fourth data reception pin (RX4), the memory is electrically connected to a fifth data transmission pin (TX5), and the memory is electrically connected to a fifth data reception pin (RX5).

3. The intelligent lightning protection centralized data collection circuit according to claim 2, characterized in that: The reset circuit is electrically connected to a fifteenth resistor (R15), the fifteenth resistor (R15) is electrically connected to a switch via a reset pin, the switch is electrically connected to a sixth capacitor (C6), the power management circuit is electrically connected to a first power pin, the input / output interface is electrically connected to a nineteenth resistor (R19), the nineteenth resistor (R19) is electrically connected to a twentieth resistor (R20), the non-reset circuit is electrically connected to a twenty-second resistor (R22), the twenty-second resistor (R22) is electrically connected to an eighth capacitor (C8), the analog input / output interface is electrically connected to an external vibrator input pin, and the analog input / output interface The eighth chip (U8) is electrically connected to a fifteenth capacitor (C15), the eighth chip (U8) is electrically connected to a twenty-eighth resistor (R28), the twenty-eighth resistor (R28) is electrically connected to the fifteenth capacitor (C15), the eighth chip (U8) is electrically connected to a twenty-ninth resistor (R29), and the twenty-ninth resistor (R29) is electrically connected to the twenty-eighth resistor (R28).

4. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The terminal polling circuit (2) comprises a polling circuit 1, a polling circuit 2 and a polling circuit 3; the polling circuit 1 is electrically connected to a first filter (F1) and a second filter (F2); the first filter (F1) is electrically connected to a first diode (D1); the second filter (F2) is electrically connected to a fourth diode (D4); a third diode (D3) is electrically connected between the fourth diode (D4) and the first diode (D1); the first filter (F1) is electrically connected to a third resistor (R3); The second filter (F2) is electrically connected to a ninth resistor (R9), the third resistor (R3) is electrically connected to a first capacitor (C1), the ninth resistor (R9) is electrically connected to a fourth resistor (R4), the polling circuit 2 is electrically connected to the third filter (F3) and the fourth filter (F4), the third filter (F3) is electrically connected to a fifth diode (D5), the fourth filter (F4) is electrically connected to a seventh diode (D7), and the seventh diode (D7) and the fifth diode (D5) are electrically connected. A sixth diode (D6) is electrically connected between the first and second filters (F3), a twelfth resistor (R12) is electrically connected to the third filter (F3), a fourteenth resistor (R14) is electrically connected to the fourth filter (F4), a fourth capacitor (C4) is electrically connected to the twelfth resistor (R12), a thirteenth resistor (R13) is electrically connected to the fourteenth resistor (R14), a fifth filter (F5) and a sixth filter (F6) are electrically connected to the polling circuit 3, and an eighth diode is electrically connected to the fifth filter (F5). (D8), the sixth filter (F6) is electrically connected to a tenth diode (D10), a ninth diode (D9) is electrically connected between the tenth diode (D10) and the eighth diode (D8), the fifth filter (F5) is electrically connected to a sixteenth resistor (R16), the sixth filter (F6) is electrically connected to an eighteenth resistor (R18), the sixteenth resistor (R16) is electrically connected to a fifth capacitor (C5), and the eighteenth resistor (R18) is electrically connected to a seventeenth resistor (R17).

5. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The display circuit (3) includes a second chip (U2), the second chip (U2) is electrically connected to a first light-emitting diode (LED1), the first light-emitting diode (LED1) is electrically connected to a thirtieth resistor (R30), the first light-emitting diode (LED1) is electrically connected to a thirty-first resistor (R31), the first light-emitting diode (LED1) is electrically connected to a thirty-second resistor (R32), the first light-emitting diode (LED1) is electrically connected to a thirty-third resistor (R33), the first light-emitting diode (LED1) is electrically connected to a thirty-fourth resistor (R34), the first light-emitting diode (LED1) is electrically connected to a thirty-fifth resistor (R35), the thirty-fifth resistor (R35) is electrically connected to the second chip (U2), the first light-emitting diode (LED1) is electrically connected to a thirty-sixth resistor (R36), the thirty-sixth resistor (R36) is electrically connected to the second chip (U2), and the first light-emitting diode (LED1) is electrically connected to a tenth resistor (R10).

6. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The first host computer communication circuit (4) comprises a communication circuit 1 and a communication circuit 2, wherein the communication circuit 1 is electrically connected to a seventh filter (F7) and an eighth filter (F8), the seventh filter (F7) is electrically connected to an eleventh diode (D11), the eighth filter (F8) is electrically connected to a thirteenth diode (D13), a twelfth diode (D12) is electrically connected between the thirteenth diode (D13) and the eleventh diode (D11), the seventh filter (F7) is electrically connected to a twenty-first resistor (R21), the eighth filter (F8) is electrically connected to a twenty-fourth resistor (R24), the twenty-first resistor (R21) is electrically connected to a seventh capacitor (C7), the twenty-fourth resistor (R24) is electrically connected to a twenty-first Three resistors (R23), the communication circuit 2 is electrically connected to a tenth filter (F10) and a twelfth filter (F12), the tenth filter (F10) is electrically connected to a fourteenth diode (D14), the twelfth filter (F12) is electrically connected to a sixteenth diode (D16), a fifteenth diode (D15) is electrically connected between the sixteenth diode (D16) and the fourteenth diode (D14), the tenth filter (F10) is electrically connected to a twenty-fifth resistor (R25), the twelfth filter (F12) is electrically connected to a twenty-seventh resistor (R27), the twenty-fifth resistor (R25) is electrically connected to a thirteenth capacitor (C13), and the twenty-seventh resistor (R27) is electrically connected to a twenty-sixth resistor (R26).

7. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The second host computer communication circuit (5) includes a ninth filter (F9) and an eleventh filter (F11), the ninth filter (F9) is electrically connected to a twelfth capacitor (C12), the twelfth capacitor (C12) is electrically connected to an eleventh capacitor (C11), the ninth filter (F9) is electrically connected to a fourteenth capacitor (C14), the eleventh filter (F11) is electrically connected to a sixteenth capacitor (C16), and the eleventh filter (F11) is electrically connected to a seventeenth capacitor (C17).

8. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The third host computer communication circuit (6) includes a seventh chip (U7), the seventh chip (U7) is electrically connected to a ground pin, the seventh chip (U7) is electrically connected to a data sending pin, the seventh chip (U7) is electrically connected to a data receiving pin, the seventh chip (U7) is electrically connected to a light emitting diode pin, and the seventh chip (U7) is electrically connected to an indication pin.

9. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The fourth host computer communication circuit (7) comprises a first chip (U1), an eighth resistor (R8) and a fifth resistor (R5); the first chip (U1) is electrically connected to a power pin; the first chip (U1) is electrically connected to a data pin; the first chip (U1) is electrically connected to a power supply pin; the eighth resistor (R8) is electrically connected to a second transistor (Q2); the second transistor (Q2) is electrically connected to a seventh resistor (R7); the second transistor (Q2) is electrically connected to a second resistor ( R2), the second resistor (R2) is electrically connected to a seventh resistor (R7), the fifth resistor (R5) is electrically connected to a first transistor (Q1), the first transistor (Q1) is electrically connected to the first resistor (R1), the first transistor (Q1) is electrically connected to a second capacitor (C2), the second capacitor (C2) is electrically connected to the first resistor (R1), the second capacitor (C2) is electrically connected to a sixth resistor (R6), and the sixth resistor (R6) is electrically connected to the first transistor (Q1).

10. The intelligent lightning protection centralized data collection circuit according to claim 1, characterized in that: The fifth host computer communication circuit (8) comprises a sixth chip (U6), the sixth chip (U6) is electrically connected to a data transmitting end, and the sixth chip (U6) is electrically connected to a data receiving end.

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