Dual-load single-control interface circuit and household appliance thereof
By designing a dual-load single-control interface circuit, using one input port to control the on-off state of two loads, the problem of IO port limitation in traditional home appliance control circuits is solved, and efficient multi-load control and circuit simplicity are achieved.
Patent Information
- Application Number
- CN202422420506.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-08
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2034-10-08
AI Technical Summary
In traditional home appliance control circuits, each input/output port (IO port) can only control a single load, which limits the scalability and flexibility of the system and is difficult to meet the needs of modern smart home systems for multi-load control.
A dual-load single-control interface circuit is designed, and the first and second switching circuits are used to switch the on-off states of the two loads according to different states of the control signal, combining the power supply port and the driving circuit to achieve independent control of the two loads.
It improves the efficiency of input/output port usage, reduces the demand for IO port, simplifies circuit design, enhances the flexibility and operability of the system, and is suitable for multi-load control scenarios.
Smart Images

Figure CN223246570U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of control circuits, in particular to a dual-load single-control interface circuit and a household appliance thereof. Background Art
[0002] With the development of technology and the improvement of living standards, home appliances have become an indispensable part of modern families. From basic lighting equipment to complex smart home systems, the types and functions of home appliances have expanded significantly. These devices not only improve living comfort, but also effectively enhance energy efficiency and convenience.
[0003] However, in traditional home appliance control circuit designs, each input / output port (IO port) can only control the on / off of a single load. This design limits the scalability and flexibility of the system. For example, in an environment with limited IO resources, designers are faced with the problem of how to allocate these valuable IO ports to achieve effective control of multiple devices. In addition, with the development of smart home and automation technologies, the need to simultaneously control multiple loads is becoming more and more common, such as the independent control of multiple systems such as lights, heaters, and fans. This requires a new circuit design that allows a single IO port to independently and simultaneously control multiple loads, thereby improving system efficiency and operability and meeting the requirements of modern smart home systems for efficiency and flexibility. Utility Model Content
[0004] The purpose of the present utility model is to address the defects and shortcomings of the existing technology. On the one hand, it provides a dual-load single-control interface circuit and a household appliance, including an input port, a first switching circuit, a second switching circuit, a power supply port, a first drive circuit and a second drive circuit. The input port is connected to the controlled ends of the first switching circuit and the second switching circuit, the output end of the first switching circuit is connected to the first drive circuit, and the output end of the second switching circuit is connected to the second drive circuit. The power supply port is connected to the input ends of the first drive circuit and the second drive circuit. The power supply port is used to provide the required voltage for the load, and the input port is used to input a first drive signal or a second drive signal. The first switching circuit is used to control the connection and disconnection of the first drive circuit, and the second switching circuit is used to control the connection and disconnection of the second drive circuit.
[0005] The first switching circuit includes a first resistor R1, a second resistor R2, a first switching tube Q1, and a second switching tube D1. One end of the first resistor R1 is connected to the emitter of the first switching tube Q1, the input port, and the second switching circuit. The other end of the first resistor R1 is connected to the power supply port, one end of the second resistor R2, and the input end of the first drive circuit. The collector of the first switching tube Q1 is connected to the output end of the first drive circuit. The base of the first switching tube Q1 is connected to the anode of the second switching tube D1 and the other end of the second resistor R2. The cathode of the second switching tube D1 is connected to the output end of the second drive circuit and the second switching circuit.
[0006] The second switching circuit includes a third switching transistor D2, a fourth switching transistor Q2, a third resistor R3, a fourth resistor R4, a first capacitor C1, and a second capacitor EC1. One end of the first capacitor C1 is connected to the first resistor R1, the emitter of the first switching transistor Q1, and the input port. The other end of the first capacitor C1 is connected to the anode of the third switching transistor D2 and one end of the second capacitor EC1. The cathode of the third switching transistor D2 is connected to one end of the third resistor R3, one end of the fourth resistor R4, and the other end of the second capacitor EC1. The other end of the third resistor R3 is connected to the base of the fourth switching transistor Q2. The other end of the fourth resistor R4 is connected to the emitter of the fourth switching transistor Q2 and ground. The collector of the fourth switching transistor Q2 is connected to the cathode of the second switching transistor D1 and the output end of the second drive circuit.
[0007] The second switching circuit also includes a fifth resistor R5 and a fifth switching tube D3. The fifth resistor R5 is located between the first capacitor C1 and the input port. The anode of the fifth switching tube D3 is connected to one end of the second capacitor EC1, and the cathode of the fifth switching tube D3 is connected to the anode of the third switching tube D2.
[0008] The first drive circuit includes a sixth resistor R6 and a first load. The first load input end is connected to the first resistor R1, the second resistor R2, the power supply port and the input end of the first drive circuit. The first load output end is connected to one end of the sixth resistor R6. The other end of the sixth resistor R6 is connected to the collector of the first switch tube Q1.
[0009] The second driving circuit includes a seventh resistor R7, an eighth resistor R8, a second load, and a third load. The power supply port is connected to the input ends of the second load and the third load. The output end of the second load is connected to one end of the seventh resistor R7, the output end of the third load is connected to one end of the eighth resistor R8, and the other end of the seventh resistor R7 is connected to the other end of the eighth resistor R8, the cathode of the second switch tube D1, and the collector of the fourth switch tube Q2.
[0010] The first load, the second load and the third load are LED lamps or UV lamps.
[0011] On the other hand, the present invention further provides a household appliance, comprising the dual-load single-control interface circuit of the above technical solution.
[0012] In the embodiment of the present utility model, through the first and second switching circuits, an input port can receive a single control signal and switch the on-off state of two loads according to the different states of the signal (such as high level, low level or pulse waveform). This embodiment allows a single input signal to drive two different outputs through logical allocation, greatly improving the utilization efficiency of the input / output port, not only reducing the demand for IO ports, but also making the circuit design simpler. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0014] Figure 1 It is a structural block diagram of the first embodiment of the utility model;
[0015] Figure 2 is a circuit diagram of another embodiment of the utility model;
[0016] Figure 3 It is a circuit diagram of another embodiment of the present utility model.
[0017] Reference numerals:
[0018] DETAILED DESCRIPTION
[0019] The present invention will be described in further detail below with reference to the accompanying drawings.
[0020] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed, but as long as they are within the scope of the claims of the present invention, they are protected by patent law.
[0021] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.
[0022] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are also within the scope of protection of the present invention.
[0023] 1 , the present invention provides a dual-load single-control interface circuit, including an input port 100, a first switch circuit 200, a second switch circuit 300, a power supply port 600, a first drive circuit 400, and a second drive circuit 500. The input port 100 is connected to the controlled ends of the first switch circuit 200 and the second switch circuit 300, the output end of the first switch circuit 200 is connected to the first drive circuit 400, the output end of the second switch circuit 300 is connected to the second drive circuit 500, the power supply port 600 is connected to the input ends of the first drive circuit 400 and the second drive circuit 500, the power supply port 600 is used to provide the required voltage for the load, the input port 100 is used to input a first drive signal or a second drive signal, the first switch circuit 200 is used to control the connection and disconnection of the first drive circuit 400, and the second switch circuit 300 is used to control the connection and disconnection of the second drive circuit 500.
[0024] Specifically, the first driving signal is a high level / low level, and the second driving signal is a pulse signal, including but not limited to a square wave signal, a PWM signal, a sine wave signal, a serial data signal, and a random pulse signal.
[0025] In the embodiment of the present utility model, through the first and second switching circuits, an input port can receive a single control signal and switch the on-off state of two loads according to the different states of the signal (such as high level, low level or pulse waveform). This embodiment allows a single input signal to drive two different outputs through logical allocation, greatly improving the utilization efficiency of the input / output port, not only reducing the demand for IO ports, but also making the circuit design simpler.
[0026] Reference Figure 2-Figure 3 The present invention provides another dual-load single-control interface circuit. Specifically, in one possible implementation, the first switch circuit 200 includes a first resistor R1, a second resistor R2, a first switch transistor Q1, and a second switch transistor D1. One end of the first resistor R1 is connected to the emitter of the first switch transistor Q1, the input port 100, and the second switch circuit 300. The other end of the first resistor R1 is connected to the power supply port 600, one end of the second resistor R2, and the input end of the first drive circuit 400. The collector of the first switch transistor Q1 is connected to the output end of the first drive circuit 400. The base of the first switch transistor Q1 is connected to the anode of the second switch transistor D1 and the other end of the second resistor R2. The cathode of the second switch transistor D1 is connected to the output end of the second drive circuit 500 and the second switch circuit 300.
[0027] In this embodiment, by integrating two switching circuits and corresponding drive circuits, not only the overall layout of the system is simplified, but also the required physical space and cost are reduced. Specifically, the unified configuration of the power supply port and input port allows all switches and drive circuits to share the same power supply and control signal. This design reduces the need for additional power supply lines and control interfaces, thereby simplifying the overall layout.
[0028] Optionally, the second switching circuit 300 includes a third switching tube D2, a fourth switching tube Q2, a third resistor R3, a fourth resistor R4, a first capacitor C1 and a second capacitor EC1, one end of the first capacitor C1 is connected to the first resistor R1, the emitter of the first switching tube Q1 and the input port 100, the other end of the first capacitor C1 is connected to the anode of the third switching tube D2 and one end of the second capacitor EC1, the cathode of the third switching tube D2 is connected to one end of the third resistor R3, one end of the fourth resistor R4 and the other end of the second capacitor EC1, the other end of the third resistor R3 is connected to the base of the fourth switching tube Q2, the other end of the fourth resistor R4 is connected to the emitter of the fourth switching tube Q2 and the ground end, and the collector of the fourth switching tube Q2 is connected to the cathode of the second switching tube D1 and the output end of the second driving circuit 500.
[0029] This embodiment utilizes a second switch circuit 300, including a combination of a third switch tube D2, a fourth switch tube Q2, a third resistor R3, a fourth resistor R4, a first capacitor C1, and a second capacitor EC1. This not only enhances the signal processing capability of the circuit, but also optimizes its control accuracy and reliability. In this design, the first capacitor C1 acts as a coupling element, with one end connected to the first resistor R1 and the emitter of the first switch tube Q1, and the other end connected to the anode of the third switch tube D2 and one end of the second capacitor EC1. This provides signal shaping and transient response optimization, allowing the input signal to effectively control the third switch tube. The third and fourth resistors R3 and R4 further define the base and emitter voltages of Q2, ensuring that Q2 operates at a suitable operating point, thereby improving the stability and efficiency of the entire system. The second capacitor EC1 works together with the third and fourth switches D2 and Q2 to form a feedback and control loop, making the output of the second drive circuit 500 more stable and predictable. This feedback mechanism not only improves the circuit's adaptability to load changes, but also enhances its resistance to external interference.
[0030] In addition, the collector of the fourth switching tube Q2 is connected to the cathode of the second switching tube D1 and the output end of the second driving circuit 500, forming an efficient signal amplification and transmission path, ensuring fast and accurate switching between the two loads, which not only reduces the power consumption of the circuit but also improves the response speed of the operation, making this circuit particularly suitable for application scenarios that require fast switching and high-precision control.
[0031] Optionally, the second switching circuit 300 further includes a fifth resistor R5 and a fifth switching tube D3, the fifth resistor R5 is located between the first capacitor C1 and the input port 100, the anode of the fifth switching tube D3 is connected to one end of the second capacitor EC1, and the cathode of the fifth switching tube D3 is connected to the anode of the third switching tube D2.
[0032] This embodiment achieves improved signal conditioning and protection functions by introducing the fifth resistor R5 and the fifth switch D3. Specifically, the fifth resistor R5 is located between the first capacitor C1 and the input port 100, stabilizing the input signal and limiting high-frequency noise, thereby protecting the circuit from unexpected high voltage or spike interference. At the same time, the addition of the fifth switch D3 further improves signal transmission efficiency and precise control. Its structure makes the signal path from the second capacitor EC1 to the third switch D2 more direct and clear, effectively avoiding signal attenuation and ensuring the response speed and reliability of the circuit.
[0033] Optionally, the first drive circuit 400 includes a sixth resistor R6 and a first load, the first load input end is connected to the first resistor R1, the second resistor R2, the power supply port 600 and the input end of the first drive circuit 400, the first load output end is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is connected to the collector of the first switch tube Q1.
[0034] This embodiment achieves enhanced current control and energy efficiency by integrating the sixth resistor R6 and the first load into the first drive circuit 400. Specifically, the input end of the first load is connected to the input end of the first drive circuit 400 via the first resistor R1, the second resistor R2, and the power supply port 600, ensuring a stable supply of current to the first load. The sixth resistor R6 is located between the output end of the first load and the collector of the first switch tube Q1, performing the dual functions of current limiting and voltage dividing, thereby not only protecting the first load from damage caused by excessive current but also optimizing the power distribution of the entire circuit.
[0035] In addition, the sixth resistor R6 enables the first switch tube Q1 to control the first load more accurately, effectively reducing the performance instability problem caused by current fluctuation, so that the circuit can maintain high efficiency and stable output when facing different working conditions.
[0036] Optionally, the second driving circuit 500 includes a seventh resistor R7, an eighth resistor R8, a second load and a third load, the power supply port 600 is connected to the input ends of the second load and the third load, the output end of the second load is connected to one end of the seventh resistor R7, the output end of the third load is connected to one end of the eighth resistor R8, and the other end of the seventh resistor R7 is connected to the other end of the eighth resistor R8, the cathode of the second switch tube D1 and the collector of the fourth switch tube Q2.
[0037] This embodiment achieves more precise current distribution and enhanced load protection by providing a seventh resistor R7 and an eighth resistor R8 in the second driving circuit 500 and combining them with the second and third loads. Specifically, the input ends of the second and third loads are directly connected to the power supply port 600 to ensure direct power supply, while the output ends of the second and third loads are connected via the seventh resistor R7 and the eighth resistor R8, respectively. The other ends of the seventh and eighth resistors R7 and R8 are commonly connected to the cathode of the second switching transistor D1 and the collector of the fourth switching transistor Q2, forming a feedback control network. In this case, the seventh and eighth resistors R7 and R8 serve more than just simple current limiting. They also help balance current distribution between the two loads connected to the same power supply, ensuring that each load operates at an optimal current level, thereby avoiding damage caused by excessive current and improving the stability and efficiency of the overall circuit.
[0038] Optionally, the resistance of the first resistor is 10k ohms, the resistance of the second resistor is 5.6k ohms, the resistance of the third resistor is 1k ohm, the resistance of the fourth resistor is 10k ohms, the resistance of the fifth resistor is 1k ohm, the resistance of the sixth resistor is 120 ohms, the resistance of the seventh resistor is 330 ohms, the resistance of the eighth resistor is 39 ohms, the rated capacity of the second capacitor EC1 is 22 microfarads, and the rated capacity of the first capacitor C1 is 105 microfarads.
[0039] Optionally, the first load, the second load and the third load are LED lamps or UV lamps.
[0040] This embodiment achieves significant improvement in energy efficiency and optimization of light output by configuring the first load, the second load, and the third load as LED lamps or ultraviolet UV lamps. LED lamps and UV lamps are widely used due to their high light efficiency and low energy consumption. They are particularly suitable for scenarios that require long-term operation and precise light control. They not only reduce overall energy consumption but also provide a reliable light source to meet a wide range of needs from home lighting to industrial applications, while ensuring the performance and durability of the system under various operating conditions.
[0041] As a preference but not limitation, the first load, the second load and the third load in this embodiment can also be incandescent lamps, halogen lamps, fluorescent lamps, laser diodes, xenon lamps, infrared LEDs, OLEDs, infrared lamps, fiber optic lighting, and plasma lamps.
[0042] Specifically, the working principle of this embodiment is as follows:
[0043] When IC_IO is high or floating, the emitter (E) of transistor Q1 is high (when floating, it is pulled high by R5), and the base (B) of transistor Q1 is also high, pulled high by R2. At this time, the emitter junction voltage of transistor Q1 is 0V, which is less than the conduction voltage of PN junction. The base current is 0, the collector current and the emitter current are both 0. The collector and emitter are equivalent to the switch off state, the transistor is in the cut-off state, and LED1 is not lit. Because there is a capacitor C1 in series between IC_IO and the base (B) of transistor Q2, when C1 is fully charged, it is equivalent to an open circuit, and the current cannot reach the base (B) of transistor Q2. As a result, the voltage of the base (B) of transistor Q2 is connected to GND through R8, which is 0V. At the same time, the emitter (E) of transistor Q2 is directly connected to GND, so the emitter and base voltages of transistor Q2 are equal, the emitter junction voltage is 0V, and it is in the cut-off state, so UV1 and LED2 are not lit.
[0044] When IC_IO is low, the emitter (E) of transistor Q1 is low, and the base (B) of transistor Q1 is also high, pulled high by R2. At this point, the emitter voltage of transistor Q1 is VCC, which is greater than the conduction voltage of the PN junction, and the emitter junction is forward-biased. The voltage at the collector (C) of transistor Q1, as seen through LED1, is certainly lower than VCC, so the collector junction of transistor Q1 is also forward-biased, putting the transistor in saturation. The voltage between the collector and emitter is very low, and the collector-emitter state is equivalent to the on-state of a switch, lighting LED1. Meanwhile, because capacitor C1 interrupts the circuit of transistor Q2, Q2 is cut off, and LED2 and UV1 do not light.
[0045] When IC_IO outputs a pulse waveform, due to the capacitor's DC-blocking and AC-passing properties, current can flow through capacitor C1 and then through diode D2 for rectification. When IC_IO is high, the EC1 electrolytic capacitor charges. When IC_IO is low, the EC1 electrolytic capacitor discharges. Because D2 conducts unidirectionally, the EC1 electrolytic capacitor discharges only to the base (B) of transistor Q2, stabilizing its base (B) voltage. Q2's emitter (E) is connected to GND, resulting in a forward-biased emitter. Meanwhile, Q2's collector (C) voltage is lower than VCC due to the voltage drop from UV1 and R4. This forward-biased voltage ensures Q2 is saturated, illuminating LEDs 2 and UV. When Q2 is saturated, the collector-emitter voltage is very low, so the collector (C) voltage is approximately equal to GND. From the unidirectional conduction effect of the diode, it can be seen that the base (B) voltage of the Q1 transistor cannot exceed 0.7V, and the emitter (E) level of the Q1 transistor changes. When the emitter (E) level is high, the emitter level is higher than the base level, and the emitter junction is reverse biased; when the emitter (E) level is low, the base level does not exceed 0.7V. The PN junction voltage of the SS8050 transistor is generally greater than 0.7V, so the emitter junction is reverse biased, the Q1 transistor is in the cut-off state, and LED1 is not lit.
[0046] By using different IC_IO outputs, the purpose of controlling two groups of loads separately can be achieved.
[0047] Among them, through the unidirectional conduction characteristics of the D1 diode, the transistor Q2 will clamp the voltage of the transistor Q1 base (B) to 0.7V when it is in saturation state.
[0048] The above is only used to illustrate the technical solution of the present invention and is not intended to limit it. Other modifications or equivalent substitutions made to the technical solution of the present invention by ordinary technicians in this field should be included in the scope of the claims of the present invention as long as they do not depart from the spirit and scope of the technical solution of the present invention.
Claims
1. A dual-load single-control interface circuit, characterized in that: The invention comprises an input port (100), a first switch circuit (200), a second switch circuit (300), a power supply port (600), a first drive circuit (400) and a second drive circuit (500), wherein the input port (100) is connected to the controlled ends of the first switch circuit (200) and the second switch circuit (300), the output end of the first switch circuit (200) is connected to the first drive circuit (400), the output end of the second switch circuit (300) is connected to the second drive circuit (500), the power supply port (600) is connected to the input ends of the first drive circuit (400) and the second drive circuit (500), the power supply port (600) is used to provide a required voltage for a load, the input port (100) is used to input a first drive signal or a second drive signal, the first switch circuit (200) is used to control the connection and disconnection of the first drive circuit (400), and the second switch circuit (300) is used to control the connection and disconnection of the second drive circuit (500).
2. The dual-load single-control interface circuit according to claim 1, characterized in that: The first switching circuit (200) comprises a first resistor R1, a second resistor R2, a first switching tube Q1 and a second switching tube D1, one end of the first resistor R1 is connected to the emitter of the first switching tube Q1, the input port (100) and the second switching circuit (300), the other end of the first resistor R1 is connected to the power supply port (600), one end of the second resistor R2 and the input end of the first drive circuit (400), the collector of the first switching tube Q1 is connected to the output end of the first drive circuit (400), the base of the first switching tube Q1 is connected to the anode of the second switching tube D1 and the other end of the second resistor R2, and the cathode of the second switching tube D1 is connected to the output end of the second drive circuit (500) and the second switching circuit (300).
3. The dual-load single-control interface circuit according to claim 2, characterized in that: The second switch circuit (300) comprises a third switch tube D2, a fourth switch tube Q2, a third resistor R3, a fourth resistor R4, a first capacitor C1 and a second capacitor EC1, one end of the first capacitor C1 is connected to the first resistor R1, the emitter of the first switch tube Q1 and the input port (100), the other end of the first capacitor C1 is connected to the anode of the third switch tube D2 and one end of the second capacitor EC1, the cathode of the third switch tube D2 is connected to one end of the third resistor R3, one end of the fourth resistor R4 and the other end of the second capacitor EC1, the other end of the third resistor R3 is connected to the base of the fourth switch tube Q2, the other end of the fourth resistor R4 is connected to the emitter of the fourth switch tube Q2 and the ground end, and the collector of the fourth switch tube Q2 is connected to the cathode of the second switch tube D1 and the output end of the second drive circuit (500).
4. The dual-load single-control interface circuit according to claim 3, characterized in that: The second switch circuit (300) further comprises a fifth resistor R5 and a fifth switch tube D3, wherein the fifth resistor R5 is located between the first capacitor C1 and the input port (100), the anode of the fifth switch tube D3 is connected to one end of the second capacitor EC1, and the cathode of the fifth switch tube D3 is connected to the anode of the third switch tube D2.
5. The dual-load single-control interface circuit according to claim 4, characterized in that: The first drive circuit (400) comprises a sixth resistor R6 and a first load, wherein the first load input end is connected to the first resistor R1, the second resistor R2, the power supply port (600) and the input end of the first drive circuit (400), the first load output end is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is connected to the collector of the first switch tube Q1.
6. The dual-load single-control interface circuit according to claim 5, characterized in that: The second drive circuit (500) comprises a seventh resistor R7, an eighth resistor R8, a second load and a third load, the power supply port (600) is connected to the input ends of the second load and the third load, the output end of the second load is connected to one end of the seventh resistor R7, the output end of the third load is connected to one end of the eighth resistor R8, and the other end of the seventh resistor R7 is connected to the other end of the eighth resistor R8, the cathode of the second switch tube D1 and the collector of the fourth switch tube Q2.
7. The dual-load single-control interface circuit according to claim 6, characterized in that: The first load, the second load and the third load are LED lamps or UV lamps.
8. A household appliance, characterized in that: It comprises a dual-load single-control interface circuit as described in any one of claims 1-7.