Fuse state monitoring circuit and power distribution system

Abstract

The utility model provides a fuse state monitoring circuit and a power distribution system, the fuse state monitoring circuit comprises a fuse connected between a power supply and a load, and the other end of the load is grounded; two ends of the fuse are respectively connected with a first resistor and a second resistor, and the other end of the first resistor and the other end of the second resistor are connected in series with a third resistor to be grounded after being connected; the fuse protection circuit further comprises a voltage sampling circuit which is connected with the voltage sampling end of the third resistor through a sampling channel, and the state of the fuse is monitored according to the sampling voltage of the voltage sampling circuit to the third resistor. According to the invention, state monitoring and voltage monitoring of the fuse are realized by differentiating voltages at two ends of the fuse and connecting the resistors in series, voltage detection of a circuit can be realized, state monitoring of the fuse can also be realized, and the fuse monitoring circuit has the advantages of simple structure and low cost.

Description

Technical Field

[0001] The present application relates to the technical field of power distribution systems, and in particular to a fuse status monitoring circuit and a power distribution system. Background Art

[0002] Fuses are widely used in the power distribution circuits of industrial equipment. When the current in the distribution circuit exceeds a specified value for a period of time, the fuse generates heat, melting the fuse element and disconnecting the circuit, thereby protecting the distribution circuit and industrial equipment from faults such as overcurrent, overload, and short circuit. Different types of fuses are used in different electrical environments. Fuse failures can cause equipment downtime and production interruptions, resulting in economic losses and safety hazards. Therefore, monitoring the status of fuses is crucial. However, how to monitor the status of fuses in real time is a technical challenge that deserves exploration and improvement. Utility Model Content

[0003] In view of this, the main purpose of this application is to provide a fuse status monitoring circuit and power distribution system, which realizes fuse status monitoring and voltage monitoring by differential voltage across the fuse and series resistance. It can realize both circuit voltage detection and fuse status monitoring, and has the advantages of simple structure and low cost.

[0004] In a first aspect, the present application provides a fuse status monitoring circuit, comprising:

[0005] A fuse connected between the power supply and the load, with the other end of the load being grounded;

[0006] The two ends of the fuse are respectively connected to a first resistor and a second resistor, the other end of the first resistor is connected to the other end of the second resistor and then connected in series with a third resistor to be grounded;

[0007] It also includes a voltage sampling circuit, which is connected to the voltage sampling end of the third resistor through a sampling channel, and monitors the state of the fuse according to the sampling voltage of the third resistor by the voltage sampling circuit.

[0008] As described above, the present application provides a fuse status monitoring circuit, which aims to monitor the working status of the fuse in real time, ensure that the circuit system can respond quickly in abnormal situations such as overload or short circuit, and prevent further damage to the circuit and equipment. Under normal circumstances, the fuse is in a closed state, and the power supply of the power supply flows to the load through the fuse. The other end of the first resistor and the other end of the second resistor at both ends of the fuse are connected and then connected in series with the third resistor to form a voltage divider circuit of the power supply. The voltage sampling circuit samples the voltage of the third resistor for the first time. When the fuse blows due to overcurrent, the power supply of the power supply is cut off. At this time, the first resistor and the third resistor are connected in series to form a voltage divider circuit of the power supply. The voltage sampling circuit samples the voltage of the third resistor for the second time. Whether the fuse is blown can be determined based on the two sampled voltages. In addition, the output voltage of the power supply can be reversely calculated based on the sampled voltage and the resistance value of the connected resistor to realize monitoring of the power output voltage.

[0009] Optionally, a first voltage stabilizing diode is further included that is connected across the third resistor.

[0010] As described above, by setting a first voltage-stabilizing diode at both ends of the third resistor to clamp the voltage of the third resistor, when the fuse blows and the voltage on the third resistor rises abnormally, if this voltage exceeds the reverse breakdown voltage (or voltage-stabilizing value) of the voltage-stabilizing diode, the voltage-stabilizing diode will be turned on, thereby clamping the voltage on the third resistor to near the voltage-stabilizing value of the voltage-stabilizing diode, thereby preventing the voltage sampling circuit from being damaged by excessively high input voltage, and also protecting the stability and safety of subsequent circuits.

[0011] Optionally, it further includes a fourth resistor and a fifth resistor connected in series between the ground terminal of the third resistor and the ground terminal of the load;

[0012] The voltage sampling circuit is connected to the voltage sampling end of the third resistor through a first sampling channel and to the voltage sampling end of the fourth resistor through a second sampling channel, and monitors the state of the fuse according to the differential voltage between the first sampling channel and the second sampling channel.

[0013] From the above, in view of the situation where the distribution circuit and the fuse monitoring circuit in some high-voltage or precision circuits need to be isolated, the present application further adds a fourth resistor and a fifth resistor connected in series between the ground terminal of the third resistor and the ground terminal of the load, and collects the voltages of the third resistor and the fourth resistor respectively through two sampling channels, and calculates the differential voltage between them, which can more accurately judge the status of the fuse, and eliminate the influence of common-mode noise and interference through differential voltage detection, thereby improving the accuracy and reliability of detection.

[0014] Optionally, a second voltage stabilizing diode is further included that is connected across the fourth resistor.

[0015] From the above, by setting a second voltage-stabilizing diode at both ends of the fourth resistor to clamp the voltage of the fourth resistor, when the fuse blows and the voltage on the fourth resistor rises abnormally, if this voltage exceeds the reverse breakdown voltage (or voltage-stabilizing value) of the voltage-stabilizing diode, the voltage-stabilizing diode will be turned on, thereby clamping the voltage on the fourth resistor to near the voltage-stabilizing value of the voltage-stabilizing diode, thereby preventing the voltage sampling circuit from being damaged by excessively high input voltage, and also protecting the stability and safety of subsequent circuits.

[0016] Optionally, the system further includes a processor module connected to the output end of the voltage sampling circuit, for determining whether the fuse is blown based on a signal output by the voltage sampling circuit.

[0017] From the above, by setting up a processor module, it is responsible for receiving and processing the signals output by the voltage sampling circuit, and judging the status of the fuse based on these signals, thereby realizing real-time monitoring and alarm of the fuse status.

[0018] Optionally, the voltage sampling circuit includes an ADC sampling circuit, and the ADC sampling circuit is connected to the voltage sampling end of the third resistor through its sampling channel.

[0019] From the above, an ADC sampling circuit can be used to implement voltage sampling. The ADC sampling circuit samples the voltage of the third resistor through a single sampling channel and determines whether the fuse is blown based on the change in the sampled voltage. At the same time, the output voltage of the power supply can be reversely calculated based on the sampled voltage and the resistance value of the connected resistor to monitor the output voltage of the power supply.

[0020] Optionally, the voltage sampling circuit includes an ADC sampling circuit, which is connected to the voltage sampling end of the third resistor through a first sampling channel and to the voltage sampling end of the fourth resistor through a second sampling channel.

[0021] From the above, in cases where the power distribution circuit and the fuse monitoring circuit in some high-voltage or precision circuits need to be isolated, the ADC sampling circuit can determine the status of the fuse through differential voltage detection. Compared with single-channel sampling, differential voltage detection is more sensitive to voltage changes. When the fuse blows, even if the voltage changes on the third resistor and the fourth resistor are small, the differential voltage may change significantly, making it easier to detect and ensuring the accuracy and reliability of the detection.

[0022] Optionally, the voltage sampling circuit includes a first comparator and a second comparator, the first input terminals of the first comparator and the second comparator are respectively connected to the voltage sampling terminal of the third resistor, and output comparison results according to the reference voltage set at their second input terminals.

[0023] From the above, the voltage of the third resistor is collected by the first comparator and the second comparator respectively, and compared with its reference voltage respectively, and then a high level or low level comparison result is output, so that the back-end processor module can determine whether the fuse is blown according to the changes in the high and low level signals output by the two comparators.

[0024] Optionally, the voltage sampling circuit includes a first amplifier, a second amplifier, a third amplifier, a first comparator, and a second comparator;

[0025] The first input terminal of the first amplifier is connected to the voltage sampling terminal of the third resistor, and a sixth resistor is connected between the second input terminal and the output terminal of the first amplifier;

[0026] The first input terminal of the second amplifier is connected to the voltage sampling terminal of the fourth resistor, and the seventh resistor is connected between the second input terminal and the output terminal of the second amplifier;

[0027] The output terminal of the first amplifier is connected to the first input terminal of the third amplifier via an eighth resistor, the output terminal of the second amplifier is connected to the second input terminal of the third amplifier via a ninth resistor, a tenth resistor is connected between the first input terminal and the output terminal of the third amplifier, and an eleventh resistor is connected between the second input terminal of the third amplifier and the ground terminal;

[0028] The first input terminals of the first comparator and the second comparator are respectively connected to the output terminal of the third amplifier, and output comparison results according to the reference voltages set at the second input terminals thereof.

[0029] From the above, in view of the situation where the distribution circuit and the fuse monitoring circuit in some high-voltage or precision circuits need to be isolated, a multi-stage amplification circuit and a differential voltage comparison circuit can be formed through a series of amplifiers and comparators. Specifically, the third resistor can be connected through the first amplifier, and resistors are set at its input and output ends to form a feedback circuit to stabilize the output of the first amplifier and control the gain. The fourth resistor can be connected through the second amplifier, and resistors are set at its input and output ends to form a feedback circuit to stabilize the output of the second amplifier and control the gain. The output signals of the first amplifier and the second amplifier are received by the third amplifier, and after differential amplification, they are output to the input ends of the first comparator and the second comparator respectively, so that the first comparator and the second comparator are compared with their reference voltages respectively and output high-level or low-level comparison results, so that the back-end processor module can judge whether the fuse is blown according to the changes in the high and low-level signals output by the two comparators.

[0030] In a second aspect, the present application provides a power distribution system, including a power supply, a load, and a fuse state monitoring circuit as described above;

[0031] The fuse state monitoring circuit is connected between the power supply and the load, and is used for fusing control of the power supply to the load and monitoring the state of the fuse.

[0032] These and other aspects of the present application will become more apparent from the following description of the embodiment(s). BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A structural diagram of a fuse status monitoring circuit is provided for an embodiment of the present application;

[0034] Figure 2 A circuit diagram of a first fuse state monitoring circuit is provided for an embodiment of the present application;

[0035] Figure 3 A circuit diagram of a second fuse state monitoring circuit is provided for an embodiment of the present application;

[0036] Figure 4 A circuit diagram of a third fuse state monitoring circuit is provided for an embodiment of the present application;

[0037] Figure 5 A circuit diagram of a fourth fuse state monitoring circuit is provided for an embodiment of the present application;

[0038] Figure 6 A circuit diagram of a fifth fuse state monitoring circuit is provided for an embodiment of the present application;

[0039] Figure 7 A structural diagram of a power distribution system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of this application clearer, this application will be further described in detail below with reference to the accompanying drawings.

[0041] The embodiments of the present application provide a fuse state monitoring circuit and a power distribution system, which implement fuse state monitoring and voltage monitoring by differentially measuring the voltage across the fuse and connecting a resistor in series. This can achieve both circuit voltage detection and fuse state monitoring. The monitoring circuit has a simple structure and is easy to implement and integrate into an existing circuit system. It does not require additional complex control logic or high cost investment. Moreover, by timely detecting and responding to changes in the fuse state, the reliability and stability of the entire circuit system can be greatly improved, and system downtime caused by overload or short circuit can be reduced.

[0042] like Figure 1As shown, an embodiment of the present application provides a fuse status monitoring circuit, in which the power supply 110 in the circuit is connected to the load 130 through the fuse 120 and then returns to the ground terminal GND, forming a power distribution circuit of the system. This embodiment also connects the fuse monitoring circuit 140 at both ends of the fuse 120, and transmits the signal processed by the fuse monitoring circuit 140 at both ends of the fuse 120 to the voltage sampling circuit 150, so as to realize the status monitoring of the fuse and the monitoring of the power supply output voltage according to the different voltages sampled before and after the fuse 120 is blown.

[0043] In some embodiments, a processor module 160 may be further provided at the back end of the voltage sampling circuit 150 for receiving and processing signals output by the voltage sampling circuit 150 and determining the state of the fuse based on these signals, thereby achieving real-time monitoring and alarm of the fuse state.

[0044] Refer to the following Figure 2-Figure 6 The embodiment shown describes in detail the circuit structure and working principle of the fuse status monitoring circuit of the embodiment of the present application.

[0045] like Figure 2 The circuit diagram of the first fuse state monitoring circuit provided by the embodiment of the present application is shown in FIG. Figure 2 As shown, when the power distribution circuit and the fuse monitoring circuit are not isolated, the power supply VCC in the fuse status monitoring circuit enters the load R1 through the fuse F1 and then returns to the ground terminal GND, forming the system's power distribution circuit. The two ends of the fuse F1 are respectively connected to the resistor R2 (the above-mentioned first resistor) and the resistor R3 (the above-mentioned second resistor), and the other end of the resistor R2 and the other end of the resistor R3 are connected in series with the resistor R4 (the above-mentioned third resistor), and then return to the ground terminal GND. The voltage after voltage division by the resistor R4 enters the ADC sampling channel as the output of the fuse monitoring circuit, and by connecting the Zener diode D1 (the above-mentioned first Zener diode) at both ends of the resistor R4, the voltage of the resistor R4 is clamped, thereby performing voltage stabilization protection on the ADC sampling channel.

[0046] In this embodiment, resistors R2 and R3 are connected to both ends of fuse F1, and their other ends are connected together. This connection ensures that current flows through the monitoring circuit regardless of whether fuse F1 is blown, thereby achieving continuous monitoring of the fuse status. The resistance of fuse F1 in the unblown state is much smaller than the resistances of resistors R2 and R3 and can be ignored. The resistance of resistors R2 and R3 connected in this manner (the equivalent resistance of resistors R2 and R3) is then connected in series with resistor R4 to form a voltage divider circuit. This voltage divider circuit reduces the voltage across fuse F1 to a range acceptable to the ADC sampling channel. The voltage divided by resistor R4 serves as the output of the fuse monitoring circuit and enters the ADC sampling channel. The ADC sampling channel indirectly determines the status of fuse F1 by measuring this voltage value. In addition, this embodiment connects a Zener diode D1 across the resistor R4 to clamp the voltage of the resistor R4. When the voltage on the resistor R4 exceeds the reverse breakdown voltage (or regulated voltage value) of the Zener diode D1 due to some reason (such as power supply fluctuation, load change, etc.), the Zener diode D1 will turn on and limit the further increase of the voltage, thereby protecting the ADC sampling channel from damage due to overvoltage, and also protecting the stability and safety of subsequent circuits.

[0047] Refer to Figure 2 As shown in the figure, when fuse F1 is intact, the current of power supply VCC passes through fuse F1, enters load R1, and then returns to ground terminal GND. At this time, the resistance of fuse F1 is approximately 0 ohm or much smaller than the resistance of R2 / R3. At this time, the voltage V1 of resistor R4 collected by the ADC sampling channel is:

[0048]

[0049] After simplification:

[0050]

[0051] When fuse F1 blows, the current of power supply VCC is cut off. The resistance of fuse F1 is very large. The voltage V2 of resistor R4 / / (R3+R1) collected by the ADC sampling channel is:

[0052]

[0053] Based on this, the status of whether the fuse is blown can be obtained according to the difference between the two sampled voltages V1 and V2. In addition, the actual output voltage value of the power supply VCC can also be reversely calculated based on the voltage V1 and the resistance values ​​of resistors R1, R2, R3, and R4. This achieves the monitoring of whether the fuse is blown and the monitoring of the output voltage of the power supply VCC using only one ADC sampling channel.

[0054] In view of the situation where the power distribution circuit and the fuse monitoring circuit in some high-voltage or precision circuits need to be isolated, the embodiment of the present application provides a second fuse status monitoring circuit, such as Figure 3 As shown, the power supply VCC in the fuse status monitoring circuit passes through the fuse F1, enters the load R1, and then returns to the ground terminal PGND, forming a power distribution circuit for the system. Resistors R2 and R3 are connected to both ends of the fuse F1, and then resistor R4 is connected in series after the resistors R2 and R3 are connected, and then return to the ground terminal DGND. The voltage after voltage division by the resistor R4 enters the ADC positive sampling channel as the positive output of the fuse monitoring circuit. By connecting the voltage regulator diode D1 to both ends of the resistor R4, the voltage of the resistor R4 is clamped, thereby performing voltage stabilization protection on the ADC positive sampling channel. In addition, since the power distribution circuit is isolated from the fuse monitoring circuit, this embodiment further connects resistor R5 (the fourth resistor mentioned above) and resistor R6 (the fifth resistor mentioned above) in series at the ground terminal DGND and the ground terminal PGND in sequence. The voltage after voltage division by resistor R5 enters the ADC negative sampling channel as the negative output of the fuse monitoring circuit, and by connecting a Zener diode D2 (the second Zener diode mentioned above) at both ends of the resistor R5, the voltage of the resistor R5 is clamped, thereby performing voltage stabilization protection on the ADC negative sampling channel.

[0055] In this embodiment, resistors R2 and R3 are connected to both ends of fuse F1, and their other ends are connected together. This connection ensures that current flows through the monitoring circuit regardless of whether fuse F1 is blown, thereby achieving continuous monitoring of the fuse state. The resistance of fuse F1 in the unblown state is much smaller than the resistances of resistors R2 and R3 and can be ignored. The resistance formed by the connection of resistors R2 and R3 (the equivalent resistance of resistors R2 and R3) is then connected in series with resistor R4 to form a voltage divider circuit. This voltage divider circuit reduces the voltage across fuse F1 to a range acceptable to the ADC sampling channel. The voltage divided by resistor R4 serves as the positive output of the fuse monitoring circuit and enters the positive sampling channel of the ADC sampling circuit. At the same time, given that there may be a voltage difference between the ground terminal DGND and the ground terminal PGND, the voltage is divided by resistors R5 and R6. The voltage divided by resistor R5 serves as the negative output of the fuse monitoring circuit and enters the negative sampling channel of the ADC sampling circuit. The state of the fuse F1 can be indirectly determined based on the differential voltage obtained by sampling the dual sampling channels of the ADC sampling circuit.

[0056] Refer to Figure 3As shown in the figure, when the fuse F1 is intact, the current of the power supply VCC passes through the fuse F1, enters the load R1, and then returns to the ground terminal PGND. At this time, the resistance of the fuse F1 is approximately 0 ohm. At this time, the voltage V3 of the resistor R4 collected by the ADC positive sampling channel is:

[0057]

[0058] When the fuse F1 blows, the current of the power supply VCC is cut off. The resistance of the fuse F1 is very large, and the voltage V4 of the resistor R4 collected by the ADC positive sampling channel is:

[0059]

[0060] The voltage V5 of resistor R5 collected by the ADC negative sampling channel is:

[0061]

[0062] Based on this, when fuse F1 is intact, the differential voltage sampled by the ADC dual sampling channels is V3 - V5. When fuse F1 is blown, the differential voltage sampled by the ADC dual sampling channels is V4 - V5. By comparing these differential voltages, the fuse status can be monitored, and the power supply VCC output voltage can be monitored.

[0063] like Figure 4 The circuit diagram of the third fuse state monitoring circuit provided by the embodiment of the present application is shown. In this embodiment, the value of each component can be set according to the requirements. Figure 4As shown in the figure, the circuit uses a 48V power supply VCC to pass through a 10A fuse F1 into a load R1 and then return to the ground terminal PGND, forming the system's power distribution loop. The two ends of the fuse F1 are respectively connected to 100 kilo-ohm resistors R2 and R3. The other ends of the resistors R2 and R3 are connected in series with a 4.7 kilo-ohm resistor R4, and then return to the ground terminal DGND. The voltage after voltage division by the resistor R4 enters the ADC positive sampling channel as the positive output of the fuse monitoring circuit. By connecting a 5V bidirectional voltage regulator diode D1 across the resistor R4, the voltage of the resistor R4 is clamped, thereby providing voltage regulation protection for the ADC positive sampling channel. In addition, this embodiment connects a 4.7 kilo-ohm voltage divider resistor R5 and a 100 kilo-ohm resistor R6 in series with the ground terminals DGND and PGND, respectively. The voltage divided by resistor R5 enters the ADC negative sampling channel as the negative output of the fuse monitoring circuit. A 5V bidirectional voltage regulator diode D2 is connected across resistor R5 to clamp the voltage on resistor R5, thereby providing voltage regulation protection for the ADC negative sampling channel. The backend of the ADC sampling circuit is also connected to the MCU via the SPI protocol to receive and process the differential voltage signals output by the ADC sampling circuit and determine the status of fuse F1 based on these signals, thereby enabling real-time monitoring and alarming of the fuse F1 status.

[0064] Refer to Figure 4 As shown in the figure, when the 10A fuse F1 is intact, the current of the 48V power supply VCC passes through the fuse F1, enters the load R1, and then returns to the ground terminal PGND. At this time, the resistance of the fuse F1 is approximately 0 ohm. At this time, the differential voltage V6 sampled by the dual sampling channels of the ADC sampling circuit is:

[0065]

[0066] The ADC sampling circuit sends the differential voltage V6 to the MCU for processing. The MCU determines whether the fuse is intact by reading whether the differential voltage V6 meets the actual calculated value and its corresponding voltage range.

[0067] In some embodiments, it is also possible to consider using IO input instead of ADC analog input to monitor the status of fuse and power supply through digital input. Figure 5As shown in the circuit diagram of the fourth fuse state monitoring circuit provided in the embodiment of the present application, the power supply VCC passes through the fuse F1 into the load R1 and then returns to the ground terminal GND, forming a power distribution circuit of the system. The two ends of the fuse F1 are respectively connected to the resistor R2 and the resistor R3, and the other ends of the resistors R2 and R3 are connected and then connected in series with the resistor R4, and then return to the ground terminal GND. The voltage after voltage division by the resistor R4 enters the positive input terminal of the comparator U1 (the above-mentioned first comparator) and the comparator U2 (the above-mentioned second comparator) respectively. The negative input terminals of the comparator U1 and the comparator U2 are set with reference voltages Vref-A and Vref-B respectively. The output terminals of the comparator U1 and the comparator U2 are respectively connected to the back-end processor through the IO interface.

[0068] The reference voltage Vref-A of the comparator U1 is configured to be slightly smaller than the voltage output by the resistor R4 when both the fuse F1 and the power supply VCC are normal, and is also configured to be larger than the voltage output by the resistor R4 / / (R3+R1) when the power supply VCC is normal and the fuse F1 is blown, that is:

[0069]

[0070] The reference voltage Vref-B of the comparator U2 is configured to be slightly smaller than the voltage output by the resistor R4 / / (R3+R1) when the power supply VCC is normal and the fuse F1 is blown, that is:

[0071]

[0072] Refer to Figure 5As shown, when both the power supply VCC and the fuse F1 are normal, the voltage output after the voltage divider by resistor R4 is the maximum. Since the reference voltage Vref-A is greater than the reference voltage Vref-B, the voltage output after the voltage divider by resistor R4 enters the positive input terminals of comparator U1 and comparator U2 respectively, and both are greater than the reference voltage Vref-A of comparator U1 and the reference voltage Vref-B of comparator U2. At this time, the high level output by comparator U1 and comparator U2 enters the processor through the corresponding IO1 and IO2 interfaces respectively. When the power supply VCC is normal and the fuse F1 is blown, the voltage output after the voltage divider by resistor R4 is less than the reference voltage Vref-A of comparator U1 and greater than the reference voltage Vref-B of comparator U2. At this time, the low level output by comparator U1 enters the processor through the IO1 interface, and the high level output by comparator U2 enters the processor through the IO2 interface. When power supply VCC is off or has no voltage output, neither the positive input of comparator U1 nor comparator U2 samples any voltage. The low-level output of comparator U1 enters the processor via the IO1 interface. The low-level outputs of comparator U1 and comparator U2 enter the processor via the corresponding IO1 and IO2 interfaces, respectively. Based on this, the processor can monitor power supply VCC and fuse F1 in three states based on the high and low-level signals input from the IO1 and IO2 interfaces.

[0073] In view of the need to isolate the power distribution circuit and the fuse monitoring circuit in some high-voltage or precision circuits, the present application provides a fifth fuse status monitoring circuit, which also uses IO input instead of ADC analog input to monitor the status of the fuse and power supply through digital input. Figure 6As shown, the power supply VCC in the fuse status monitoring circuit passes through fuse F1, enters load R1, and then returns to ground terminal PGND, forming the system's power distribution circuit. Resistors R2 and R3 are connected to the two ends of fuse F1, respectively. The other ends of resistors R2 and R3 are connected in series with resistor R4, and then return to ground terminal DGND. By connecting a voltage regulator diode D1 across resistor R4, the voltage of resistor R4 is clamped, thereby providing voltage regulation protection for the ADC positive sampling channel. In addition, because the power distribution circuit is isolated from the fuse monitoring circuit, this embodiment also connects resistors R5 and R6 in series with ground terminal DGND and ground terminal PGND in sequence, and by connecting a voltage regulator diode D2 across resistor R5, the voltage of resistor R5 is clamped, thereby providing voltage regulation protection for the ADC negative sampling channel. The voltage sampling circuit of this embodiment is composed of comparators U1, U2 and amplifiers U3, U4, and U5. The voltage divided by resistor R4 enters the positive input terminal of amplifier U3 (the first amplifier mentioned above), and resistor R7 (the sixth resistor mentioned above) is connected between the negative input terminal and the output terminal of amplifier U3 to form a negative feedback loop for stabilizing the output of amplifier U3 and controlling the gain. The voltage divided by resistor R5 enters the positive input terminal of amplifier U4 (the second amplifier mentioned above), and resistor R8 (the seventh resistor mentioned above) is connected between the negative input terminal and the output terminal of amplifier U4 to form a negative feedback loop for stabilizing the output of amplifier U4 and controlling the gain. To control the gain, the output of amplifier U3 is connected to the negative input of amplifier U5 (the third amplifier) ​​via resistor R9 (the eighth resistor), and the output of amplifier U4 is connected to the positive input of amplifier U5 via resistor R10 (the ninth resistor). Resistor R11 (the tenth resistor) is connected between the negative input and output of amplifier U5, and resistor R12 (the eleventh resistor) is connected between the positive input and ground DGND. Amplifier U5, together with resistors R9, R10, R11, and R12, forms a differential amplifier circuit. The gain of the differential amplifier circuit is controlled by controlling the resistance values ​​of resistors R9, R10, R11, and R12. In this embodiment, the gain of the differential amplifier circuit can be set to 1 by setting resistors R9, R10, R11, and R12 to the same resistance value. Based on this, the amplifier U5 performs differential processing on the output signals of the amplifier U3 and the amplifier U4, and outputs the differential voltage to the positive input terminals of the comparator U1 and the comparator U2 respectively. The negative input terminals of the comparator U1 and the comparator U2 are respectively set with reference voltages Vref-A and Vref-B. The output terminals of the comparator U1 and the comparator U2 are respectively connected to the back-end processor through the IO interface.

[0074] The reference voltage Vref-A of the comparator U1 is configured to be slightly smaller than the differential voltage value output by the amplifier U5 when both the fuse F1 and the power supply VCC are normal, and is also configured to be larger than the voltage value output by the amplifier U5 when the power supply VCC is normal and the fuse F1 is blown, that is:

[0075]

[0076] The reference voltage Vref-B of the comparator U2 is configured to be slightly smaller than the differential voltage value output by the amplifier U5 when the power supply VCC is normal and the fuse F1 is blown, that is:

[0077]

[0078] Refer to Figure 6 As shown, when the power supply VCC and fuse F1 are both normal, the differential voltage output by amplifier U5 is the largest. Since the reference voltage Vref-A is greater than the reference voltage Vref-B, the differential voltage output by amplifier U5 enters the positive input terminals of comparator U1 and comparator U2 respectively, and both are greater than the reference voltage Vref-A of comparator U1 and the reference voltage Vref-B of comparator U2. At this time, the high level output by comparator U1 and comparator U2 enters the processor through the corresponding IO1 and IO2 interfaces respectively. When the power supply VCC is normal and fuse F1 is blown, the differential voltage output by amplifier U5 is less than the reference voltage Vref-A of comparator U1 and greater than the reference voltage Vref-B of comparator U2. At this time, the low level output by comparator U1 enters the processor through the IO1 interface, and the high level output by comparator U2 enters the processor through the IO2 interface. When power supply VCC is off or has no voltage output, neither the positive input of comparator U1 nor comparator U2 samples the differential voltage. The low-level output of comparator U1 enters the processor via the IO1 interface. The low-level outputs of comparator U1 and comparator U2 enter the processor via the corresponding IO1 and IO2 interfaces, respectively. Based on this, the processor can monitor power supply VCC and fuse F1 in three states based on the high and low-level signals input from the IO1 and IO2 interfaces.

[0079] In summary, the fuse state monitoring circuit provided in the embodiment of the present application is applicable to both non-isolated power distribution circuits and power distribution circuits that require isolation. Furthermore, the fuse monitoring circuit is implemented using only simple resistors and voltage-stabilizing diodes, and the voltage output by the fuse monitoring circuit is sampled using ADC sampling or comparator sampling. The power supply VCC and fuse F1 are monitored in various states by using a processor. The state monitoring circuit has a simple structure and is easy to implement and integrate into existing circuit systems. It does not require additional complex control logic or high cost investment, and can detect and respond to changes in the fuse state in a timely manner, thereby greatly improving the reliability and stability of the entire circuit system and reducing system downtime caused by overload or short circuit. Furthermore, the fuse state monitoring circuit provided in the embodiment of the present application is not limited by system power and can monitor whether the fuse is blown under various voltages or powers.

[0080] like Figure 7 As shown, the embodiment of the present application also provides a power distribution system, which includes a power supply 210, a load 230 and Figure 2-Figure 6 Any one of the fuse status monitoring circuits 220;

[0081] The fuse status monitoring circuit 220 is connected between the power supply 210 and the load 230 , with the other end of the load 230 being grounded GND, and is used for controlling the fuse supply from the power supply 210 to the load 230 and monitoring the status of the fuse.

[0082] It should be understood that the processing details of the fuse status monitoring circuit in the embodiment of the present application can be referred to Figure 2-Figure 6 The related descriptions of the illustrated embodiment and related extended embodiments will not be repeated in the embodiments of this application.

[0083] It should be noted that the embodiments described in this application are only a part of the embodiments of this application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the accompanying drawings can be arranged and designed in various different configurations. Therefore, the above detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the application for protection, but merely represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application.

[0084] The words "first, second, third" and other similar terms in the specification and claims are only used to distinguish similar objects and do not represent a specific ordering of the objects. It is understandable that the specific order or sequence can be interchanged where permitted so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0085] In the above description, the numbers representing the steps involved do not necessarily mean that the steps must be executed. Intermediate steps may also be included or replaced by other steps. If permitted, the order of the previous and next steps may be interchanged or executed simultaneously.

[0086] The term "comprising" as used in the specification and claims should not be construed as limiting to what is listed thereafter; it does not exclude other elements or steps. Thus, it should be interpreted as specifying the presence of the features, integers, steps, or components mentioned, but not excluding the presence or addition of one or more other features, integers, steps, or components, or groups thereof. Thus, the expression "a device comprising means A and B" should not be limited to a device consisting solely of components A and B.

[0087] The term "one embodiment" or "an embodiment" mentioned in this specification means that the specific features, structures, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present application. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing in various places in this specification do not necessarily refer to the same embodiment, but may refer to the same embodiment. In addition, in the various embodiments of the present application, unless otherwise specified or there is a logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced to each other. The technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0088] Note that the above are only preferred embodiments of the present application and the technical principles employed. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the scope of protection of the present application, all of which fall within the scope of protection of the present application.

Claims

1. A fuse status monitoring circuit, characterized in that: include: A fuse connected between the power supply and the load, with the other end of the load being grounded; The two ends of the fuse are connected to a first resistor and a second resistor respectively, the other end of the first resistor is connected to the other end of the second resistor and then connected in series with a third resistor to be grounded; It also includes a voltage sampling circuit, which is connected to the voltage sampling end of the third resistor through a sampling channel, and monitors the state of the fuse according to the sampling voltage of the third resistor by the voltage sampling circuit.

2. The circuit according to claim 1, wherein: It also includes a first voltage stabilizing diode connected to both ends of the third resistor.

3. The circuit according to claim 1, wherein: Also included are a fourth resistor and a fifth resistor connected in series between the ground terminal of the third resistor and the ground terminal of the load; The voltage sampling circuit is connected to the voltage sampling end of the third resistor through a first sampling channel and to the voltage sampling end of the fourth resistor through a second sampling channel, and monitors the state of the fuse according to the differential voltage between the first sampling channel and the second sampling channel.

4. The circuit according to claim 3, characterized in that It also includes a second voltage stabilizing diode connected to both ends of the fourth resistor.

5. The circuit according to claim 1 or 3, characterized in that It also includes a processor module connected to the output end of the voltage sampling circuit, which is used to determine whether the fuse is blown according to the signal output by the voltage sampling circuit.

6. The circuit according to claim 1, wherein: The voltage sampling circuit includes an ADC sampling circuit, and the ADC sampling circuit is connected to the voltage sampling end of the third resistor through its sampling channel.

7. The circuit according to claim 3, characterized in that The voltage sampling circuit includes an ADC sampling circuit, which is connected to the voltage sampling end of the third resistor through a first sampling channel and to the voltage sampling end of the fourth resistor through a second sampling channel.

8. The circuit according to claim 1, wherein: The voltage sampling circuit includes a first comparator and a second comparator, wherein the first input terminals of the first comparator and the second comparator are respectively connected to the voltage sampling terminal of the third resistor, and output comparison results according to the reference voltage set at their second input terminals.

9. The circuit according to claim 3, characterized in that The voltage sampling circuit includes a first amplifier, a second amplifier, a third amplifier, a first comparator and a second comparator; The first input terminal of the first amplifier is connected to the voltage sampling terminal of the third resistor, and a sixth resistor is connected between the second input terminal and the output terminal of the first amplifier; The first input terminal of the second amplifier is connected to the voltage sampling terminal of the fourth resistor, and the seventh resistor is connected between the second input terminal and the output terminal of the second amplifier; The output terminal of the first amplifier is connected to the first input terminal of the third amplifier via an eighth resistor, the output terminal of the second amplifier is connected to the second input terminal of the third amplifier via a ninth resistor, a tenth resistor is connected between the first input terminal and the output terminal of the third amplifier, and an eleventh resistor is connected between the second input terminal of the third amplifier and the ground terminal; The first input terminals of the first comparator and the second comparator are respectively connected to the output terminal of the third amplifier, and output comparison results according to the reference voltages set at the second input terminals thereof.

10. A power distribution system, characterized in that: A device comprising a power supply, a load, and a fuse state monitoring circuit according to any one of claims 1 to 9; The fuse state monitoring circuit is connected between the power supply and the load, and is used for fusing control of the power supply to the load and monitoring the state of the fuse.

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