Miniature glass passivation packaging high-voltage silicon stack
By designing a micro glass passivation package high-voltage silicon stack, the structure of connecting leads and internal electrodes at both ends of the glass package shell is solved, and the problem of large size and poor heat dissipation effect is achieved, miniaturization and convenient installation are achieved.
Patent Information
- Application Number
- CN202421671672.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-16
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2034-07-16
AI Technical Summary
The existing glass passivation high-pressure silicon stack packaging shell has a large size, poor heat dissipation effect, and complex installation process.
A micro glass passivation package high-voltage silicon stack is designed, using the two ends of the glass packaging shell to connect the leads, the internal electrodes are electrically connected to the leads, and a cell is set on the electrode to connect the die. The die is stacked on the inside of the glass packaging shell and fixed by welding and fixing, achieving a compact packaging of the electrodes and dies.
It realizes the miniaturization of the high-voltage silicon stack of glass passivation packaging, has good heat dissipation effect, is simple to install, and takes up little space.
Smart Images

Figure CN223284971U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of glass passivation packaging, in particular to a micro glass passivation packaging high-voltage silicon stack. Background Art
[0002] With the rapid development of modern electronic technology, the demand for glass-passivated packaged high-voltage silicon stacks is increasing. Glass-passivated high-voltage silicon stack device products have high reverse operating peak voltage, low reverse leakage current, and are glass-packaged. They are highly resistant to temperature shock and mechanical shock and have high reliability. They are widely used in circuits of various equipment and instruments. Although traditional glass-passivated high-voltage silicon stacks can meet certain needs.
[0003] There is a common problem with existing encapsulated glass shells, that is, the outer side of the encapsulated glass is relatively large, the heat dissipation effect is not very good, and it takes up a lot of space when installing some complete machines, and the installation process is more troublesome. Utility Model Content
[0004] In order to solve the above technical problems, the utility model provides a micro glass passivation packaged high-voltage silicon stack.
[0005] The utility model is achieved through the following technical solutions.
[0006] The present invention provides a micro glass passivation packaged high-voltage silicon stack, comprising a glass package shell, both ends of the exterior of the glass package shell are connected to leads, and electrodes are connected between the two ends of the interior of the glass package shell close to the leads, and the two ends of the electrodes are electrically connected to the leads at both ends of the glass package shell;
[0007] A plurality of cells are arranged on the electrode, each of which is connected to a tube die. The tube die chip is a PN made of single crystal silicon. The sides of the plurality of tube dies away from the cell are stacked and connected to the inner side of the glass package shell.
[0008] Preferably, the length of the tube core is 1.1 mm to 1.3 mm.
[0009] Preferably, the electrode is made of metal molybdenum.
[0010] Preferably, the length of the electrode is 1 mm to 1.3 mm.
[0011] Preferably, the lead wire is a copper wire.
[0012] Preferably, the length of the lead is between 20 mm and 25 mm.
[0013] Preferably, a metal film layer is provided on the electrode, and the metal film layer is made of aluminum material.
[0014] Preferably, the diameter of the glass package shell between two ends close to the electrodes is 2 mm to 2.5 mm.
[0015] Preferably, the cross-sectional diameter of the tube core is 180 μm to 220 μm.
[0016] Preferably, the cross-sectional diameter of the lead wire is between 0.45 mm and 0.55 mm.
[0017] The beneficial effects of the present invention are as follows: leads are connected at both ends of the glass packaging shell, the electrodes are electrically connected to the leads, and at the same time, multiple tube cores are packaged and connected in multiple units on the electrodes, and the ends of the multiple tube cores away from the electrodes are fixedly stacked on the inner wall of the glass packaging shell, so that the glass packaging shell with a maximum diameter of 2mm to 2.5mm can be used to package the electrodes and multiple tube cores, thereby realizing the miniaturization of the glass passivation packaged high-voltage silicon stack, with a small size and good heat dissipation effect. At the same time, the space occupied during the installation of the whole machine is small, which is convenient for operation and the installation process is simple. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a structural diagram of the utility model;
[0019] Explanation of reference numerals: 1 - electrode; 2 - die; 3 - glass package; 4 - lead; 5 - unit cell. DETAILED DESCRIPTION
[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0021] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0022] In the examples of this application, refer to Figure 1, including a glass packaging shell 3, which is set to an ellipsoid shape. The specific length of the two ends of the longest diameter of the glass packaging shell 3 is 2.5 mm. The two ends of the outer side of the glass packaging shell 3 near the longest diameter of the glass packaging shell 3 are connected to the lead 4. The two ends of the inner side of the glass packaging shell 3 near the lead 4 are connected to the electrode 1. The two ends of the electrode 1 are respectively in contact with the lead 4 placed at the two ends of the glass packaging shell 3. At the same time, the electrode 1 and the lead 4 are sintered together by solder to achieve electrical connection between the two end electrodes 1 and the lead 4 at the two ends of the glass packaging shell 3.
[0023] In the examples of this application, refer to Figure 1 A plurality of cells 5 are provided on the electrode 1, and a metal film layer is provided on the plurality of cells 5. The metal film layer is made of aluminum material, and the thickness of the metal film layer is 0.003mm to 0.005mm. A tube core 2 is connected to each cell 5, and the metal film layer is sintered at high temperature so that the plurality of tube cores 2 are fixedly connected in the plurality of cells 5. The tube core 2 chip is a PN made of single crystal silicon. The side of the plurality of tube cores 2 away from the cell 5 is stacked and connected to the inner side of the glass packaging shell 3. Under high temperature sintering, the plurality of tube cores 2 are stacked and fixed on the inner wall of the glass packaging shell 3.
[0024] In the embodiment of the present application, the length of a single tube die 2 is specifically 1.1±0.1 mm, and the cross-sectional diameter of the tube die 2 is specifically 210 μm, so as to facilitate installation of multiple tube dies 2 in the glass packaging shell 3 .
[0025] In the embodiment of the present application, the electrode 1 is made of metal molybdenum, which has the characteristics of high conductivity, good thermal conductivity, and high temperature resistance. The specific length of the electrode 1 is 1mm±0.01mm, which is convenient for assembly in the glass packaging shell 3.
[0026] In the embodiment of the present application, the lead 4 is a copper wire with good conductivity. The specific length of the lead 4 is 5 mm ± 0.01 mm, and the cross-sectional diameter of the lead 4 is specifically 0.5 mm ± 0.01 mm, which is convenient for connection with the glass packaging shell 3.
[0027] The working principle of this embodiment is as follows: leads 4 are connected to both ends of the glass packaging shell 3, and the electrode 1 with a length of 1mm±0.01mm is connected to the lead 4 with a length of 5mm±0.01mm through solder, so that the electrode 1 is electrically connected to the lead 4. At the same time, multiple tube cores 2 with a length of specifically 1.1±0.1mm and a cross-sectional diameter of 210μm are packaged and connected to multiple units 5 on the electrode 1, and are fixed in the unit cell 5 by welding a metal film layer. The ends of the multiple tube cores 2 away from the electrode 1 are fixedly stacked on the inner wall of the glass packaging shell 3, so that the glass packaging shell 3 with a maximum diameter of 2.5mm encapsulates the electrode 1 and the multiple tube cores 2, thereby realizing the miniaturization of the glass passivated packaged high-voltage silicon stack, which has a small size and good heat dissipation effect. At the same time, it occupies a small space during the installation of the whole machine, is easy to operate, and has a simple installation process.
[0028] The above are only preferred embodiments of the present invention and are not intended to limit the patent scope of the present invention. All equivalent structural transformations made based on the contents of the present invention specification and drawings, or direct / indirect applications in other related technical fields, are included in the patent protection scope of the present invention.
Claims
1. A micro glass passivation packaged high voltage silicon stack, characterized by: It comprises a glass packaging shell (3), both ends of the outside of the glass packaging shell (3) are connected to leads (4), an electrode (1) is connected between the two ends of the inside of the glass packaging shell (3) close to the leads (4), and both ends of the electrode (1) are electrically connected to the leads (4) at both ends of the glass packaging shell (3); A plurality of cells (5) are provided on the electrode (1), each of the cells (5) is connected to a tube core (2), the tube core (2) chip is a PN made of single crystal silicon, and a plurality of the tube cores (2) are stacked and connected on the inner side of the glass packaging shell (3) on a side away from the cell (5).
2. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The length of the tube core (2) is 1.1 mm to 1.3 mm.
3. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The electrode (1) is made of metal molybdenum.
4. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The length of the electrode (1) is 1 mm to 1.3 mm.
5. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The lead wire (4) is a copper wire.
6. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The length of the lead wire (4) is between 20 mm and 25 mm.
7. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: A metal film layer is provided on the electrode (1), and the metal film layer is made of aluminum material.
8. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The diameter of the glass packaging shell (3) between the two ends close to the electrode (1) is 2 mm to 2.5 mm.
9. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The cross-sectional diameter of the tube core (2) is 180 μm to 220 μm.
10. The micro glass passivation packaged high voltage silicon stack according to claim 1, characterized in that: The cross-sectional diameter of the lead wire (4) is between 0.45 mm and 0.55 mm.