Acoustic signal filter circuit

Abstract

The utility model discloses a sound wave signal filter circuit, which comprises a differential amplifier, a prefilter, a program control amplification circuit group, a broadband filter, a signal translation circuit, a high-speed analog-to-digital converter (ADC) circuit used for realizing analog-to-digital conversion of signals, and a microcontroller used for sending signals, and is characterized in that the differential amplifier is connected with an SBIN + pin and an SBIN-pin; the output of the differential amplifier is directly connected to the input of the prefilter, the output of the prefilter is then connected to the input of the program control amplification circuit group, the output of the program control amplification circuit group is connected to the input of the broadband filter, and the output of the broadband filter is connected to the input of the signal translation circuit. And the output of the signal translation circuit is connected with the high-speed ADC circuit. Attenuation and distortion of the signals in the transmission process are avoided, and the integrity and accuracy of the signals are improved; and the design of the prefilter and the broadband filter effectively improves the signal-to-noise ratio of the signal, so that the signal is clearer.

Description

Technical Field

[0001] The utility model relates to the technical field of acoustic wave well logging, in particular to an acoustic wave signal filtering circuit. Background Art

[0002] Acoustic variable density logging is a type of acoustic logging. Its principle is to use the large difference in acoustic impedance between cement and mud (or water) to attenuate sound waves propagating along the casing axis, thereby reflecting the quality of the cement-casing and casing-formation bonds. Acoustic variable density logging evolved from acoustic amplitude logging. This method has played a positive role in oilfield exploration and development.

[0003] In the process of digital acoustic variable density logging, what we want to obtain is the full wave train information after the acoustic wave propagates in the formation. Through ground software digital signal processing, we can obtain waveform information such as casing wave, formation wave, direct wave, etc., and thus carry out cementing quality analysis.

[0004] The current acoustic amplitude logging method transmits the entire acoustic wave train to the surface, where the surface logging system calculates the amplitude of the first wave. This logging method requires the acoustic wave signal to pass through the cable core during transmission, resulting in significant amplitude attenuation, insufficient signal strength, and a low signal-to-noise ratio. Utility Model Content

[0005] In order to solve the above problem, the utility model provides a sound wave signal filtering circuit to solve the problem.

[0006] To achieve the above objectives, this application provides the following technical solutions:

[0007] A sound wave signal filtering circuit includes a differential amplifier, a prefilter, a programmable amplifying circuit group, a broadband filter, a signal shifting circuit, a high-speed ADC circuit for implementing signal analog-to-digital conversion, and a microcontroller for sending signals. The differential amplifier is connected to SB_IN+ and SB_IN- pins, the output of the differential amplifier is directly connected to the input of the prefilter, the output of the prefilter is further connected to the input of the programmable amplifying circuit group, the output of the programmable amplifying circuit group is connected to the input of the broadband filter, the output of the broadband filter is connected to the input of the signal shifting circuit, and the output of the signal shifting circuit is connected to the high-speed ADC circuit.

[0008] It is further configured as follows: the programmable amplification circuit group consists of a primary amplification circuit and a secondary amplification circuit, the primary amplification circuit is directly controlled by three IO ports of the CPU to provide 8 amplification gears, and the secondary amplification circuit is controlled by another independent IO port of the CPU, providing 2 amplification gears for selection.

[0009] It is further configured as follows: the first stage of the programmable amplifier circuit includes a digital switch U5, a digital switch U3 and an ADA4610-2ARZ amplifier U4A, a resistor R12, the other end of the resistor R12 is input to the negative input pin 2# of U4A, and the other end of the resistor R12 is also connected to the input pins S1-S8 of U5 through 8 resistors respectively, the three control pins A0-A2 of U5 are directly connected to the three IO ports of the CPU, the output pin D of U5 is directly connected to the output pin 1# of U4A, the positive input pin 3# of U4A is directly connected to the analog ground, the negative input pin 2# of U4A is also connected to the capacitor C16, the other end of the capacitor C16 is connected to R44, the other end of R44 is connected to the output pin 1# of U4A, the output pin 1# of U4A is connected to the capacitor C11, the other end of the capacitor C11 is grounded through R10 and connected to R9.

[0010] It is further configured as follows: the other end of R9 is connected to the input pin D of U3 and the negative input pin 2# of U1A respectively, the control pin IN of U3 is directly connected to an IO port of the CPU, the output pins SA and SB of U3 are connected to the output pin 1# of U1A through R4 and R5 respectively, the negative input pin 2# of U1A is connected to the capacitor C4, and the other end of the capacitor C4 is connected to the output pin 1# of U1A.

[0011] It is further configured as follows: a phase compensation circuit is provided between the programmable amplifier circuit and the pre-filter.

[0012] It is further configured as follows: a reference voltage circuit is provided between the signal shift circuit and the high-speed ADC circuit, and the reference voltage circuit is composed of a high-precision, low-temperature drift reference chip model REF3225 and a 10k and 2k high-precision resistor divider.

[0013] It is further configured to include: a communication circuit, which uses a high-temperature CAN communication chip of model SN65HVD233SHKJ to realize data interaction with the main control module.

[0014] It is further configured as follows: the pre-filter adopts a high-Q value bandpass filter with a bandwidth of 5Khz-20Khz.

[0015] It is further configured as follows: a CAN bus is internally provided in the microcontroller.

[0016] It is further configured as follows: the broadband filter adopts a broadband filter with a filtering frequency of 500hz-35Khz.

[0017] Compared with the prior art, the beneficial technical effects of the present invention are:

[0018] 1. Downhole digitization: By directly digitizing the acoustic signal underground, signal attenuation and distortion during transmission are avoided, improving signal integrity and accuracy. The design of the prefilter and broadband filter effectively improves the signal-to-noise ratio, making the signal clearer and easier to analyze. The high-speed ADC provides high-precision analog-to-digital conversion capabilities, ensuring the accuracy of signal digitization.

[0019] 2. Flexible amplification capability: The programmable amplification circuit provides multi-level amplification capability, which can be adjusted according to different signal strength requirements to ensure that the signal can reach the ideal strength under various conditions; through the phase compensation circuit, the self-excited interference in the high-frequency band is reduced, and the stability of signal amplification is improved.

[0020] 3. Digital signal processing: The digital processing capability of the microcontroller enables efficient signal compression, packaging and transmission, improving the speed and efficiency of data processing.

[0021] 4. Modular design: Modular design simplifies circuit assembly and maintenance, reduces instrument size, and improves equipment reliability and ease of maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 This is a schematic diagram of an application scenario of the present utility model;

[0024] Figure 2 This is a schematic diagram of the internal connection principle of the acoustic signal filtering circuit of the present utility model;

[0025] Figure 3 This is a circuit diagram of the program-controlled amplifier circuit group of the utility model;

[0026] Figure 4 This is a schematic diagram of the appearance of the acoustic signal filtering circuit of the present utility model; DETAILED DESCRIPTION

[0027] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0028] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.

[0029] Example

[0030] Reference Figure 1-Figure 4 , which is an acoustic signal filtering circuit disclosed in the utility model, includes a differential amplifier, a prefilter, a programmable amplifier circuit group, a broadband filter, a signal shifting circuit, and a high-speed ADC circuit for realizing signal analog-to-digital conversion, thereby amplifying, filtering, gain adjusting, level shifting, and digitizing the signal in sequence to ensure that the final digital signal is both accurate and reliable.

[0031] The acoustic signal filtering circuit also includes a microcontroller and a CAN controller circuit. The microcontroller has an internal CAN bus. Upon receiving a SYNC command, the microcontroller sends data to the main control module via the internal CAN bus. This completes the signal filtering module's workflow and allows it to wait for the next acoustic signal.

[0032] Specifically, the differential amplifier is connected to the SB_IN+ and SB_IN- pins, the output of the differential amplifier is directly connected to the input of the prefilter, the output of the prefilter is connected to the input of the programmable amplifier circuit group, the output of the programmable amplifier circuit group is connected to the input of the broadband filter, the output of the broadband filter is connected to the input of the signal shift circuit, and the output of the signal shift circuit is connected to the high-speed ADC circuit.

[0033] Among them, the pre-filter adopts a high-Q bandpass filter with a bandwidth of 5Khz-20Khz to improve the signal-to-noise ratio at the source of the sound wave signal.

[0034] The broadband filter has a filtering frequency of 500hz-35Khz and a transmission gain of 1, and is mainly used to attenuate the noise generated by the circuit itself.

[0035] The programmable amplifier circuit group consists of a first-stage amplifier circuit and a second-stage amplifier circuit. It can be set to 16 levels, with a maximum amplification factor of up to 75dB. The signal is filtered by the pre-filter and connected to the first-stage amplifier circuit. The circuit is directly controlled by the three IO ports of the CPU and provides 8 amplification gears for selection to ensure that the signal obtains appropriate gain in the first stage.

[0036] After completing the first stage of amplification, the signal continues to flow to the second stage amplification circuit, which is controlled by another independent IO port of the CPU and provides two amplification gears for selection, further adjusting the signal to achieve the final amplification effect.

[0037] Specifically, refer to Figure 3 The first stage of the programmable amplifier circuit includes a digital switch U5 of model DG408, a digital switch U3 of DG419 and an ADA4610-2ARZ amplifier U4A, a resistor R12, and the other end of the resistor R12 is input to the negative input pin 2# of U4A. In addition, the other end of the resistor R12 is connected to the input pins S1-S8 of U5 through 8 resistors (R14, R15, R16, R18, R22, R23, R24, and R25). The three control pins A0-A2 of U5 are directly connected to the three IO ports of the CPU. The output pin D of U5 is directly connected to the output pin 1# of U4A. The positive input pin 3# of U4A is directly connected to the analog ground. The negative input pin 2# of U4A is also connected to the capacitor C16. The other end of the capacitor C16 is connected to R44. The other end of R44 is connected to the output pin 1# of U4A. Finally, the signal output by the output pin 1# of U4A is the signal that completes the first stage of amplification.

[0038] The output pin 1# of U4A is connected to the capacitor C11. The other end of the capacitor C11 is grounded through R10 and connected to R9 to enter the second stage of amplification. The other end of R9 is connected to the input pin D of U3 and the negative input pin 2# of U1A respectively. The control pin IN of U3 is directly connected to an IO port of the CPU. The output pins SA and SB of U3 are connected to the output pin 1# of U1A through R4 and R5 respectively. The negative input pin 2# of U1A is connected to the capacitor C4. The other end of the capacitor C4 is connected to the output pin 1# of U1A. At this point, the output pin 1# of U1A is the sound wave signal that has completed the secondary amplification.

[0039] Furthermore, a phase compensation circuit is provided between the programmable amplifier circuit and the pre-filter to avoid self-excitation interference of the programmable amplifier circuit in the high frequency band.

[0040] A voltage reference circuit is provided between the signal shifting circuit and the high-speed ADC circuit. The high-speed ADC has a bandwidth of 16 bits and a maximum sampling rate of 1 Msps. The voltage reference consists of a REF3225 high-precision, low-temperature drift reference chip and 10k and 2k high-precision resistor dividers. The voltage reference circuit has a temperature drift of only 1ppm / °C. In addition to supplying the high-speed ADC, the reference voltage also provides a bias voltage for acoustic signal shifting.

[0041] Furthermore, the utility model also includes a communication circuit, and the communication circuit uses a high-temperature CAN communication chip of model SN65HVD233SHKJ to realize data interaction with the main control module.

[0042] The working principle and beneficial effects of the utility model are as follows:

[0043] The weak electrical signal received by the present invention is firstly amplified by a differential amplifier. The differential amplifier can reduce common-mode noise and improve the quality of the signal. The initially amplified signal enters the pre-filter, whose bandwidth is set to 5KHz to 20KHz to improve the signal-to-noise ratio and ensure that only signals within a specific frequency range pass through. The output of the pre-filter is connected to a programmable amplifier circuit group, which consists of a two-stage amplifier circuit and can achieve 16-level amplification adjustment. The maximum amplification factor can reach 75dB, ensuring that the signal has sufficient strength during transmission. A phase compensation circuit is set between the programmable amplifier circuit and the pre-filter to avoid self-excited interference in the high-frequency band and ensure the stability of signal amplification. The broadband filter further attenuates the circuit itself. Noise, its filtering frequency range is 500Hz to 35KHz, and the transmission gain is 1 times. After the signal is broadband filtered, the level is adjusted by the signal shift circuit to ensure that the signal is within the effective quantization range of the ADC. The output of the signal shift circuit is sent to the high-speed ADC circuit for analog-to-digital conversion. The ADC has a 16-bit bandwidth and a maximum sampling rate of 1Msps to achieve high-precision signal conversion. The converted digital signal is sent to the microcontroller through the local bus for digital compression and packaging processing. The microcontroller has powerful computing and storage capabilities and a processing rate of up to 150MIPS. After receiving the synchronization command, the microcontroller sends the processed data to the main control module through the internal CAN bus to complete the work flow of the signal filtering module.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A sound wave signal filtering circuit, characterized in that: It includes a differential amplifier, a prefilter, a programmable amplifying circuit group, a broadband filter, a signal shifting circuit, a high-speed ADC circuit for realizing signal analog-to-digital conversion, and a microcontroller for sending signals. The differential amplifier is connected to the SB_IN+ and SB_IN- pins. The output of the differential amplifier is directly connected to the input of the prefilter. The output of the prefilter is further connected to the input of the programmable amplifying circuit group. The output of the programmable amplifying circuit group is connected to the input of the broadband filter. The output of the broadband filter is connected to the input of the signal shifting circuit. The output of the signal shifting circuit is connected to the high-speed ADC circuit.

2. The acoustic signal filtering circuit according to claim 1, wherein: The programmable amplifier circuit group consists of a primary amplifier circuit and a secondary amplifier circuit. The primary amplifier circuit is directly controlled by three IO ports of the CPU to provide 8 amplification gears. The secondary amplifier circuit is controlled by another independent IO port of the CPU and provides 2 amplification gears for selection.

3. The acoustic signal filtering circuit according to claim 2, characterized in that: The first stage of the programmable amplifier circuit includes a digital switch U5, a digital switch U3 and an ADA4610-2ARZ amplifier U4A, a resistor R12, the other end of the resistor R12 is input to the negative input pin 2# of U4A, and the other end of the resistor R12 is also connected to the input pins S1-S8 of U5 through 8 resistors respectively. The three control pins A0-A2 of U5 are directly connected to the three IO ports of the CPU, the output pin D of U5 is directly connected to the output pin 1# of U4A, the positive input pin 3# of U4A is directly connected to the analog ground, the negative input pin 2# of U4A is also connected to the capacitor C16, the other end of the capacitor C16 is connected to R44, the other end of R44 is connected to the output pin 1# of U4A, the output pin 1# of U4A is connected to the capacitor C11, the other end of the capacitor C11 is grounded through R10 and connected to R9.

4. The acoustic signal filtering circuit according to claim 3, characterized in that: The other end of R9 is connected to the input pin D of U3 and the negative input pin 2# of U1A respectively. The control pin IN of U3 is directly connected to an IO port of the CPU. The output pins SA and SB of U3 are connected to the output pin 1# of U1A through R4 and R5 respectively. The negative input pin 2# of U1A is connected to capacitor C4, and the other end of capacitor C4 is connected to the output pin 1# of U1A.

5. The acoustic signal filtering circuit according to claim 1, wherein: A phase compensation circuit is provided between the program-controlled amplifier circuit and the pre-filter.

6. The acoustic signal filtering circuit according to claim 1, characterized in that: A reference voltage circuit is provided between the signal shift circuit and the high-speed ADC circuit. The reference voltage circuit is composed of a high-precision, low-temperature drift reference chip model REF3225 and 10k and 2k high-precision resistor dividers.

7. The acoustic signal filtering circuit according to claim 1, characterized in that: It also includes a communication circuit, which uses a high-temperature CAN communication chip model SN65HVD233SHKJ to achieve data interaction with the main control module.

8. The acoustic signal filtering circuit according to claim 1, characterized in that: The pre-filter adopts a high-Q value band-pass filter with a bandwidth of 5Khz-20Khz.

9. The acoustic signal filtering circuit according to claim 1, characterized in that: The microcontroller has a CAN bus built in it.

10. The acoustic signal filtering circuit according to claim 1, characterized in that: The broadband filter adopts a broadband filter with a filtering frequency of 500hz-35Khz.

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