Rapid bleeder circuit

Abstract

The utility model provides a rapid bleeder circuit, which comprises a linear step-down chip, a first level acquisition circuit, a comparison circuit and a second level acquisition circuit, and is characterized in that the first end of the linear step-down chip is connected with an external power supply, and the second end of the linear step-down chip is connected with a low-power-consumption device; one end of the first level acquisition circuit is connected with a first end of the linear voltage reduction chip, one end of the second level acquisition circuit is connected with a second end of the linear voltage reduction chip, the other end of the first level acquisition circuit is connected with a first input end of the comparison circuit, and the other end of the second level acquisition circuit is connected with a second input end of the comparison circuit. The output end of the comparison circuit is connected with the control end of the linear step-down chip, and the linear step-down chip is a linear step-down chip with a discharge function. The low-power-consumption device can be prevented from being in an abnormal state due to residual electric quantity, and the situation that an electronic product is abnormal in the production or use process and cannot be normally used is avoided.

Description

Technical Field

[0001] The present application relates to the technical field of power supply control for low-power electronic devices, and in particular to a fast discharge circuit. Background Art

[0002] With the increasing popularity of smart wearables and the integration of electronic products into everyday homes, users are increasingly concerned about the battery life of portable electronic devices. Portable electronic products are generally categorized as rechargeable or non-rechargeable. Regardless of the type, low-power designs are essential to avoid battery life that impacts the user experience. From a circuit design perspective, low-power products often encounter situations during manufacturing and use where power consumption is particularly low during shutdown or sleep periods. During these periods, when the product loses power or the battery is replaced, the internal circuitry cannot quickly discharge the charge. This gradual decrease in charge can cause the residual charge in the electronic product's circuitry to remain outside the normal operating voltage range of the chip for a period of time, making chip operation unstable. If the user replaces or charges the battery at this time to restore the voltage to normal, the MCU cannot reset properly and may remain in the abnormal state caused by the residual charge. This can easily cause electronic products to malfunction during production or use, impacting user experience and reliability. Utility Model Content

[0003] In view of the problem that existing circuits can easily cause electronic products to malfunction during production or use, resulting in malfunctions, affecting user experience, and affecting the reliability of electronic products, this application proposes a fast discharge circuit.

[0004] The fast discharge circuit proposed in this application includes: a linear buck chip, a first level acquisition circuit, a comparison circuit, and a second level acquisition circuit, wherein a first end of the linear buck chip is connected to an external power supply, a second end of the linear buck chip is connected to a low-power device, one end of the first level acquisition circuit is connected to the first end of the linear buck chip, one end of the second level acquisition circuit is connected to the second end of the linear buck chip, the other end of the first level acquisition circuit is connected to the first input end of the comparison circuit, the other end of the second level acquisition circuit is connected to the second input end of the comparison circuit, and the output end of the comparison circuit is connected to the control end of the linear buck chip, wherein the linear buck chip is a linear buck chip with a discharge function.

[0005] Optionally, the first level acquisition circuit includes a first resistor and a second resistor, wherein one end of the first resistor serves as one end of the first level acquisition circuit and is connected to the first end of the linear buck chip, the other end of the first resistor serves as the other end of the first level acquisition circuit and is connected to the first input end of the comparison circuit, one end of the second resistor is connected to the other end of the first resistor, and the other end of the second resistor is grounded.

[0006] Optionally, the second level acquisition circuit includes a third resistor and a fourth resistor, wherein one end of the third resistor serves as one end of the second level acquisition circuit and is connected to the second end of the linear buck chip, the other end of the third resistor serves as the other end of the second level acquisition circuit and is connected to the second input end of the comparison circuit, one end of the fourth resistor is connected to the other end of the third resistor, and the other end of the fourth resistor is grounded.

[0007] Optionally, the comparison circuit includes a comparator and a fifth resistor, wherein the first input end of the comparator is connected to the other end of the first level acquisition circuit as the first input end of the comparison circuit, the second input end of the comparator is connected to the other end of the second level acquisition circuit as the second input end of the comparison circuit, the output end of the comparator is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the control end of the linear buck chip as the output end of the comparison circuit.

[0008] Optionally, the circuit further includes a first protection circuit, one end of the first protection circuit is connected to the output end of the comparison circuit, and the other end of the first protection circuit is connected to the first end of the linear buck chip.

[0009] Optionally, the first protection circuit includes a sixth resistor, wherein one end of the sixth resistor is connected to the output end of the comparison circuit as one end of the first protection circuit, and the other end of the sixth resistor is connected to the first end of the linear buck chip as the other end of the first protection circuit.

[0010] Optionally, the circuit also includes a second protection circuit, which includes a first capacitor and a second capacitor, wherein one end of the second capacitor is connected to the first end of the linear buck chip, and the other end of the second capacitor is grounded, and one end of the first capacitor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0011] Optionally, the circuit further includes a third protection circuit, which includes a third capacitor, wherein one end of the third capacitor is connected to the second end of the linear buck chip, and the other end of the third capacitor is grounded.

[0012] The fast discharge circuit proposed in this application can compare the input level of the external power supply with the level of the low-power device through a comparison circuit. When the comparison circuit determines that the voltage needs to be quickly discharged, the linear buck chip with a discharge function is used to reduce the input level of the low-power device to 0, thereby preventing the low-power device from being in an abnormal state due to residual power. This prevents electronic products from experiencing abnormalities during production or use, preventing them from functioning normally. This improves the user experience and the reliability of electronic products.

[0013] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0015] Figure 1 A schematic diagram of a fast discharge circuit is shown;

[0016] Figure 2 shows a schematic diagram of another fast discharge circuit;

[0017] Figure 3 A comparator logic truth table of a comparison circuit of a possible embodiment is shown;

[0018] Figure 4 The figure shows the waveform diagram of the input and output levels of the fast discharge circuit when the external power output is powered off. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for which protection is claimed, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, each other embodiment obtained by those skilled in the art without making creative work falls within the scope of protection of the present application.

[0020] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0021] This application relates to a fast discharge circuit that can compare the input level of an external power supply with the level of a low-power device through a comparison circuit. When the comparison circuit determines that the voltage needs to be quickly discharged, a linear step-down chip with a discharge function is used to reduce the input level of the low-power device to 0, thereby preventing the low-power device from being in an abnormal state due to residual power. This prevents electronic products from experiencing abnormalities during production or use, preventing them from being used normally. This improves user experience and the reliability of electronic products.

[0022] See also Figure 1 , Figure 1 Figure 1 shows a schematic diagram of a fast discharge circuit. Figure 1 As shown, the fast discharge circuit provided in the embodiment of the present application includes: a linear buck chip 101, a comparison circuit 102, a first level acquisition circuit 103, a second level acquisition circuit 104, an external power supply VCC, and a low-power device 105.

[0023] A first end of the linear buck chip 101 is connected to an external power supply VCC, a second end of the linear buck chip 101 is connected to a low-power device 105, one end of the first level acquisition circuit 103 is connected to the first end of the linear buck chip 101, one end of the second level acquisition circuit 104 is connected to the second end of the linear buck chip 101, the other end of the first level acquisition circuit 103 is connected to a first input end of the comparison circuit 102, the other end of the second level acquisition circuit 104 is connected to a second input end of the comparison circuit 102, and the output end of the comparison circuit 102 is connected to a control end of the linear buck chip 101.

[0024] The linear buck chip 101 is a linear buck chip 101 with a discharge function.

[0025] Specifically, the first level acquisition circuit 103 includes a first resistor and a second resistor.

[0026] One end of the first resistor serves as one end of the first level acquisition circuit 103 and is connected to the first end of the linear step-down chip 101; the other end of the first resistor serves as the other end of the first level acquisition circuit 103 and is connected to the first input end of the comparison circuit 102; one end of the second resistor is connected to the other end of the first resistor; and the other end of the second resistor is grounded.

[0027] Specifically, the second level acquisition circuit 104 includes a third resistor and a fourth resistor.

[0028] One end of the third resistor serves as one end of the second level acquisition circuit 104 and is connected to the second end of the linear step-down chip 101. The other end of the third resistor serves as the other end of the second level acquisition circuit 104 and is connected to the second input end of the comparison circuit 102. One end of the fourth resistor is connected to the other end of the third resistor, and the other end of the fourth resistor is grounded.

[0029] Specifically, the comparison circuit 102 includes a comparator and a fifth resistor.

[0030] The first input end of the comparator is connected to the other end of the first level acquisition circuit 103 as the first input end of the comparison circuit 102, the second input end of the comparator is connected to the other end of the second level acquisition circuit 104 as the second input end of the comparison circuit 102, the output end of the comparator is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the control end of the linear step-down chip 101 as the output end of the comparison circuit 102.

[0031] Specifically, the circuit further includes a first protection circuit, one end of the first protection circuit is connected to the output end of the comparison circuit 102 , and the other end of the first protection circuit is connected to the first end of the linear buck chip 101 .

[0032] Specifically, the first protection circuit includes a sixth resistor.

[0033] One end of the sixth resistor serves as one end of the first protection circuit and is connected to the output end of the comparison circuit 102 , and the other end of the sixth resistor serves as the other end of the first protection circuit and is connected to the first end of the linear buck chip 101 .

[0034] Specifically, the circuit further includes a second protection circuit, and the second protection circuit includes a first capacitor and a second capacitor.

[0035] One end of the second capacitor is connected to the first end of the linear buck chip 101, and the other end of the second capacitor is grounded. One end of the first capacitor is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0036] Specifically, the circuit further includes a third protection circuit, and the third protection circuit includes a third capacitor.

[0037] One end of the third capacitor is connected to the second end of the linear step-down chip 101 , and the other end of the third capacitor is grounded.

[0038] As an example, see Figure 2 , Figure 2 FIG1 shows a schematic diagram of another fast discharge circuit. Figure 2 As shown in , the fast discharge circuit provided in the embodiment of the present application includes: a linear buck chip 101, a low-power device 105, a comparator U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a second capacitor C2, and a third capacitor C3.

[0039] One end of the first resistor R1 serves as one end of the first level acquisition circuit 103 and is connected to the first end of the linear step-down chip 101. The other end of the first resistor R1 serves as the other end of the first level acquisition circuit 103 and is connected to the first input end of the comparison circuit 102. One end of the second resistor R2 is connected to the other end of the first resistor R1, and the other end of the second resistor R2 is grounded.

[0040] One end of the third resistor R3 serves as one end of the second level acquisition circuit 104 and is connected to the second end of the linear step-down chip 101. The other end of the third resistor R3 serves as the other end of the second level acquisition circuit 104 and is connected to the second input end of the comparison circuit 102. One end of the fourth resistor R4 is connected to the other end of the third resistor R3, and the other end of the fourth resistor R4 is grounded.

[0041] Specifically, the comparator U1 and the fifth resistor R5 constitute the comparison circuit 102 .

[0042] The first input end of the comparator U1 is connected to the other end of the first level acquisition circuit 103 as the first input end of the comparison circuit 102, the second input end of the comparator U1 is connected to the other end of the second level acquisition circuit 104 as the second input end of the comparison circuit 102, the output end of the comparator U1 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the control end of the linear buck chip 101 as the output end of the comparison circuit 102.

[0043] Optionally, the fast discharge circuit further includes a first protection circuit, one end of the first protection circuit is connected to the output end of the comparison circuit 102 , and the other end of the first protection circuit is connected to the first end of the linear buck chip 101 .

[0044] Specifically, the sixth resistor R6 constitutes a first protection circuit.

[0045] One end of the sixth resistor R6 is connected to the output end of the comparison circuit 102 as one end of the first protection circuit, and the other end of the sixth resistor R6 is connected to the first end of the linear buck chip 101 as the other end of the first protection circuit.

[0046] Specifically, the first capacitor C1 and the second capacitor C2 form a second protection circuit.

[0047] One end of the second capacitor C2 is connected to the first end of the linear buck chip 101, and the other end of the second capacitor C2 is grounded. One end of the first capacitor C1 is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is grounded.

[0048] Optionally, the circuit further includes a third protection circuit. As an example, the third protection circuit may be a third capacitor C3.

[0049] Specifically, one end of the third capacitor C3 is connected to the second end of the linear step-down chip 101 , and the other end of the third capacitor C3 is grounded.

[0050] Exemplarily, the resistance value of the first resistor R1 can be 1MΩ, the resistance value of the second resistor R2 can be 0.66MΩ, the resistance value of the third resistor R3 can be 1MΩ, the resistance value of the fourth resistor R4 can be 1MΩ, the resistance value of the fifth resistor R5 can be 1KΩ, the resistance value of the sixth resistor R6 can be 1MΩ, the capacitance of the first capacitor C1 can be 10μF, the capacitance of the second capacitor C2 can be 1μF, and the capacitance of the third capacitor C3 can be 1μF.

[0051] based on Figure 2 When the circuit shown in FIG. 1 is configured such that the resistance values ​​in the circuit are set to the resistance values ​​of the multiple resistors in the above examples, the following can be obtained: Figure 3 The logic truth table of comparator U1 is shown.

[0052] As an example, see Figure 3 , Figure 3 The figure shows a logic truth table of the comparator U1 of the comparison circuit 102 in a possible embodiment. The non-inverting input terminal of the comparator U1, i.e., the first input terminal of the comparison circuit 102, is connected to the other terminal of the first level acquisition circuit 103, and the inverting input terminal of the comparator U1, i.e., the second input terminal of the comparison circuit 102, is connected to the other terminal of the second level acquisition circuit 104.

[0053] based on Figure 3The logic truth table of the comparator U1 shown in the figure shows that during normal operation, the external power supply VCC outputs 5V and the normal operating voltage of the low-power device 105 is 3.3V. When the external power supply VCC is input, the level of the non-inverting input terminal of the comparator U1 is greater than the level of the inverting input terminal. At this time, the output terminal of the comparator U1 outputs a positive level. The linear buck chip 101 is controlled to turn on based on the positive level output by the comparison circuit 102. The linear buck chip 101 continuously outputs a 3.3V voltage to stably supply power to the low-power device 105.

[0054] based on Figure 3 As shown in the logic truth table of the comparator U1, when the external power supply VCC output is powered off, the potential of the external power supply VCC gradually decreases due to circuit consumption. When the potential of the external power supply VCC drops to a value close to the normal operating voltage of 3.3V of the low-power device 105, due to the different resistor divider ratios of the positive and negative input terminals of the comparator U1, the comparator U1 outputs a low level. Based on the low level output by the comparison circuit 102, the linear buck chip 101 controls the linear buck chip 101 to turn off its output, and the output of the linear buck chip 101 drops sharply to 0V, achieving a rapid discharge effect.

[0055] For details, please refer to Figure 4 , Figure 4 The figure shows the waveform diagram of the input and output levels of the fast discharge circuit when the external power supply VCC is powered off, wherein the solid line is the output voltage of the linear buck chip 101 and the dotted line is the output voltage of the external power supply VCC.

[0056] like Figure 4 As shown in FIG, when the external power supply VCC output is powered off, the potential of the external power supply VCC gradually decreases due to circuit consumption. When the potential of the external power supply VCC drops to approximately 4.2V at time t1, due to the different resistor divider ratios of the non-inverting and reverse input terminals of the comparator U1, the comparator U1 outputs a low level. Based on the low level output by the comparison circuit 102, the linear buck chip 101 controls the linear buck chip 101 to turn off its output, and the output of the linear buck chip 101 drops sharply to 0V.

[0057] based on Figure 3 As shown in the logic truth table of the comparator U1, when the circuit state of the electronic product changes and the voltage output by the external power supply VCC fluctuates, the discharge function will not be triggered as long as the amplitude of the jitter is not less than 4.2V. In this way, the low-power device 105 can obtain a stable and reliable power supply.

[0058] Here, it should be noted that, based on the resistance values ​​of the first resistor R1 , the second resistor R2 , the third resistor R3 , and the fourth resistor R4 , the output limit of the external power supply VCC is 4.2V.

[0059] The fast discharge circuit proposed in this application can compare the input level of the external power supply with the level of the low-power device through a comparison circuit. When the comparison circuit determines that the voltage needs to be quickly discharged, the linear buck chip with a discharge function is used to reduce the input level of the low-power device to 0, thereby preventing the low-power device from being in an abnormal state due to residual power. This prevents electronic products from experiencing abnormalities during production or use, preventing them from functioning normally. This improves the user experience and the reliability of electronic products.

[0060] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0061] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0062] In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is mutually contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0063] The above description is only a preferred embodiment of the present application and does not limit the scope of protection of the present application. All equivalent structural transformations made based on the contents of the present application specification and drawings under the innovative concept of the present application, or direct / indirect application in other related technical fields are included in the scope of protection of the present application.

Claims

1. A fast discharge circuit, characterized in that: The circuit includes: a linear step-down chip, a first level acquisition circuit, a comparison circuit, and a second level acquisition circuit. The first end of the linear buck chip is connected to an external power supply, the second end of the linear buck chip is connected to a low-power device, one end of the first level acquisition circuit is connected to the first end of the linear buck chip, one end of the second level acquisition circuit is connected to the second end of the linear buck chip, the other end of the first level acquisition circuit is connected to the first input end of the comparison circuit, the other end of the second level acquisition circuit is connected to the second input end of the comparison circuit, and the output end of the comparison circuit is connected to the control end of the linear buck chip. Wherein, the linear buck chip is a linear buck chip with a discharge function.

2. A fast discharge circuit according to claim 1, characterized in that: The first level acquisition circuit includes a first resistor and a second resistor. One end of the first resistor serves as one end of the first level acquisition circuit and is connected to the first end of the linear buck chip; the other end of the first resistor serves as the other end of the first level acquisition circuit and is connected to the first input end of the comparison circuit; one end of the second resistor is connected to the other end of the first resistor; and the other end of the second resistor is grounded.

3. The fast discharge circuit according to claim 1, characterized in that: The second level acquisition circuit includes a third resistor and a fourth resistor. One end of the third resistor serves as one end of the second level acquisition circuit and is connected to the second end of the linear buck chip, the other end of the third resistor serves as the other end of the second level acquisition circuit and is connected to the second input end of the comparison circuit, one end of the fourth resistor is connected to the other end of the third resistor, and the other end of the fourth resistor is grounded.

4. The fast discharge circuit according to claim 1, characterized in that: The comparison circuit includes a comparator and a fifth resistor, The first input end of the comparator is connected to the other end of the first level acquisition circuit as the first input end of the comparison circuit, the second input end of the comparator is connected to the other end of the second level acquisition circuit as the second input end of the comparison circuit, the output end of the comparator is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the control end of the linear buck chip as the output end of the comparison circuit.

5. The fast discharge circuit according to claim 1, characterized in that: The circuit further includes a first protection circuit, one end of the first protection circuit is connected to the output end of the comparison circuit, and the other end of the first protection circuit is connected to the first end of the linear buck chip.

6. The fast discharge circuit according to claim 5, characterized in that: The first protection circuit includes a sixth resistor, One end of the sixth resistor serves as one end of the first protection circuit and is connected to the output end of the comparison circuit, and the other end of the sixth resistor serves as the other end of the first protection circuit and is connected to the first end of the linear buck chip.

7. The fast discharge circuit according to claim 1, characterized in that: The circuit further includes a second protection circuit, wherein the second protection circuit includes a first capacitor and a second capacitor. One end of the second capacitor is connected to the first end of the linear buck chip, and the other end of the second capacitor is grounded; one end of the first capacitor is connected to one end of the second capacitor, and the other end of the first capacitor is grounded.

8. The fast discharge circuit according to claim 1, characterized in that: The circuit further includes a third protection circuit, wherein the third protection circuit includes a third capacitor. One end of the third capacitor is connected to the second end of the linear step-down chip, and the other end of the third capacitor is grounded.

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