Tool clamp

Abstract

The utility model discloses a tool clamp which comprises an application plate, a shell, a positioning piece and a conductive piece. The shell, the positioning piece and the application board are installed in a matched mode, a containing cavity is formed in the shell, the positioning piece is used for positioning a to-be-tested chip, the conductive piece is arranged in the containing cavity, and the conductive piece is provided with an installation part installed with the shell in a matched mode, a first end part abutting against a bonding pad on the application board and a second end part abutting against a pin of the to-be-tested chip. The second end portion of the conductive member is abutted against a pin on the top of the chip to be tested through the bending of the conductive member. According to the tool clamp provided by the utility model, the second end part of the conductive part is abutted against the pin at the top of the chip to be tested through the bending of the conductive part, so that the back hot spot positioning of the chip of the packaging product can be completed on an application board when the packaging product is in a pin-free packaging type such as DFN, QFN and the like; therefore, the success rate of failure analysis is greatly improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of chip detection, and particularly relates to a tooling fixture. Background Art

[0002] During chip failure analysis, some failed chips need to remain in working order. The typical method for locating the failure is to solder the chip to the application board and then unseal the front of the chip to expose the internal chip. To locate the failure, the application board is powered on or a signal is applied to keep the chip operational. Dedicated failure location equipment is then used to identify the chip's anomaly. For chip device failures, a gallium indium arsenide (GaInAs) micro-light microscope is typically used to locate the failure. Its principle is to detect photons generated by electron-hole combinations and hot carrier excitation.

[0003] When locating failures on the front of a chip, the microscope cannot effectively identify photons due to the potential obstruction of multiple layers of metal wiring on top of the failed device, making it impossible to locate the failure. Therefore, the common practice is to open the back of the chip and use the ability of InGaAs to transmit microscopic light through the silicon substrate to locate the failure on the back of the chip. As mentioned earlier, sometimes the chip needs to be soldered to the application board for failure location, so back-side failure location is impossible, which increases the difficulty of chip failure analysis.

[0004] The information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as an admission or any form of suggestion that the information constitutes the prior art already known to those skilled in the art. Utility Model Content

[0005] The purpose of the utility model is to provide a tool fixture, which can perform back-side failure positioning on a chip.

[0006] In order to achieve the above-mentioned purpose, a specific embodiment of the present invention provides a tooling fixture, including: an application board, a shell, a positioning member and a conductive member; the shell and the positioning member are installed in cooperation with the application board, a receiving cavity is formed in the shell, the positioning member is used to position the chip to be tested, and the conductive member is arranged in the receiving cavity. The conductive member has a mounting portion installed in cooperation with the shell, a first end abutting the solder pad on the application board, and a second end abutting the pin of the chip to be tested, and the conductive member is bent by itself so that the second end abuts the pin located at the top of the chip to be tested.

[0007] In one or more embodiments of the present invention, the positioning member is provided with a limiting portion for placing the chip to be tested to position the chip to be tested, or

[0008] The positioning member is provided with a limiting portion for placing the chip to be tested to position the chip to be tested, and the positioning member is provided with a hollow portion for exposing the pad and allowing the first end of the conductive member to pass through.

[0009] In one or more embodiments of the present invention, the positioning member and the application plate are provided with positioning pins and positioning holes, and the positioning pins are used to penetrate into the positioning holes to position the positioning member.

[0010] In one or more embodiments of the present invention, a plurality of pads are provided on the application board and are distributed on both sides or around the chip to be tested.

[0011] In one or more embodiments of the present invention, the number of pads located on each side of the chip under test is the same as the number of pins on that side of the chip under test.

[0012] In one or more embodiments of the present invention, a plurality of conductive members are provided and distributed on both sides or around the chip to be tested.

[0013] In one or more embodiments of the present invention, the number of the conductive members located on each side of the chip to be tested is the same as the number of pins on that side of the chip to be tested.

[0014] In one or more embodiments of the present invention, a first fixing hole is provided on the housing, a second fixing hole is provided on the application board, and the application board is mounted on the housing through the first fixing hole, the second fixing hole and the connector; or

[0015] The shell is provided with a first fixing hole, the application board is provided with a second fixing hole, and the positioning piece is provided with a third fixing hole. The application board and the positioning piece are mounted on the shell through the first fixing hole, the second fixing hole, the third fixing hole and the connecting piece.

[0016] In one or more embodiments of the present invention, an observation port is provided on the top of the shell.

[0017] In one or more embodiments of the present invention, observation windows are provided on both sides or all four sides of the housing.

[0018] Compared with the existing technology, the tooling fixture of the present invention bends the conductive part itself so that the second end of the conductive part abuts the pin located on the top of the chip to be tested, and at the same time the first end of the conductive part abuts the pad on the application board. Therefore, when targeting chips with pinless packaging types such as DFN and QFN, it is also possible to locate the hot spot on the back side of the chip of such packaging products on the application board, thereby greatly improving the success rate of failure analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments or the description of the prior art. Obviously, the drawings described below are only some of the embodiments described in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts.

[0020] Figure 1 Schematic diagram of the three-dimensional structure of a fixture in one embodiment.

[0021] Figure 2 1 is an exploded view of a fixture in one embodiment.

[0022] Figure 3 It is a partial cross-sectional view of a fixture in one embodiment. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only a portion of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of the present invention.

[0024] The terms "coupled," "connected," or "connected" in this specification encompass both direct and indirect connections. Furthermore, in utility models, terms such as "first" and "second" are primarily used to distinguish one technical feature from another, and do not necessarily require or imply a specific relationship, quantity, or order between these technical features.

[0025] In the detailed description of the specification, reference is made to the accompanying drawings forming a part thereof, wherein like reference numerals designate like parts throughout, and wherein exemplary embodiments that may be implemented are shown by way of example. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be construed in a limiting sense.

[0026] The various operations in the specification may be described as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be interpreted as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in an order different from the described embodiments. Various additional operations may be performed and / or the described operations may be omitted in additional embodiments.

[0027] For the purposes of this disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of this disclosure, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0028] Various components and devices may be referred to or shown in the singular herein (e.g., "transistor," "transistor," "switch," etc.), but this is merely for ease of discussion, and any element referred to in the singular may include multiple such elements in accordance with the teachings herein.

[0029] The specification uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," which can each refer to one or more of the same or different embodiments. In addition, the terms "including," "comprising," "having," etc. used with respect to the embodiments of the present disclosure are synonymous.

[0030] like Figure 1 and Figure 2 As shown, a tooling fixture in an embodiment of the present invention is suitable for chips using DFN packaging or QFN packaging (pinless packaging), and of course can also be suitable for chips with pins. The tooling fixture includes: an application board 10, a shell 20, a positioning part 30 and a conductive part 40.

[0031] The housing 20 and positioning member 30 are mounted in conjunction with the application board 10. In one embodiment, the positioning member 30 is located on the application board 10 and is plate-shaped. The housing 20 is located on the positioning member 30, and a receiving cavity is formed within the housing 20. In other embodiments, the housing 20 is mounted in conjunction with the application board 10, and the positioning member 30 can be disposed within the receiving cavity. The positioning member 30 is mounted in conjunction with the application board 10 and / or the housing 20.

[0032] The chip under test 50 is located within the housing cavity, and the positioning member 30 is used to position the chip under test 50. The chip under test 50 using the DFN or QFN package mainly has two shapes: rectangular and square. The pins 51 on the chip under test 50 are also mainly distributed in two ways: on opposite sides or on all four sides. The chip under test 50 is placed with its back facing up and its front facing down, that is, with the side with the pins 51 facing up. Failure analysis of the chip under test 50 can be performed by removing the metal sheet located in the center of the back of the chip under test 50 (also called opening the seal).

[0033] like Figure 3As shown, the conductive member 40 is disposed in the accommodating cavity. The conductive member 40 has a mounting portion that cooperates with the housing 20, a first end portion 41 that abuts the pad 11 on the application board 10, and a second end portion 42 that abuts the pin 51 of the chip to be tested 50. The conductive member 40 is bent so that the second end portion 42 abuts the pin 51 at the top of the chip to be tested 50. In one embodiment, the conductive member 40 is bent to form a mounting portion embedded in the interior of the housing 20. The mounting portion is embedded in the top of the housing 20. The length of the conductive member 40 between the first end portion 41 and the mounting portion is greater than the length of the conductive member 40 between the second end portion 42 and the mounting portion. The conductive member 40 can be cylindrical or elongated. Since the pin 51 is located at the top of the chip to be tested 50, the conductive member 40 is bent to form a bent portion, so that the second end portion 42 can abut the pin 51 from above the pin 51.

[0034] like Figure 2 As shown, in one embodiment, the positioning member 30 is provided with a limiting portion 31 for placing and positioning the chip under test 50. In one embodiment, the limiting portion 31 is a through hole that conforms to the shape of the chip under test 50 and can be square or rectangular. The chip under test 50 is placed on the limiting portion 31, and the sidewalls surrounding the limiting portion 31 constrain the chip under test 50 on all sides. In other embodiments, the limiting portion 31 can be a groove that conforms to the shape of the chip under test 50, or the limiting portion 31 can have other shapes.

[0035] In addition, the positioning member 30 is provided with a hollow portion 32 for exposing the solder pad 11 and for allowing the first end portion 41 of the conductive member 40 to pass through. In one embodiment, the hollow portion 32 is a through hole that penetrates the positioning member 30. The shape of the hollow portion 32 can be customized as needed, and the number of hollow portions 32 is the same as the number of groups of pins 51 on the chip under test 50. Each group of pins 51 is located near a side edge of the top of the chip under test 50. If there is a group of pins 51 on two opposite sides of the top of the chip under test 50, two hollow portions 32 are provided and distributed on both sides of the limiting portion 31. If there is a group of pins 51 on all four sides of the top of the chip under test 50, four hollow portions 32 are provided and distributed around the limiting portion 31.

[0036] Correspondingly, each group of pins 51 corresponds to a group of solder pads 11, and the number of each group of solder pads 11 is the same as the number of each group of pins 51. If two opposing groups of pins 51 are provided on the top of the chip to be tested 50, then two groups of solder pads 11 are also provided and distributed on both sides of the chip to be tested 50 (with the chip to be tested 50 placed on the application board 10 as a reference). If four groups of pins 51 are provided on the top of the chip to be tested 50, then four groups of solder pads 11 are also provided and distributed around the chip to be tested 50.

[0037] The positioning member 30 is provided with a positioning pin 33, and the application board 10 is provided with a positioning hole 12. The positioning pin 33 is used to penetrate the positioning hole 12 to position the positioning member 30, thereby preventing the positioning member 30 from shifting on the application board 10. In other embodiments, the positioning pin can be provided on the application board 10, and the positioning hole can be provided on the positioning member 30.

[0038] Based on the number of groups of pins 51, the number of pins in each group 51 and the distribution of each group of pins 51, the number of groups of pads 11, the number of pads in each group 11 and the distribution of each group of pads 11, multiple conductive members 40 are provided and divided into multiple groups. The number of groups of conductive members 40 is the same as the number of groups of pins 51 and the number of groups of pads 11. The number of conductive members in each group is the same as the number of pins in each group 51 and the number of pads in each group 11. Each group of conductive members 40 is distributed on both sides or all around the chip to be tested 50 (with the chip to be tested 50 placed on the application board 10 as a reference).

[0039] The housing 20 has an observation port 21 at the top, allowing observation of the backside of the chip under test 50. Observation windows 22 are provided on all four sides of the housing 20, with one observation window 22 on each side corresponding to each set of conductive elements 40. If only two opposing sets of conductive elements 40 are provided, observation windows 22 are provided on the corresponding sides of the housing 20.

[0040] A first fixing hole 23 is provided on the shell 20, a second fixing hole 13 is provided on the application plate 10, and a third fixing hole 34 is provided on the positioning member 30. The application plate 10 and the positioning member 30 are mounted in conjunction with the shell 20 through the first fixing hole 23, the second fixing hole 13, the third fixing hole 34 and the connecting member. In one embodiment, the shell 20, the positioning member 30 and the application plate 10 are fixed in a stacked manner. The connecting member can be a bolt, a nut or other components. In other embodiments, the positioning member 30 can be fixed by engaging its side wall with the inner wall of the shell 20 or by interference fit. In this case, it is only necessary to mount the application plate 10 in conjunction with the shell 20 through the first fixing hole, the second fixing hole and the connecting member.

[0041] There are four first fixing holes 23, four second fixing holes 13, and four third fixing holes 34, and the positions of the first fixing holes 23, the second fixing holes 13, and the third fixing holes 34 correspond to each other. The first fixing holes 23 are respectively arranged near the four corners of the housing 20, and the third fixing holes 34 are respectively arranged near the four corners of the positioning member 30. In other embodiments, the number and position of the first fixing holes 23, the second fixing holes 13, and the third fixing holes 34 can be changed as needed.

[0042] When the connector is tightened, it squeezes the housing 20. The conductive member 40 is pressed by the housing 20 and can contact the pins 51 of the chip under test 50 and the pads 11 on the application board 10 at the same time. The conductive member 40 can be made of various conductive materials, preferably a copper substrate plated with nickel and gold.

[0043] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the present invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be encompassed within the present invention. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

[0044] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A fixture, characterized in that: include: An application board, a shell, a positioning member and a conductive member; the shell and the positioning member are installed in cooperation with the application board, a receiving cavity is formed in the shell, the positioning member is used to position the chip to be tested, and the conductive member is arranged in the receiving cavity. The conductive member has a mounting portion that is installed in cooperation with the shell, a first end that abuts the pad on the application board, and a second end that abuts the pin of the chip to be tested. The conductive member is bent by itself so that the second end abuts the pin located at the top of the chip to be tested.

2. The fixture according to claim 1, characterized in that: The positioning member is provided with a limiting portion for placing the chip to be tested to position the chip to be tested, or The positioning member is provided with a limiting portion for placing the chip to be tested to position the chip to be tested, and the positioning member is provided with a hollow portion for exposing the pad and allowing the first end of the conductive member to pass through.

3. The fixture according to claim 1, characterized in that: The positioning piece and the application plate are provided with positioning pins and positioning holes, and the positioning pins are used to penetrate the positioning holes to position the positioning piece.

4. The fixture according to claim 1, characterized in that: There are multiple pads on the application board and they are distributed on both sides or around the chip to be tested.

5. The fixture according to claim 4, characterized in that: The number of pads on each side of the chip to be tested is the same as the number of pins on that side of the chip to be tested.

6. The fixture according to claim 1, characterized in that: The conductive members are provided in plurality and distributed on both sides or around the chip to be tested.

7. The fixture according to claim 6, characterized in that: The number of the conductive members on each side of the chip to be tested is the same as the number of the pins on that side of the chip to be tested.

8. The fixture according to claim 1, characterized in that: The housing is provided with a first fixing hole, the application board is provided with a second fixing hole, and the application board is mounted on the housing through the first fixing hole, the second fixing hole and the connecting piece; or The shell is provided with a first fixing hole, the application board is provided with a second fixing hole, and the positioning piece is provided with a third fixing hole. The application board and the positioning piece are mounted on the shell through the first fixing hole, the second fixing hole, the third fixing hole and the connecting piece.

9. The fixture according to claim 1, characterized in that: An observation port is provided on the top of the shell.

10. The fixture according to claim 1, characterized in that: Observation windows are provided on both sides or all four sides of the shell.

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